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At least 109 records · Page 6

The structural and electrical properties of low-resistance Ni contacts to InP

We have investigated the electrical and metallurgical behavior of the Ni-InP contact system. Specific contact resistivity (Rc) values in the low 10 exp -7 Omega-sq cm range are achieved with Ni-only contacts on n-InP by sintering at 400 C for several minutes. The postsinter contact metallization consists of three layers, arranged in the sequence: InP/Ni3P/Ni2P/In. Extended sintering (40 min) at 400 C brings about a rise in Rc to the 10 exp -4 Omega-sq cm range. After extended sintering, the contact metallization is found to consist of only two layers, arranged in the sequence: InP/Ni2P/In. Based on the correlation between low Rc and the presence of Ni3P at the metal-InP interface, it is suggested that the presence of Ni3P is the cause of the low Rc values. We show that the sintering schedule used to achieve low values of Rc is accompanied by substantial metal-InP interdiffusion that results in severe device degradation.

Fatemi, Navid S.↗

Low resistance silver contacts to indium phosphide - Electrical and metallurgical considerations

The electrical and metallurgical behavior of the Ag-InP contact system has been investigated. Specific contact resistivity (Rc) values in the low 10 exp -6 Ohm sq cm range are readily achieved on n-InP (Si: 1.7 x 10 exp 18/cu cm) after sintering at 400 C for several minutes. The low Rc values, however, are shown to be accompanied by dissolution of InP into the metallization, resulting in device degradation. An analysis of the sinter-induced metallurgical interactions shows this system to be similar to the well-characterized Au-InP system, albeit with fundamental differences. The similarities include the dissociative diffusion of In, the reaction-suppressing effect of SiO2 capping, and especially, the formation of a phosphide layer at the metal-InP interface. The low post-sinter Rc values in the Ag-InP system may be due to the presence of a AgP2 layer at the metal-InP interface; low values of Rc can be achieved without incurring device degrading metallurgical interactions by introducing a thin AgP2 layer between the InP and the current carrying metallization.

Weizer, Victor G.↗

Testing

Testing is conducted to verify that the connectors will properly perform over time (reliability) per the application requirements. Testing by the manufacturer usually involves performance testing per the datasheet requirements. However, the customer may have applications that require performance under unique operational and environmental conditions. In general, electrical tests for connectors include dielectric withstanding voltage, low-signal-level contact resistance, insulation resistance, contact resistance, and standing wave ratio. Environmental tests include humidity, temperature, and contaminating conditions, as well as mechanical stress environments including vibration, mechanical shock, and durability cycling exposures.

Connectors, testing, Dielectric Withstanding Volta↗

Extremely low resistance nonalloyed ohmic contacts on GaAs using InAs/InGaAs and InAs/GaAs strained-layer superlattices

Employing a structure consisting of n(+)-InAs/InGaAs and InAs/GaAs strained-layer superlattices (SLSs) grown by molecular beam epitaxy on GaAs films, nonalloyed contact resistances less than 8.5 x 10 to the -8th ohm sq cm have been obtained. Self-consistent simulations show that these extremely small nonalloyed contact resistances are due to the suppression of the depletion depth in the GaAs channel and tunneling through the SLS layer. Similar structures on InGaAs channels have led to nonalloyed specific contact resistances of about 1.5 x 10 to the -8th ohm sq cm. These results represent the smallest figures reported for these important material systems.

Peng, C. K.↗

Non-destructive, ultra-low resistance, thermally stable contacts for use on shallow junction InP solar cells

Contact formation to InP is plagued by violent metal-semiconductor intermixing that takes place during the contact sintering process. Because of this the InP solar cell cannot be sintered after contact deposition. This results in cell contact resistances that are orders of magnitude higher than those that could be achieved if sintering could be performed in a non-destructive manner. We report here on a truly unique contact system involving Au and Ge, which is easily fabricated, which exhibits extremely low values of contact resistivity, and in which there is virtually no metal-semiconductor interdiffusion, even after extended sintering. We present a description of this contact system and suggest possible mechanisms to explain the observed behavior.

Weizer, V. G.↗

Silicon implantation and annealing in β -Ga 2 O 3 : Role of ambient, temperature, and time

Optimizing thermal anneals of Si-implanted β-Ga 2 O 3 is critical for low resistance contacts and selective area doping. Here we report the impact of annealing ambient, temperature, and time on the activation of room temperature ion-implanted Si in β-Ga 2 O 3 at concentrations from 5 × 10 18 to 1 × 10 20 cm −3 , demonstrating full activation (>80% activation, mobilities >70 cm 2 /V s) with contact resistances below 0.29 Ω mm. Homoepitaxial β-Ga 2 O 3 films, grown by plasma-assisted molecular beam epitaxy on Fe-doped (010) substrates, were implanted at multiple energies to yield 100 nm box profiles of 5 × 10 18 , 5 × 10 19, and 1 × 10 20 cm −3 . Anneals were performed in an ultra-high vacuum-compatible quartz furnace at 1 bar with well-controlled gas compositions. To maintain β-Ga 2 O 3 stability, p O2 must be greater than 10 −9 bar. Anneals up to p O2 = 1 bar achieve full activation at 5 × 10 18 cm −3, while 5 × 10 19 cm −3 must be annealed with p O2 ≤ 10 −4 bar, and 1 × 10 20 cm −3 requires p O2 < 10 −6 bar. Water vapor prevents activation and must be maintained below 10 −8 bar. Activation is achieved for anneal temperatures as low as 850 °C with mobility increasing with anneal temperatures up to 1050 °C, though Si diffusion has been reported above 950 °C. At 950 °C, activation is maximized between 5 and 20 min with longer times resulting in decreased carrier activation (over-annealing). This over-annealing is significant for concentrations above 5 × 10 19 cm −3 and occurs rapidly at 1 × 10 20 cm −3 . Rutherford backscattering spectrometry (channeling) suggests that damage recovery is seeded from remnant aligned β-Ga 2 O 3 that remains after implantation; this conclusion is also supported by scanning transmission electron microscopy showing retention of the β-phase with inclusions that resemble the γ-phase.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Au/Zn Contacts to rho-InP: Electrical and Metallurgical Characteristics and the Relationship Between Them

The metallurgical and electrical behavior of Au/Zn contacting metallization on p-type InP was investigated as a function of the Zn content in the metallization. It was found that ohmic behavior can be achieved with Zn concentrations as small as 0.05 atomic percent Zn. For Zn concentrations between 0.1 and 36 at. percent, the contact resistivity rho(sub c) was found to be independent of the Zn content. For low Zn concentrations the realization of ohmic behavior was found to require the growth of the compound Au2P3 at the metal-InP interface. The magnitude of rho(sub c) is shown to be very sensitive to the growth rate of the interfacial Au2P3 layer. The possibility of exploiting this sensitivity to provide low resistance contacts while avoiding the semiconductor structural damage that is normally attendant to contact formation is discussed.

Weizer, Victor G.↗

Contact regrowth technique for low-resistance nonalloyed contacts to the hot-electron transistor

A novel contact regrowth technique for the formation of extremely low nonalloyed ohmic contacts is reported. The successful demonstration of this technique is reported on an InGaAs/InAlAs hot-electron transistor device. For the investigated InGaAs-based structure, the regrown contacting scheme reported includes an In(0.53)Ga(0.47)As layer, an InAs/GaAs strained-layer superlattice, and an InAs cap, all heavily doped n type with Si. A very low specific contact resistance of 1.8 x 10 to the -7th ohm sq cm to the base layer is obtained. The higher current densities achieved in the transistor characteristics are in close agreement with calculations, and a contact model is presented explaining the poor results of conventional nonalloyed contacts.

Peng, C. K.↗

Characterization of Engineered Pinholes in Dielectric Stacks of High-Performance Poly-Silicon Passivating Contacts

Passivating contact structures are expected to be implemented in > 50 % of industrially manufactured silicon photovoltaics produced over the next decade. One type of passivating contact utilizes a c-Si/dielectric/doped poly-Si layer stack. In cases where the dielectric layer/s are thick enough to impede tunneling of charge carriers, it was shown that disruptions (pinholes) in the dielectric are required to facilitate transport.[1] Pinholes in SiOx layers have typically been formed via high temperature annealing that allows localized breakup of this layer. This approach has drawbacks; 1) high temperature annealing increases cost and 2) pinhole formation is sensitive to both the SiOx thickness and wafer surface morphology making control of density and dimensions difficult. Recently, an alternative method of pinhole formation relying on metal assisted chemical etching (MACE) was shown to allow control over pinhole areal densities.[2] Such control is critical as both the density and dimensions of the pinholes determine saturation current density and contact resistivity. The contacts formed with the MACE process are known as polysilicon on locally etched oxide or PLEO and also result in low saturation current densities and low contact resistivity due to SiOx passivation and engineered pinhole enabled charge carrier transport, respectively. Photovoltaic devices with efficiencies greater than 20 % have recently been produced with these contacts, demonstrating the viability of contacts with engineered pinholes. Experimentally, preferential local collection of excess charge carriers has been observed and definitively connected to thermally induced pinholes in thick SiOx layers within c-Si/SiOx/poly-Si contact structures.[3] Recent work has shown that enhanced local collection of excess carriers can result from enhanced diffusion of dopants through pinholes in SiOx layers.[4] This study was restricted to simulation and characterization of poly-Si with the same dopant type as the c-Si substrates. In this work we focus our analysis on boron doped poly-Si with different stacks of dielectric layers (PLEO and PLENO where the N refers to a SiNy layer on top of the SiOx) on n-type crystalline silicon. This provides insight into how engineered pinholes affect charge collection across the p-n junction. Like previous observations of locally enhanced carrier transport through thermally induced pinholes, the EBIC images in Figure 1 shows that engineered pinholes in PLENO (1a) and PLEO (1b) also exhibit locally enhanced carrier transport at pinhole locations (bright spots in the images). We will also present detailed correlative nanoscale structural and chemical analysis using TEM imaging and EELS analysis with sample preparation guided by EBIC imaging. This allows us to connect the density and dimensions of engineered pinholes with charge carrier transport and measured photovoltaic device parameters. Our findings will accelerate the adoption of PLEO and PLENO contacts in industrially manufactured photovoltaic devices.

EBIC↗

Thermal and electrical contact conductance studies

Prediction of electrical and thermal contact resistance for pressed, nominally flat contacts is complicated by the large number of variables which influence contact formation. This is reflected in experimental results as a wide variation in contact resistances, spanning up to six orders of magnitude. A series of experiments were performed to observe the effects of oxidation and surface roughness on contact resistance. Electrical contact resistance and thermal contact conductance from 4 to 290 K on OFHC Cu contacts are reported. Electrical contact resistance was measured with a 4-wire DC technique. Thermal contact conductance was determined by steady-state longitudinal heat flow. Corrections for the bulk contribution ot the overall measured resistance were made, with the remaining resistance due solely to the presence of the contact.

Vansciver, S. W.↗

Low-resistance noble metal contacts to high-temperature superconductors

Low-resistance contacts were made to both YBa2Cu3O(7-x) and Bi2BaSr2Cu2O8, and to related superconducting compounds by melting gold or silver pads onto the samples before the final oxygen treatment. Scanning electron microscope studies show that both gold and silver do not diffuse far from the contact area. The surface contact resistivity of the best contacts made by the melting technique has an upper limit value in the 10 to the -8th ohm sq cm range at 77 K. This contact resistivity shows no significant change in its value over a period of 17 months. Furthermore, an electron radiation dose of 5.7 x 10 to the 17th electron/sq cm only doubled the contact resistivity.

Selim, R.↗

Low resistance p-type contacts to monolayer WSe2 through chlorinated solvent doping

Tungsten diselenide (WSe 2 ) is a promising p-type semiconductor limited by high contact resistance (R C ) and the lack of a reliable doping strategy. Here, we demonstrate that exposing WSe 2 to chloroform provides simple and stable p-type doping. In monolayer WSe 2 transistors with Pd contacts, chloroform increases the maximum hole current by over 100× (>200 µA/µm), reduces R C to ~ 2.5 kΩ·μm, and retains an on/off ratio of 10 10 at room temperature. These improvements persist for over 8 months, survive a 150 °C thermal anneal, and remain effective down to 10 K, enabling a cryogenic R C of ~ 1 kΩ·μm. Density functional theory indicates that chloroform strongly physisorbs to WSe 2 , inducing hole doping with minimal impact on the electronic states between the valence band and conduction band edges. Auger electron spectroscopy and atomic force microscopy suggest that chloroform intercalates at the WSe 2 interface with the gate oxide, contributing to doping stability and mitigating interfacial dielectric disorder, though further studies are needed to conclusively confirm this mechanism. This robust, scalable approach enables high-yield WSe 2 transistors with good p-type performance.

42 ENGINEERING↗

Ohmic contacts for laser diodes

Requirements for ohmic contacts to laser diodes are discussed, and properties of Schottky barrier tunneling contacts are reviewed. A procedure is described for measuring contact resistance on fabricated laser material without the need for specially constructed samples and contact configurations. Measurements of contact resistance and estimates of specific contact resistance are given for Ti/Pt/Au contacts to surfaces with three different doping levels. It was found that below a p-type carrier concentration of 1 x 10 to the 19th per cu cm the contact resistance is likely to be too high for good device performance. At higher doping levels, a specific contact resistance as low as 2 x 10 to the -6th ohm sq cm was obtained. Oxide stripe lasers provided with the type of contact discussed in this paper have been operated without failures for periods up to 7 years at a current density at the contact of 6-8 kA/sq cm. It appears therefore that these contacts satisfy the need for low resistance and durability and that, at the same time, they do not cause any obvious material degradation.

Ladany, I.↗