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At least 109 records · Page 6

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NASA NTRS2018

Randomizer for High Data Rates

NASA as well as a number of other space agencies now recognize that the current recommended CCSDS randomizer used for telemetry (TM) is too short. When multiple applications of the PN8 Maximal Length Sequence (MLS) are required in order to fully cover a channel access data unit (CADU), spectral problems in the form of elevated spurious discretes (spurs) appear. Originally the randomizer was called a bit transition generator (BTG) precisely because it was thought that its primary value was to insure sufficient bit transitions to allow the bit/symbol synchronizer to lock and remain locked. We, NASA, have shown that the old BTG concept is a limited view of the real value of the randomizer sequence and that the randomizer also aids in signal acquisition as well as minimizing the potential for false decoder lock. Under the guidelines we considered here there are multiple maximal length sequences under GF(2) which appear attractive in this application. Although there may be mitigating reasons why another MLS sequence could be selected, one sequence in particular possesses a combination of desired properties which offsets it from the others.

primitive polynomials↗

NASA NTRS1982

Analysis of space telescope data collection system

An analysis of the expected performance for the Multiple Access (MA) system is provided. The analysis covers the expected bit error rate performance, the effects of synchronization loss, the problem of self-interference, and the problem of phase ambiguity. The problem of false acceptance of a command word due to data inversion is discussed. A mathematical determination of the probability of accepting an erroneous command word due to a data inversion is presented. The problem is examined for three cases: (1) a data inversion only, (2) a data inversion and a random error within the same command word, and a block (up to 256 48-bit words) containing both a data inversion and a random error.

Ingels, F. M.↗

NASA NTRS1971

A simple branch synchronizer for convolutional decoders.

A simple branch synchronizer for rate 1/3, constraint length five, nonsystematic convolutional code is described. The scheme derives the sync information from the received channel bits, thus avoiding the extra formatting of the sync data at the transmitter and receiver, and increasing the data rate. The synchronizer detects the proper sync bits for both the in-phase and phase ambiguous cases. The design is adaptable to nonsystematic codes of different constraint lengths.

Taqvi, S. Z. H.↗

NASA NTRS1975

Space vehicle Viterbi decoder

The design and fabrication of an extremely low-power, constraint-length 7, rate 1/3 Viterbi decoder brassboard capable of operating at information rates of up to 100 kb/s is presented. The brassboard is partitioned to facilitate a later transition to an LSI version requiring even less power. The effect of soft-decision thresholds, path memory lengths, and output selection algorithms on the bit error rate is evaluated. A branch synchronization algorithm is compared with a more conventional approach. The implementation of the decoder and its test set (including all-digital noise source) are described along with the results of various system tests and evaluations. Results and recommendations are presented.

Source record↗

NASA NTRS1990

Direct detection optical intersatellite link at 220 Mbps using AlGaAs laser diode and silicon APD with 4-ary PPM signaling

A newly developed 220 Mbps free-space 4-ary pulse position modulation (PPM) direct detection optical communication system is described. High speed GaAs integrated circuits were used to construct the PPM encoder and receiver electronic circuits. Both PPM slot and word timing recovery were provided in the PPM receiver. The optical transmitter consisted of an AlGaAs laser diode (Mitsubishi ML5702A, lambda=821nm) and a high speed driver unit. The photodetector consisted of a silicon avalanche photodiode (APD) (RCA30902S) preceded by an optical interference filter (delta lambda=10nm). Preliminary tests showed that the self-synchronized PPM receiver could achieve a receiver bit error rate of less than 10(exp -6) at 25 nW average received optical signal power or 360 photons per transmitted information bit. The relatively poor receiver sensitivity was believed to be caused by the insufficient electronic bandwidth of the APD preamplifier and the poor linearity of the preamplifier high frequency response.

Sun, Xiaoli↗

NASA NTRS1981

Frequency synchronization of a frequency-hopped MFSK communication system

This paper presents the performance of fine-frequency synchronization. The performance degradation due to imperfect frequency synchronization is found in terms of the effect on bit error probability as a function of full-band or partial-band noise jamming levels and of the number of frequency hops used in the estimator. The effect of imperfect fine-time synchronization is also included in the calculation of fine-frequency synchronization performance to obtain the overall performance degradation due to synchronization errors.

Huth, G. K.↗

NASA NTRS1992

Node synchronization schemes for the Big Viterbi Decoder

The Big Viterbi Decoder (BVD), currently under development for the DSN, includes three separate algorithms to acquire and maintain node and frame synchronization. The first measures the number of decoded bits between two consecutive renormalization operations (renorm rate), the second detects the presence of the frame marker in the decoded bit stream (bit correlation), while the third searches for an encoded version of the frame marker in the encoded input stream (symbol correlation). A detailed account of the operation is given, as well as performance comparison, of the three methods.

Cheung, K.-M.↗

NASA NTRS2012

On Shaft Data Acquisition System (OSDAS)

On Shaft Data Acquisition System (OSDAS) is a rugged, compact, multiple-channel data acquisition computer system that is designed to record data from instrumentation while operating under extreme rotational centrifugal or gravitational acceleration forces. This system, which was developed for the Heritage Fuel Air Turbine Test (HFATT) program, addresses the problem of recording multiple channels of high-sample-rate data on most any rotating test article by mounting the entire acquisition computer onboard with the turbine test article. With the limited availability of slip ring wires for power and communication, OSDAS utilizes its own resources to provide independent power and amplification for each instrument. Since OSDAS utilizes standard PC technology as well as shared code interfaces with the next-generation, real-time health monitoring system (SPARTAA Scalable Parallel Architecture for Real Time Analysis and Acquisition), this system could be expanded beyond its current capabilities, such as providing advanced health monitoring capabilities for the test article. High-conductor-count slip rings are expensive to purchase and maintain, yet only provide a limited number of conductors for routing instrumentation off the article and to a stationary data acquisition system. In addition to being limited to a small number of instruments, slip rings are prone to wear quickly, and introduce noise and other undesirable characteristics to the signal data. This led to the development of a system capable of recording high-density instrumentation, at high sample rates, on the test article itself, all while under extreme rotational stress. OSDAS is a fully functional PC-based system with 48 channels of 24-bit, high-sample-rate input channels, phase synchronized, with an onboard storage capacity of over 1/2-terabyte of solid-state storage. This recording system takes a novel approach to the problem of recording multiple channels of instrumentation, integrated with the test article itself, packaged in a compact/rugged form factor, consuming limited power, all while rotating at high turbine speeds.

Pedings, Marc↗

NASA NTRS1974

Quasi-perfect FIFO: Synchronous or asynchronous with application in controller design for the UNICON laser memory

The first-in-first-out memory buffer (FIFO), is an elastic digital memory whose main application is in data buffering between devices operating at different rates. Data written into the top is moved autonomously down toward the bottom of the FIFO to the lowest unoccupied location, and data read from the bottom of the FIFO will cause data from the top to move autonomously down toward the bottom. The FIFO is available in MOS LSI asynchronous form with data rate in the 1 MHz region. The FIFO described yields a simple high-speed iterative implementation, either synchronous of asynchronous. Because of this simple iterative structure, the FIFO is expandable in both number of words and bits per word, and it is attractive from the viewpoint of integrated-circuit production. For the synchronous FIFO, a model was built and successfully used in the controller for the UNICON laser memory. For the asynchronous FIFO, a model was built and also successfully used in a high-performance magnetic tape controller.

Lim, R. S.↗

NASA NTRS1990

Synchronization techniques for all digital 16-ary QAM receivers operating over land mobile satellite links

The performance of a low bit rate (64 Kb/s) all digital 16-ary Differentially Encoded Quadrature Amplitude Modulation (16-DEQAM) demodulator operating over a mobile satellite channel, is considered. The synchronization and detection techniques employed to overcome the Rician channel impairments, are described. The acquisition and steady state performance of this modem, are evaluated by computer simulation over AWGN and RICIAN channels. The results verify the suitability of the 16-DEQAM transmission over slowly faded and/or mildly faded channels.

Fines, P.↗

NASA NTRS1975

The Viking Mars lander camera

The 7.3 kg cameras for the 1976 Viking Mars expedition feature an array of 12 silicon photodiodes, including six spectral bands for color and near-infrared imaging with an angular resolution of 0.12 deg and four focus steps for broadband imaging, with an improved angular resolution of 0.04 deg. The field of view in elevation ranges from 40 deg above to 60 deg below the horizon, and in azimuth ranges to 342.5 deg. The cameras are mounted 0.8 m apart to provide a stereo view of the area accessible to a surface sampler for biological and chemical investigations. The scanning rates are synchronized to the lander data transmission rates of 16000 bits per sec to the Viking orbiters as relay stations and 250 bits per sec directly to earth. However, image data can also be stored on a lander tape recorder. About 10 million bits of image data will be transmitted during most days of the 60-day-long mission planned for each lander.

Huck, F. O.↗

NASA NTRS1981

Time synchronization of a frequency-hopped MFSK communication system

In a frequency-hopped (FH) multiple-frequency-shift-keyed (MFSK) communication system, frequency hopping causes the necessary frequency transitions for time synchronization estimation rather than the data sequence as in the conventional (nonfrequency-hopped) system. Making use of this observation, this paper presents a fine synchronization (i.e., time errors of less than a hop duration) technique for estimation of FH timing. The performance degradation due to imperfect FH time synchronization is found in terms of the effect on bit error probability as a function of full-band or partial-band noise jamming levels and of the number of hops used in the FH timing estimate.

Simon, M. K.↗

NASA NTRS1986

A new method for frame synchronization

A frame synchronization method based on an examination of the shortest bit length containing all error bursts is introduced. It is shown that the new method is more reliable and efficient than the commonly used one based on counting the number of errors for the convolutionally coded channel.

Shahshahani, M.↗

NASA NTRS1991

A design approach for ultrareliable real-time systems

A design approach developed over the past few years to formalize redundancy management and validation is described. Redundant elements are partitioned into individual fault-containment regions (FCRs). An FCR is a collection of components that operates correctly regardless of any arbitrary logical or electrical fault outside the region. Conversely, a fault in an FCR cannot cause hardware outside the region to fail. The outputs of all channels are required to agree bit-for-bit under no-fault conditions (exact bitwise consensus). Synchronization, input agreement, and input validity conditions are discussed. The Advanced Information Processing System (AIPS), which is a fault-tolerant distributed architecture based on this approach, is described. A brief overview of recent applications of these systems and current research is presented.

Lala, Jaynarayan H.↗

NASA NTRS2006

General Solution for Theoretical Packet Data Loss Rate

Communications systems which transfer blocks ("frames") of data must use a marker ("frame synchronization pattern") for identifying where a block begins. A technique ("frame synchronization strategy") is used to locate the start of each frame and maintain synchronization as additional blocks are processed. A device which strips out the frame synchronization pattern [FSP] and provides an "end of frame" pulse is called a frame synchronizer. As clock and data errors are introduced into the system, the start-of-block marker becomes displaced and/or corrupted. The capability of the frame synchronizer to stay locked to the pattern under these conditions is a figure of merit for the frame synchronization strategy. It is important to select a strategy which will stay locked nearly all the time at bit error rates where the data is usable. ("Bit error rate" [BER] is the fraction of binary bits which are inverted by passage through a communication system.) The fraction of frames that are discarded because the frame synchronizer is not locked is called "Percent Data Loss" or "Packet Data Loss rate" [PDL]. A general approach for accurately predicting PDL given BER was developed in Theoretical Percent Data Loss Calculation and Measurement Accuracy, T. P. Kelly, LESC-30554, December 1992. Kelly gave a solution in terms of matrix equations, and only addressed "level" channel encoding. This paper goes on to give a closed-form polynomial solution for the most common class of frame synchronizer strategies, and will also address "mark" and "space" (differential) channel encoding, and burst error environments. The paper is divided into four sections and follows a logically ordered presentation, with results developed before they are evaluated. However, most readers will derive the greatest benefit from this paper by treating the results as reference material. The result developed for differential encoding can be extended to other applications (like block codes) where the probability is needed that a block contains only a certain number of errors.

Lansdowne, Chatwin↗

DOE OSTI2024

Smart Pixels: In-pixel AI for on-sensor data filtering

We present a smart pixel prototype readout integrated circuit (ROIC) designed in CMOS 28 nm bulk process, with in-pixel implementation of an artificial intelligence (AI) / machine learning (ML) based data filtering algorithm designed as proof-of-principle for a Phase III upgrade at the Large Hadron Collider (LHC) pixel detector. The first version of the ROIC consists of two matrices of 256 smart pixels, each 25$\times$25 µm\textsuperscript{2} in size. Each pixel consists of a charge-sensitive preamplifier with leakage current compensation and three auto-zero comparators for a 2-bit flash-type ADC. The frontend is capable of synchronously digitizing the sensor charge within 25 ns. Measurement results show an equivalent noise charge (ENC) of $\sim$30e\textsuperscript{-} and a total dispersion of $\sim$100e\textsuperscript{-} The second version of the ROIC uses a fully connected two-layer neural network (NN) to process information from a cluster of 256 pixels to determine if the pattern corresponds to highly desirable high-momentum particle tracks for selection and readout. The digital NN is embedded in-between analog signal processing regions of the 256 pixels without increasing the pixel size and is implemented as fully combinatorial digital logic to minimize power consumption and eliminate clock distribution, and is active only in the presence of an input signal. The total power consumption of the neural network is $\sim$ 300 $\mu$W. The NN performs momentum classification based on the generated cluster patterns and even with a modest momentum threshold, it is capable of 54.4\% – 75.4\% total data rejection, opening the possibility of using the pixel information at 40MHz for the trigger. The total power consumption of analog and digital functions per pixel is $\sim$ 6 $\mu$W per pixel, which corresponds to $\sim$ 1 W/cm\textsuperscript{2} staying within the experimental constraints.

Parpillon, Benjamin↗

NASA NTRS1986

Pulse Code Modulation (PCM) encoder handbook for Aydin Vector MMP-600 series system

The hardware and software characteristics of a time division multiplex system are described. The system is used to sample analog and digital data. The data is merged with synchronization information to produce a serial pulse coded modulation (PCM) bit stream. Information presented herein is required by users to design compatible interfaces and assure effective utilization of this encoder system. GSFC/Wallops Flight Facility has flown approximately 50 of these systems through 1984 on sounding rockets with no inflight failures. Aydin Vector manufactures all of the components for these systems.

Currier, S. F.↗

NASA NTRS1995

Pulse Code Modulation (PCM) encoder handbook for Aydin Vector MMP-900 series system

This handbook explicates the hardware and software properties of a time division multiplex system. This system is used to sample analog and digital data. The data is then merged with frame synchronization information to produce a serial pulse coded modulation (PCM) bit stream. Information in this handbook is required by users to design congruous interface and attest effective utilization of this encoder system. Aydin Vector provides all of the components for these systems to Goddard Space Flight Center/Wallops Flight Facility.

Raphael, David↗