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At least 1,063 records · Page 59

All sources NASA NTRS DOE OSTI

NASA NTRS2001

Flight Computer Design for the Space Technology 5 (ST-5) Mission

As part of NASA's New Millennium Program, the Space Technology 5 mission will validate a variety of technologies for nano-satellite and constellation mission applications. Included are: a miniaturized and low power X-band transponder, a constellation communication and navigation transceiver, a cold gas micro-thruster, two different variable emittance (thermal) controllers, flex cables for solar array power collection, autonomous groundbased constellation management tools, and a new CMOS ultra low-power, radiation-tolerant, +0.5 volt logic technology. The ST-5 focus is on small and low-power. A single-processor, multi-function flight computer will implement direct digital and analog interfaces to all of the other spacecraft subsystems and components. There will not be a distributed data system that uses a standardized serial bus such as MIL-STD-1553 or MIL-STD-1773. The flight software running on the single processor will be responsible for all real-time processing associated with: guidance, navigation and control, command and data handling (C&DH) including uplink/downlink, power switching and battery charge management, science data analysis and storage, intra-constellation communications, and housekeeping data collection and logging. As a nanosatellite trail-blazer for future constellations of up to 100 separate space vehicles, ST-5 will demonstrate a compact (single board), low power (5.5 watts) solution to the data acquisition, control, communications, processing and storage requirements that have traditionally required an entire network of separate circuit boards and/or avionics boxes. In addition to the New Millennium technologies, other major spacecraft subsystems include the power system electronics, a lithium-ion battery, triple-junction solar cell arrays, a science-grade magnetometer, a miniature spinning sun sensor, and a propulsion system.

Speer, David↗

NASA NTRS1983

Transformations of software design and code may lead to reduced errors

The capability of programmers and non-programmers to specify problem solutions by developing example-solutions and also for the programmers by writing computer programs was investigated; each method of specification was accomplished at various levels of problem complexity. The level of difficulty of each problem was reflected by the number of steps needed by the user to develop a solution. Machine processing of the user inputs permitted inferences to be developed about the algorithms required to solve a particular problem. The interactive feedback of processing results led users to a more precise definition of the desired solution. Two participant groups (programmers and bookkeepers/accountants) working with three levels of problem complexity and three levels of processor complexity were used. The experimental task employed required specification of a logic for solution of a Navy task force problem.

Connelly, E. M.↗

NASA NTRS1985

Supercomputing on massively parallel bit-serial architectures

Research on the Goodyear Massively Parallel Processor (MPP) suggests that high-level parallel languages are practical and can be designed with powerful new semantics that allow algorithms to be efficiently mapped to the real machines. For the MPP these semantics include parallel/associative array selection for both dense and sparse matrices, variable precision arithmetic to trade accuracy for speed, micro-pipelined train broadcast, and conditional branching at the processing element (PE) control unit level. The preliminary design of a FORTRAN-like parallel language for the MPP has been completed and is being used to write programs to perform sparse matrix array selection, min/max search, matrix multiplication, Gaussian elimination on single bit arrays and other generic algorithms. A description is given of the MPP design. Features of the system and its operation are illustrated in the form of charts and diagrams.

Iobst, Ken↗

NASA NTRS2003

Reconfigurable Hardware Adapts to Changing Mission Demands

A new class of computing architectures and processing systems, which use reconfigurable hardware, is creating a revolutionary approach to implementing future spacecraft systems. With the increasing complexity of electronic components, engineers must design next-generation spacecraft systems with new technologies in both hardware and software. Derivation Systems, Inc., of Carlsbad, California, has been working through NASA s Small Business Innovation Research (SBIR) program to develop key technologies in reconfigurable computing and Intellectual Property (IP) soft cores. Founded in 1993, Derivation Systems has received several SBIR contracts from NASA s Langley Research Center and the U.S. Department of Defense Air Force Research Laboratories in support of its mission to develop hardware and software for high-assurance systems. Through these contracts, Derivation Systems began developing leading-edge technology in formal verification, embedded Java, and reconfigurable computing for its PF3100, Derivational Reasoning System (DRS ), FormalCORE IP, FormalCORE PCI/32, FormalCORE DES, and LavaCORE Configurable Java Processor, which are designed for greater flexibility and security on all space missions.

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DOE OSTI2022

Profiling the BLAST bioinformatics application for load balancing on high-performance computing clusters

Abstract Background The Basic Local Alignment Search Tool (BLAST) is a suite of commonly used algorithms for identifying matches between biological sequences. The user supplies a database file and query file of sequences for BLAST to find identical sequences between the two. The typical millions of database and query sequences make BLAST computationally challenging but also well suited for parallelization on high-performance computing clusters. The efficacy of parallelization depends on the data partitioning, where the optimal data partitioning relies on an accurate performance model. In previous studies, a BLAST job was sped up by 27 times by partitioning the database and query among thousands of processor nodes. However, the optimality of the partitioning method was not studied. Unlike BLAST performance models proposed in the literature that usually have problem size and hardware configuration as the only variables, the execution time of a BLAST job is a function of database size, query size, and hardware capability. In this work, the nucleotide BLAST application BLASTN was profiled using three methods: shell-level profiling with the Unix “time” command, code-level profiling with the built-in “profiler” module, and system-level profiling with the Unix “gprof” program. The runtimes were measured for six node types, using six different database files and 15 query files, on a heterogeneous HPC cluster with 500+ nodes. The empirical measurement data were fitted with quadratic functions to develop performance models that were used to guide the data parallelization for BLASTN jobs. Results Profiling results showed that BLASTN contains more than 34,500 different functions, but a single function, RunMTBySplitDB, takes 99.12% of the total runtime. Among its 53 child functions, five core functions were identified to make up 92.12% of the overall BLASTN runtime. Based on the performance models, static load balancing algorithms can be applied to the BLASTN input data to minimize the runtime of the longest job on an HPC cluster. Four test cases being run on homogeneous and heterogeneous clusters were tested. Experiment results showed that the runtime can be reduced by 81% on a homogeneous cluster and by 20% on a heterogeneous cluster by re-distributing the workload. Discussion Optimal data partitioning can improve BLASTN’s overall runtime 5.4-fold in comparison with dividing the database and query into the same number of fragments. The proposed methodology can be used in the other applications in the BLAST+ suite or any other application as long as source code is available.

59 BASIC BIOLOGICAL SCIENCES↗

NASA NTRS1991

Recent technology products from Space Human Factors research

The goals of the NASA Space Human Factors program and the research carried out concerning human factors are discussed with emphasis given to the development of human performance models, data, and tools. The major products from this program are described, which include the Laser Anthropometric Mapping System; a model of the human body for evaluating the kinematics and dynamics of human motion and strength in microgravity environment; an operational experience data base for verifying and validating the data repository of manned space flights; the Operational Experience Database Taxonomy; and a human-computer interaction laboratory whose products are the display softaware and requirements and the guideline documents and standards for applications on human-computer interaction. Special attention is given to the 'Convoltron', a prototype version of a signal processor for synthesizing the head-related transfer functions.

Jenkins, James P.↗

NASA NTRS1992

Propellant production and useful materials: Hardware data from components and the systems

During the past year significant progress included: a major breakthrough in oxygen production through discs (instead of tubes) that resulted in two orders-of-magnitude increase in the yield rates, proving that oxygen production from any iron-bearing silicate (avoiding costly beneficiation) in lunar in-situ resource utilization (ISRU); construction of a half-scale robotic soil processor; production of melt-spun fibers in a solar furnace; and the culmination of first-stage research in the construction (and delivery to NASA LaRC) of a self-contained portable oxygen plant that incorporates the first generation ISRU technologies developed at UA SERC. In addition, further reductions in mass and power needs were achieved in two smaller oxygen plants, which, however, have far greater production rates. SERC continued to attract bright students both at the undergraduate and graduate levels, and several area high school students through the Professional Internship Program (PIP) administered by the local school district. Invited lectures at elementary schools continue to draw enthusiastic response. Another important first was the creation of the Freshman Colloquium, 'Space in Our Future, and Our Future in Space,' geared toward women and minority students. This course proved to be a success, with more than one-half of the enrollment composed of women. In recognition of these important contributions, the author was appointed to the NRC Committee on Space Science Technologies.

Ramohalli, Kumar↗

NASA NTRS2013

Compute Element and Interface Box for the Hazard Detection System

The Autonomous Landing and Hazard Avoidance Technology (ALHAT) program is building a sensor that enables a spacecraft to evaluate autonomously a potential landing area to generate a list of hazardous and safe landing sites. It will also provide navigation inputs relative to those safe sites. The Hazard Detection System Compute Element (HDS-CE) box combines a field-programmable gate array (FPGA) board for sensor integration and timing, with a multicore computer board for processing. The FPGA does system-level timing and data aggregation, and acts as a go-between, removing the real-time requirements from the processor and labeling events with a high resolution time. The processor manages the behavior of the system, controls the instruments connected to the HDS-CE, and services the "heavy lifting" computational requirements for analyzing the potential landing spots.

Villalpando, Carlos Y.↗

NASA NTRS2017

Development of Reliable Life Support Systems

The life support systems on the International Space Station (ISS) are the culmination of an extensive effort encompassing development, design, and test to provide the highest possible confidence in their operation on ISS. Many years of development testing are initially performed to identify the optimum technology and the optimum operational approach. The success of this development program depends on the accuracy of the system interfaces. The critical interfaces include the specific operational environment, the composition of the waste stream to be processed and the quality of the product. Once the development program is complete, a detailed system schematic is built based on the specific design requirements, followed by component procurement, assembly, and acceptance testing. A successful acceptance test again depends on accurately simulating the anticipated environment on ISS. The ISS Water Recovery System (WRS) provides an excellent example of where this process worked, as well as lessons learned that can be applied to the success of future missions. More importantly, ISS has provided a test bed to identify these design issues. Mechanical design issues have included an unreliable harmonic drive train in the Urine Processor's fluids pump, and seals in the Water Processor's Catalytic Reactor with insufficient life at the operational temperature. Systems issues have included elevated calcium in crew urine (due to microgravity effect) that resulted in precipitation at the desired water recovery rate, and the presence of an organosilicon compound (dimethylsilanediol) in the condensate that is not well removed by the water treatment process. Modifications to the WRS to address these issues are either complete (and now being evaluated on ISS) or are currently in work to insure the WRS has the required reliability before embarking on a mission to Mars.

Carter, Layne↗

NASA NTRS2017

Development of Reliable Life Support Systems

Carter, Layne↗

DOE OSTI2022

Unified Memory: GPGPU-Sim/UVM Smart Integration

CPU/GPU heterogeneous compute platforms are an ubiquitous element in computing and a programming model specified for this heterogeneous computing model is important for both performance and programmability. A programming model that exposes the shared, unified, address space between the heterogeneous units is a necessary step in this direction as it removes the burden of explicit data movement from the programmer while maintaining performance. GPU vendors, such as AMD and NVIDIA, have released software-managed runtimes that can provide programmers the illusion of unified CPU and GPU memory by automatically migrating data in and out of the GPU memory. However, this runtime support is not included in GPGPU-Sim, a commonly used framework that models the features of a modern graphics processor that are relevant to non-graphics applications. UVM Smart was developed, which extended GPGPU-Sim 3.x to in- corporate the modeling of on-demand pageing and data migration through the runtime. This report discusses the integration of UVM Smart and GPGPU-Sim 4.0 and the modifications to improve simulation performance and accuracy.

97 MATHEMATICS AND COMPUTING↗

NASA NTRS1987

Optimal pre-scheduling of problem remappings

A large class of scientific computational problems can be characterized as a sequence of steps where a significant amount of computation occurs each step, but the work performed at each step is not necessarily identical. Two good examples of this type of computation are: (1) regridding methods which change the problem discretization during the course of the computation, and (2) methods for solving sparse triangular systems of linear equations. Recent work has investigated a means of mapping such computations onto parallel processors; the method defines a family of static mappings with differing degrees of importance placed on the conflicting goals of good load balance and low communication/synchronization overhead. The performance tradeoffs are controllable by adjusting the parameters of the mapping method. To achieve good performance it may be necessary to dynamically change these parameters at run-time, but such changes can impose additional costs. If the computation's behavior can be determined prior to its execution, it can be possible to construct an optimal parameter schedule using a low-order-polynomial-time dynamic programming algorithm. Since the latter can be expensive, the performance is studied of the effect of a linear-time scheduling heuristic on one of the model problems, and it is shown to be effective and nearly optimal.

Nicol, David M.↗

NASA NTRS1987

IECON '87: Industrial applications of control and simulation; Proceedings of the 1987 International Conference on Industrial Electronics, Control, and Instrumentation, Cambridge, MA, Nov. 3, 4, 1987

Recent advances in control-system design and simulation are discussed in reviews and reports. Among the topics considered are fast algorithms for generating near-optimal binary decision programs, trajectory control of robot manipulators with compensation of load effects via a six-axis force sensor, matrix integrators for real-time simulation, a high-level control language for an autonomous land vehicle, and a practical engineering design method for stable model-reference adaptive systems. Also addressed are the identification and control of flexible-limb robots with unknown loads, adaptive control and robust adaptive control for manipulators with feedforward compensation, adaptive pole-placement controllers with predictive action, variable-structure strategies for motion control, and digital signal-processor-based variable-structure controls.

Hartley, Tom T.↗

NASA NTRS1992

NAS technical summaries: Numerical aerodynamic simulation program, March 1991 - February 1992

NASA created the Numerical Aerodynamic Simulation (NAS) Program in 1987 to focus resources on solving critical problems in aeroscience and related disciplines by utilizing the power of the most advanced supercomputers available. The NAS Program provides scientists with the necessary computing power to solve today's most demanding computational fluid dynamics problems and serves as a pathfinder in integrating leading-edge supercomputing technologies, thus benefiting other supercomputer centers in Government and industry. This report contains selected scientific results from the 1991-92 NAS Operational Year, March 4, 1991 to March 3, 1992, which is the fifth year of operation. During this year, the scientific community was given access to a Cray-2 and a Cray Y-MP. The Cray-2, the first generation supercomputer, has four processors, 256 megawords of central memory, and a total sustained speed of 250 million floating point operations per second. The Cray Y-MP, the second generation supercomputer, has eight processors and a total sustained speed of one billion floating point operations per second. Additional memory was installed this year, doubling capacity from 128 to 256 megawords of solid-state storage-device memory. Because of its higher performance, the Cray Y-MP delivered approximately 77 percent of the total number of supercomputer hours used during this year.

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DOE OSTI2024

Quantum/AI Topology-Aware Latency-Adaptive HPC Workflow Scheduling Optimization

The growing demand for more powerful high-performance computing (HPC) systems has led to a steady rise in energy consumption by supercomputing worldwide. This study is focused on comparing our Application-Topology Mapper (ATMapper) to the popular Simple Linux Utility for Resource Management (SLURM) for the purpose of exploring methods that can further optimize job-scheduling within HPC systems. ATMapper is an Artificial-Intelligence based approach to job-scheduling that is currently being enhanced with quantum annealing (QA) to generate optimal schedules faster. We are applying QA to speedup our ATMapper process to achieve higher computing efficiency, thereby reducing HPC energy consumption. Here, we examine how four job-scheduling approaches perform in processor node assignment when using an example network architecture of 4 interconnected nodes. Using a specialized script, we are assessing the schedule of a computation flow with 11 interdependent tasks. The data movements among nodes were tracked to count for the number of interactions (network hops) between nodes needed to complete the tasks. The total number of hops and the job completion time were then used to quantify the efficiency of the different mapping approaches. In addition to SLURM, we also compare our ATMapper to the QA-enabled LBNL TIGER and the D-Wave Distributed Computing processor assignment approaches. The preliminary results showed that our topology-aware, latency-adaptive ATMapper is significantly more efficient when compared to the other scheduling approaches due to its load-imbalance network allocation. The scheduler displayed a computing efficiency of 53% by performing significantly fewer network hops than its alternatives. By reducing the number of hops, ATMapper was able to perform all 11 tasks by using only 3 nodes out of given 4. This research indicates the potential to use QA/AI for HPC job-scheduling. Later, we will test a SLURM simulator program to draw further comparisons on the effectiveness of ATMapper's scheduling approach. The results of this comparison will serve as a baseline for later improving SLURM's performance using a QA-enhanced ATMapper approach.

Caraveo, Braulio [University of Huston - Clear Lak↗

NASA NTRS1992

Optical pattern recognition III; Proceedings of the Meeting, Orlando, FL, Apr. 21, 22, 1992

Consideration is given to transitioning of optical processing into systems (TOPS), optical correlator hardware, phase-only optical correlation filters, optical distortion-invariant correlation filters, and optical neural networks. Particular attention is given to a test target for optical correlators, a TOPS electronic warfare channelizer program, a portable video-rate optical correlator, a joint transform correlator employing electron trapping materials, a novelty filtered optical correlator using a photorefractive crystal, a comparison of correlation performance of smart ternary phase-amplitude filters with gray-scale and binary input scenes, real-time distortion-tolerant composite filters for automatic target identification, landscaping the correlation surface, fast designing of a circular harmonic filter using simulated annealing, feature-based correlation filters for distortion invariance, automatic target recognition using a feature-based optical neural network, and a holographic inner-product processor for pattern recognition.

Casasent, David P.↗

NASA NTRS1986

Towards automatic Markov reliability modeling of computer architectures

The analysis and evaluation of reliability measures using time-varying Markov models is required for Processor-Memory-Switch (PMS) structures that have competing processes such as standby redundancy and repair, or renewal processes such as transient or intermittent faults. The task of generating these models is tedious and prone to human error due to the large number of states and transitions involved in any reasonable system. Therefore model formulation is a major analysis bottleneck, and model verification is a major validation problem. The general unfamiliarity of computer architects with Markov modeling techniques further increases the necessity of automating the model formulation. This paper presents an overview of the Automated Reliability Modeling (ARM) program, under development at NASA Langley Research Center. ARM will accept as input a description of the PMS interconnection graph, the behavior of the PMS components, the fault-tolerant strategies, and the operational requirements. The output of ARM will be the reliability of availability Markov model formulated for direct use by evaluation programs. The advantages of such an approach are (a) utility to a large class of users, not necessarily expert in reliability analysis, and (b) a lower probability of human error in the computation.

Liceaga, C. A.↗

NASA NTRS2006

Development and Flight Testing of a Neural Network Based Flight Control System on the NF-15B Aircraft

The Intelligent Flight Control System (IFCS) project at the NASA Dryden Flight Research Center, Edwards AFB, CA, has been investigating the use of neural network based adaptive control on a unique NF-15B test aircraft. The IFCS neural network is a software processor that stores measured aircraft response information to dynamically alter flight control gains. In 2006, the neural network was engaged and allowed to learn in real time to dynamically alter the aircraft handling qualities characteristics in the presence of actual aerodynamic failure conditions injected into the aircraft through the flight control system. The use of neural network and similar adaptive technologies in the design of highly fault and damage tolerant flight control systems shows promise in making future aircraft far more survivable than current technology allows. This paper will present the results of the IFCS flight test program conducted at the NASA Dryden Flight Research Center in 2006, with emphasis on challenges encountered and lessons learned.

Bomben, Craig R.↗