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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 1,063 records · Page 59
All sourcesNASA NTRSDOE OSTI
NASA NTRS2007

Foods for a Mission to Mars: Equivalent System Mass and Development of a Multipurpose Small-Scale Seed Processor

The candidate crops for planetary food systems include: wheat, white and sweet potatoes, soybean, peanut, strawberry, dry bean including le ntil and pinto, radish, rice, lettuce, carrot, green onion, tomato, p eppers, spinach, and cabbage. Crops such as wheat, potatoes, soybean, peanut, dry bean, and rice can only be utilized after processing, while others are classified as ready-to-eat. To process foods in space, the food processing subsystem must be capable of producing a variety of nutritious, acceptable, and safe edible ingredients and food produ cts from pre-packaged and resupply foods as well as salad crops grown on the transit vehicle or other crops grown on planetary surfaces. D esigning, building, developing, and maintaining such a subsystem is b ound to many constraints and restrictions. The limited power supply, storage locations, variety of crops, crew time, need to minimize waste , and other equivalent system mass (ESM) parameters must be considere d in the selection of processing equipment and techniques.

Gandolph, J.↗
NASA NTRS1988

Staging memory for massively parallel processor

The invention herein relates to a computer organization capable of rapidly processing extremely large volumes of data. A staging memory is provided having a main stager portion consisting of a large number of memory banks which are accessed in parallel to receive, store, and transfer data words simultaneous with each other. Substager portions interconnect with the main stager portion to match input and output data formats with the data format of the main stager portion. An address generator is coded for accessing the data banks for receiving or transferring the appropriate words. Input and output permutation networks arrange the lineal order of data into and out of the memory banks.

Batcher, Kenneth E.↗
NASA NTRS2008

Benchmark Comparison of Dual- and Quad-Core Processor Linux Clusters with Two Global Climate Modeling Workloads

This viewgraph presentation details the science and systems environments that NASA High End computing program serves. Included is a discussion of the workload that is involved in the processing for the Global Climate Modeling. The Goddard Earth Observing System Model, Version 5 (GEOS-5) is a system of models integrated using the Earth System Modeling Framework (ESMF). The GEOS-5 system was used for the Benchmark tests, and the results of the tests are shown and discussed. Tests were also run for the Cubed Sphere system, results for these test are also shown.

McGalliard, James↗
NASA NTRS2010

Sabatier Reactor System Integration with Microwave Plasma Methane Pyrolysis Post-Processor for Closed-Loop Hydrogen Recovery

The Carbon Dioxide Reduction Assembly (CRA) designed and developed for the International Space Station (ISS) represents the state-of-the-art in carbon dioxide reduction (CDRe) technology. The CRA produces water and methane by reducing carbon dioxide with hydrogen via the Sabatier reaction. The water is recycled to the Oxygen Generation Assembly (OGA) and the methane is vented overboard resulting in a net loss of hydrogen. The proximity to earth and the relative ease of logistics resupply from earth allow for a semi-closed system on ISS. However, long-term manned space flight beyond low earth orbit (LEO) dictates a more thoroughly closed-loop system involving significantly higher recovery of hydrogen, and subsequent recovery of oxygen, to minimize costs associated with logistics resupply beyond LEO. The open-loop ISS system for CDRe can be made closed-loop for follow-on missions by further processing methane to recover hydrogen. For this purpose, a process technology has been developed that employs a microwave-generated plasma to reduce methane to hydrogen and acetylene resulting in 75% theoretical recovery of hydrogen. In 2009, a 1-man equivalent Plasma Pyrolysis Assembly (PPA) was delivered to the National Aeronautics and Space Administration (NASA) for technical evaluation. The PPA has been integrated with a Sabatier Development Unit (SDU). The integrated process configuration incorporates a sorbent bed to eliminate residual carbon dioxide and water vapor in the Sabatier methane product stream before it enters the PPA. This paper provides detailed information on the stand-alone and integrated performance of both the PPA and SDU. Additionally, the integrated test stand design and anticipated future work are discussed.

Abney, Morgan B.↗
NASA NTRS2011

SpaceCube 2.0: An Advanced Hybrid Onboard Data Processor

The SpaceCube 2.0 is a compact, high performance, low-power onboard processing system that takes advantage of cutting-edge hybrid (CPU/FPGA/DSP) processing elements. The SpaceCube 2.0 design concept includes two commercial Virtex-5 field-programmable gate array (FPGA) parts protected by gradiation hardened by software" technology, and possesses exceptional size, weight, and power characteristics [5x5x7 in., 3.5 lb (approximately equal to 12.7 x 12.7 x 17.8 cm, 1.6 kg) 5-25 W, depending on the application fs required clock rate]. The two Virtex-5 FPGA parts are implemented in a unique back-toback configuration to maximize data transfer and computing performance. Draft computing power specifications for the SpaceCube 2.0 unit include four PowerPC 440s (1100 DMIPS each), 500+ DSP48Es (2x580 GMACS), 100+ LVDS high-speed serial I/Os (1.25 Gbps each), and 2x190 GFLOPS single-precision (65 GFLOPS double-precision) floating point performance. The SpaceCube 2.0 includes PROM memory for CPU boot, health and safety, and basic command and telemetry functionality; RAM memory for program execution; and FLASH/EEPROM memory to store algorithms and application code for the CPU, FPGA, and DSP processing elements. Program execution can be reconfigured in real time and algorithms can be updated, modified, and/or replaced at any point during the mission. Gigabit Ethernet, Spacewire, SATA and highspeed LVDS serial/parallel I/O channels are available for instrument/sensor data ingest, and mission-unique instrument interfaces can be accommodated using a compact PCI (cPCI) expansion card interface. The SpaceCube 2.0 can be utilized in NASA Earth Science, Helio/Astrophysics and Exploration missions, and Department of Defense satellites for onboard data processing. It can also be used in commercial communication and mapping satellites.

Lin, Michael↗
NASA NTRS2006

Pre-Processor for Compression of Multispectral Image Data

A computer program that preprocesses multispectral image data has been developed to provide the Mars Exploration Rover (MER) mission with a means of exploiting the additional correlation present in such data without appreciably increasing the complexity of compressing the data.

Klimesh, Matthew↗
NASA NTRS2011

High-Throughput, Adaptive FFT Architecture for FPGA-Based Spaceborne Data Processors

Exponential growth in microelectronics technology such as field-programmable gate arrays (FPGAs) has enabled high-performance spaceborne instruments with increasing onboard data processing capabilities. As a commonly used digital signal processing (DSP) building block, fast Fourier transform (FFT) has been of great interest in onboard data processing applications, which needs to strike a reasonable balance between high-performance (throughput, block size, etc.) and low resource usage (power, silicon footprint, etc.). It is also desirable to be designed so that a single design can be reused and adapted into instruments with different requirements. The Multi-Pass Wide Kernel FFT (MPWK-FFT) architecture was developed, in which the high-throughput benefits of the parallel FFT structure and the low resource usage of Singleton s single butterfly method is exploited. The result is a wide-kernel, multipass, adaptive FFT architecture. The 32K-point MPWK-FFT architecture includes 32 radix-2 butterflies, 64 FIFOs to store the real inputs, 64 FIFOs to store the imaginary inputs, complex twiddle factor storage, and FIFO logic to route the outputs to the correct FIFO. The inputs are stored in sequential fashion into the FIFOs, and the outputs of each butterfly are sequentially written first into the even FIFO, then the odd FIFO. Because of the order of the outputs written into the FIFOs, the depth of the even FIFOs, which are 768 each, are 1.5 times larger than the odd FIFOs, which are 512 each. The total memory needed for data storage, assuming that each sample is 36 bits, is 2.95 Mbits. The twiddle factors are stored in internal ROM inside the FPGA for fast access time. The total memory size to store the twiddle factors is 589.9Kbits. This FFT structure combines the benefits of high throughput from the parallel FFT kernels and low resource usage from the multi-pass FFT kernels with desired adaptability. Space instrument missions that need onboard FFT capabilities such as the proposed DESDynl, SWOT (Surface Water Ocean Topography), and Europa sounding radar missions would greatly benefit from this technology with significant reductions in non-recurring cost and risk.

NguyenKobayashi, Kayla↗
NASA NTRS2012

MER Telemetry Processor

MERTELEMPROC processes telemetered data in data product format and generates Experiment Data Records (EDRs) for many instruments (HAZCAM, NAVCAM, PANCAM, microscopic imager, Moessbauer spectrometer, APXS, RAT, and EDLCAM) on the Mars Exploration Rover (MER). If the data is compressed, then MERTELEMPROC decompresses the data with an appropriate decompression algorithm. There are two compression algorithms (ICER and LOCO) used in MER. This program fulfills a MER specific need to generate Level 1 products within a 60-second time requirement. EDRs generated by this program are used by merinverter, marscahv, marsrad, and marsjplstereo to generate higher-level products for the mission operations. MERTELEPROC was the first GDS program to process the data product. Metadata of the data product is in XML format. The software allows user-configurable input parameters, per-product processing (not streambased processing), and fail-over is allowed if the leading image header is corrupted. It is used within the MER automated pipeline. MERTELEMPROC is part of the OPGS (Operational Product Generation Subsystem) automated pipeline, which analyzes images returned by in situ spacecraft and creates level 1 products to assist in operations, science, and outreach.

Lee, Hyun H.↗
NASA NTRS2014

Processor Units Reduce Satellite Construction Costs

As part of the effort to build the Fast Affordable Science and Technology Satellite (FASTSAT), Marshall Space Flight Center developed a low-cost telemetry unit which is used to facilitate communication between a satellite and its receiving station. Huntsville, Alabama-based Orbital Telemetry Inc. has licensed the NASA technology and is offering to install the cost-cutting units on commercial satellites.

Source record↗
NASA NTRS2013

Phoenix Telemetry Processor

Phxtelemproc is a C/C++ based telemetry processing program that processes SFDU telemetry packets from the Telemetry Data System (TDS). It generates Experiment Data Records (EDRs) for several instruments including surface stereo imager (SSI); robotic arm camera (RAC); robotic arm (RA); microscopy, electrochemistry, and conductivity analyzer (MECA); and the optical microscope (OM). It processes both uncompressed and compressed telemetry, and incorporates unique subroutines for the following compression algorithms: JPEG Arithmetic, JPEG Huffman, Rice, LUT3, RA, and SX4. This program was in the critical path for the daily command cycle of the Phoenix mission. The products generated by this program were part of the RA commanding process, as well as the SSI, RAC, OM, and MECA image and science analysis process. Its output products were used to advance science of the near polar regions of Mars, and were used to prove that water is found in abundance there. Phxtelemproc is part of the MIPL (Multi-mission Image Processing Laboratory) system. This software produced Level 1 products used to analyze images returned by in situ spacecraft. It ultimately assisted in operations, planning, commanding, science, and outreach.

Stanboli, Alice↗
NASA NTRS2014

Kalman Filter Input Processor for Boresight Calibration

Ka-band ranging provides the phase center (PC) to phase center range, which needs to be converted to the center of mass (CM) to center of mass range. Nominally, both PC and CM lie on the line connecting the spacecraft GRAIL A and GRAIL B. In this case, the conversion should be done simply by adding the CM-to-PC distance L to the measured range for both spacecraft. However, due to various technical reasons, such as displacement of the true CM from its nominal position in the SRF, or spacecraft attitude fluctuations, the PC and CM define a unit vector that may be different from the nominal line of sight. The objectives of the software are to determine the actual line of sight direction for each spacecraft and correct the previously recorded range data, and to provide instructions for how to maneuver each spacecraft to make necessary attitude corrections.

Strekalov, Dmitry↗
NASA NTRS2010

A High-Throughput, Adaptive FFT Architecture for FPGA-Based Space-Borne Data Processors

Historically, computationally-intensive data processing for space-borne instruments has heavily relied on ground-based computing resources. But with recent advances in functional densities of Field-Programmable Gate-Arrays (FPGAs), there has been an increasing desire to shift more processing on-board; therefore relaxing the downlink data bandwidth requirements. Fast Fourier Transforms (FFTs) are commonly used building blocks for data processing applications, with a growing need to increase the FFT block size. Many existing FFT architectures have mainly emphasized on low power consumption or resource usage; but as the block size of the FFT grows, the throughput is often compromised first. In addition to power and resource constraints, space-borne digital systems are also limited to a small set of space-qualified memory elements, which typically lag behind the commercially available counterparts in capacity and bandwidth. The bandwidth limitation of the external memory creates a bottleneck for a large, high-throughput FFT design with large block size. In this paper, we present the Multi-Pass Wide Kernel FFT (MPWK-FFT) architecture for a moderately large block size (32K) with considerations to power consumption and resource usage, as well as throughput. We will also show that the architecture can be easily adapted for different FFT block sizes with different throughput and power requirements. The result is completely contained within an FPGA without relying on external memories. Implementation results are summarized.

Nguyen, Kayla↗