Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “interconnection”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 1,063 records · Page 59
All sourcesNASA NTRSDOE OSTI
NASA NTRS2009

NASA-DoD Lead-Free Electronics Project

In response to concerns about risks from lead-free induced faults to high reliability products, NASA has initiated a multi-year project to provide manufacturers and users with data to clarify the risks of lead-free materials in their products. The project will also be of interest to component manufacturers supplying to high reliability markets. The project was launched in November 2006. The primary technical objective of the project is to undertake comprehensive testing to generate information on failure modes/criteria to better understand the reliability of: (1) Packages (e.g., Thin Small Outline Package [TSOP], Ball Grid Array [BGA], Plastic Dual In-line Package [PDIP]) assembled and reworked with solder interconnects consisting of lead-free alloys (2) Packages (e.g., TSOP, BGA, PDIP) assembled and reworked with solder interconnects consisting of mixed alloys, lead component finish/lead-free solder and lead-free component finish/SnPb solder

Kessel, Kurt↗
NASA NTRS2009

NASA-DoD Lead-Free Electronics Project

In response to concerns about risks from lead-free induced faults to high reliability products, NASA has initiated a multi-year project to provide manufacturers and users with data to clarify the risks of lead-free materials in their products. The project will also be of interest to component manufacturers supplying to high reliability markets. The project was launched in November 2006. The primary technical objective of the project is to undertake comprehensive testing to generate information on failure modes/criteria to better understand the reliability of: - Packages (e.g., TSOP, BOA, PDIP) assembled and reworked with solder interconnects consisting of lead-free alloys - Packages (e.g., TSOP, BOA, PDIP) assembled and reworked with solder interconnects consisting of mixed alloys, lead component finish/lead-free solder and lead-free component finish/SnPb solder.

Kessel, Kurt R.↗
NASA NTRS2013

Packaging Technologies for High Temperature Electronics and Sensors

This paper reviews ceramic substrates and thick-film metallization based packaging technologies in development for 500 C silicon carbide (SiC) electronics and sensors. Prototype high temperature ceramic chip-level packages and printed circuit boards (PCBs) based on ceramic substrates of aluminum oxide (Al2O3) and aluminum nitride (AlN) have been designed and fabricated. These ceramic substrate-based chip-level packages with gold (Au) thick-film metallization have been electrically characterized at temperatures up to 550 C. A 96% alumina based edge connector for a PCB level subsystem interconnection has also been demonstrated recently. The 96% alumina packaging system composed of chip-level packages and PCBs has been tested with high temperature SiC devices at 500 C for over 10,000 hours. In addition to tests in a laboratory environment, a SiC JFET with a packaging system composed of a 96% alumina chip-level package and an alumina printed circuit board mounted on a data acquisition circuit board was launched as a part of the MISSE-7 suite to the International Space Station via a Shuttle mission. This packaged SiC transistor was successfully tested in orbit for eighteen months. A spark-plug type sensor package designed for high temperature SiC capacitive pressure sensors was developed. This sensor package combines the high temperature interconnection system with a commercial high temperature high pressure stainless steel seal gland (electrical feed-through). Test results of a packaged high temperature capacitive pressure sensor at 500 C are also discussed. In addition to the pressure sensor package, efforts for packaging high temperature SiC diode-based gas chemical sensors are in process.

Chen, Liang-Yu↗
NASA NTRS2013

Packaging Technologies for High Temperature Electronics and Sensors

This paper reviews ceramic substrates and thick-film metallization based packaging technologies in development for 500degC silicon carbide (SiC) electronics and sensors. Prototype high temperature ceramic chip-level packages and printed circuit boards (PCBs) based on ceramic substrates of aluminum oxide (Al2O3) and aluminum nitride (AlN) have been designed and fabricated. These ceramic substrate-based chiplevel packages with gold (Au) thick-film metallization have been electrically characterized at temperatures up to 550degC. A 96% alumina based edge connector for a PCB level subsystem interconnection has also been demonstrated recently. The 96% alumina packaging system composed of chip-level packages and PCBs has been tested with high temperature SiC devices at 500degC for over 10,000 hours. In addition to tests in a laboratory environment, a SiC JFET with a packaging system composed of a 96% alumina chip-level package and an alumina printed circuit board mounted on a data acquisition circuit board was launched as a part of the MISSE-7 suite to the International Space Station via a Shuttle mission. This packaged SiC transistor was successfully tested in orbit for eighteen months. A spark-plug type sensor package designed for high temperature SiC capacitive pressure sensors was developed. This sensor package combines the high temperature interconnection system with a commercial high temperature high pressure stainless steel seal gland (electrical feed-through). Test results of a packaged high temperature capacitive pressure sensor at 500degC are also discussed. In addition to the pressure sensor package, efforts for packaging high temperature SiC diode-based gas chemical sensors are in process.

Electronic packaging↗
NASA NTRS2014

Passive Resonant Bidirectional Converter with Galvanic Barrier

A passive resonant bidirectional converter system that transports energy across a galvanic barrier includes a converter using at least first and second converter sections, each section including a pair of transfer terminals, a center tapped winding; a chopper circuit interconnected between the center tapped winding and one of the transfer terminals; an inductance feed winding interconnected between the other of the transfer terminals and the center tap and a resonant tank circuit including at least the inductance of the center tap winding and the parasitic capacitance of the chopper circuit for operating the converter section at resonance; the center tapped windings of the first and second converter sections being disposed on a first common winding core and the inductance feed windings of the first and second converter sections being disposed on a second common winding core for automatically synchronizing the resonant oscillation of the first and second converter sections and transferring energy between the converter sections until the voltage across the pairs of transfer terminals achieves the turns ratio of the center tapped windings.

Rosenblad, Nathan S.↗
NASA NTRS2014

The Link Between Shocks, Turbulence, and Magnetic Reconnection in Collisionless Plasmas

Global hybrid (electron fluid, kinetic ions) and fully kinetic simulations of the magnetosphere have been used to show surprising interconnection between shocks, turbulence and magnetic reconnection. In particular collisionless shocks with their reflected ions that can get upstream before retransmission can generate previously unforeseen phenomena in the post shocked flows: (i) formation of reconnecting current sheets and magnetic islands with sizes up to tens of ion inertial length. (ii) Generation of large scale low frequency electromagnetic waves that are compressed and amplified as they cross the shock. These 'wavefronts' maintain their integrity for tens of ion cyclotron times but eventually disrupt and dissipate their energy. (iii) Rippling of the shock front, which can in turn lead to formation of fast collimated jets extending to hundreds of ion inertial lengths downstream of the shock. The jets, which have high dynamical pressure, 'stir' the downstream region, creating large scale disturbances such as vortices, sunward flows, and can trigger flux ropes along the magnetopause. This phenomenology closes the loop between shocks, turbulence and magnetic reconnection in ways previously unrealized. These interconnections appear generic for the collisionless plasmas typical of space, and are expected even at planar shocks, although they will also occur at curved shocks as occur at planets or around ejecta.

MAGNETOSPHERE↗
NASA NTRS2015

Sparsely-Bonded CMOS Hybrid Imager

A method and device for imaging or detecting electromagnetic radiation is provided. A device structure includes a first chip interconnected with a second chip. The first chip includes a detector array, wherein the detector array comprises a plurality of light sensors and one or more transistors. The second chip includes a Read Out Integrated Circuit (ROIC) that reads out, via the transistors, a signal produced by the light sensors. A number of interconnects between the ROIC and the detector array can be less than one per light sensor or pixel.

Cunningham, Thomas J.↗
NASA NTRS2016

Reactive Orthotropic Lattice Diffuser for Noise Reduction

An orthotropic lattice structure interconnects porous surfaces of the flap with internal lattice-structured perforations to equalize the steady pressure field on the flap surfaces adjacent to the end and to reduce the amplitude of the fluctuations in the flow field near the flap end. The global communication that exists within all of the perforations provides the mechanism to lessen the pressure gradients experienced by the end portion of the flap. In addition to having diffusive effects (diffusing the incoming flow), the three-dimensional orthogonal lattice structure is also reactive (acoustic wave phase distortion) due to the interconnection of the perforations.

Khorrami, Mehdi R.↗
NASA NTRS2016

Multi-Dimensional Damage Detection

Methods and systems may provide for a structure having a plurality of interconnected panels, wherein each panel has a plurality of detection layers separated from one another by one or more non-detection layers. The plurality of detection layers may form a grid of conductive traces. Additionally, a monitor may be coupled to each grid of conductive traces, wherein the monitor is configured to detect damage to the plurality of interconnected panels in response to an electrical property change with respect to one or more of the conductive traces. In one example, the structure is part of an inflatable space platform such as a spacecraft or habitat.

Gibson, Tracy L.↗
NASA NTRS2016

Multi-Dimensional Damage Detection

Methods and systems may provide for a structure having a plurality of interconnected panels, wherein each panel has a plurality of detection layers separated from one another by one or more non-detection layers. The plurality of detection layers may form a grid of conductive traces. Additionally, a monitor may be coupled to each grid of conductive traces, wherein the monitor is configured to detect damage to the plurality of interconnected panels in response to an electrical property change with respect to one or more of the conductive traces. In one example, the structure is part of an inflatable space platform such as a spacecraft or habitat.

Gibson, Tracy L.↗
NASA NTRS2016

Processing and Characterization of Thousand-Hour 500 C Durable 4H-SiC JFET Integrated Circuits

This work reports fabrication and testing of integrated circuits (ICs) with two levels of interconnect that consistently achieve greater than 1000 hours of stable electrical operation at 500 C in air ambient. These ICs are based on 4H-SiC junction field effect transistor (JFET) technology that integrates hafnium ohmic contacts with TaSi2 interconnects and SiO2 and Si3N4 dielectric layers over approximately 1-micrometer scale vertical topology. Following initial burn-in, important circuit parameters remain stable for more than 1000 hours of 500 C operational testing. These results advance the technology foundation for realizing long-term durable 500 C ICs with increased functional capability for sensing and control combustion engine, planetary, deep-well drilling, and other harsh-environment applications.

Microelectronics↗
NASA NTRS2016

Processing and Characterization of Thousand-Hour 500 C Durable 4H-SiC JFET Integrated Circuits

This work reports fabrication and testing of integrated circuits (ICs) with two levels of interconnect that consistently achieve greater than 1000 hours of stable electrical operation at 500 C in air ambient. These ICs are based on 4H-SiC junction field effect transistor (JFET) technology that integrates hafnium ohmic contacts with TaSi2 interconnects and SiO2 and Si3N4 dielectric layers over 1-m scale vertical topology. Following initial burn-in, important circuit parameters remain stable for more than 1000 hours of 500 C operational testing. These results advance the technology foundation for realizing long-term durable 500 C ICs with increased functional capability for sensing and control combustion engine, planetary, deep-well drilling, and other harsh-environment applications.

JFET↗
NASA NTRS2017

Human Mars Mission Design - The Ultimate Systems Challenge

A human mission to Mars will occur at some time in the coming decades. When it does, it will be the end result of a complex network of interconnected design choices, systems analyses, technical optimizations, and non-technical compromises. This mission will extend the technologies, engineering design, and systems analyses to new limits, and may very well be the most complex undertaking in human history. It can be illustrated as a large menu, or as a large decision tree. Whatever the visualization tool, there are numerous design decisions required to assemble a human Mars mission, and many of these interconnect with one another. This paper examines these many decisions and further details a number of choices that are highly interwoven throughout the mission design. The large quantity of variables and their interconnectedness results in a highly complex systems challenge, and the paper illustrates how a change in one variable results in ripples (sometimes unintended) throughout many other facets of the design. The paper concludes with a discussion of some mission design variables that can be addressed first, and those that have already been addressed as a result of ongoing National Aeronautics and Space Administration (NASA) developments, or as a result of decisions outside the technical arena. It advocates the need for a 'reference design' that can be used as a point of comparison, and to illustrate the system-wide impacts as design variables change.

Connolly, John F.↗
NASA NTRS2017

Axiomatic Design of Space Life Support Systems

Systems engineering is an organized way to design and develop systems, but the initial system design concepts are usually seen as the products of unexplained but highly creative intuition. Axiomatic design is a mathematical approach to produce and compare system architectures. The two axioms are:- Maintain the independence of the functional requirements.- Minimize the information content (or complexity) of the design. The first axiom generates good system design structures and the second axiom ranks them. The closed system human life support architecture now implemented in the International Space Station has been essentially unchanged for fifty years. In contrast, brief missions such as Apollo and Shuttle have used open loop life support. As mission length increases, greater system closure and increased recycling become more cost-effective.Closure can be gradually increased, first recycling humidity condensate, then hygiene wastewater, urine, carbon dioxide, and water recovery brine. A long term space station or planetary base could implement nearly full closure, including food production. Dynamic systems theory supports the axioms by showing that fewer requirements, fewer subsystems, and fewer interconnections all increase system stability. If systems are too complex and interconnected, reliability is reduced and operations and maintenance become more difficult. Using axiomatic design shows how the mission duration and other requirements determine the best life support system design including the degree of closure.

Axiomatic design↗
NASA NTRS2018

Yearlong 500 C Operational Demonstration of Up-Scaled 4H-SiC JFET Integrated Circuits

This work describes recent progress in the design, processing, and testing of significantly up-scaled 500 C durable 4H-SiC junction field effect transistor (JFET) integrated circuit (IC) technology with two-level interconnect undergoing development at NASA Glenn Research Center. For the first time, stable electrical operation of semiconductor ICs for over one year at 500 C in air atmosphere is reported. These groundbreaking durability results were attained on two-level interconnect JFET demonstration ICs with 175 or more transistors on each chip. This corresponds to a more than 7-fold increase in 500 C-durable circuit complexity from the 24 transistor ring oscillator ICs reported at HiTEC 2016. These results advance the technology foundation for realizing long-term durable 500 C ICs with increased functional capability for combustion engine sensing and control, planetary exploration, deep-well drilling monitoring, and other harsh-environment applications.

Silicon carbides↗
NASA NTRS2018

Multi-Dimensional Damage Detection

Methods and systems may provide for a structure having a plurality of interconnected panels, wherein each panel has a plurality of detection layers separated from one another by one or more non-detection layers. The plurality of detection layers may form a grid of conductive traces. Additionally, a monitor may be coupled to each grid of conductive traces, wherein the monitor is configured to detect damage to the plurality of interconnected panels in response to an electrical property change with respect to one or more of the conductive traces. In one example, the structure is part of an inflatable space platform such as a spacecraft or habitat.

Gibson, Tracy L.↗
NASA NTRS2018

The Way to the Future Has Already Started: ICAO Aeronautical Telecommunication Network (ATN) Using Internet Protocol Suite (IPS) Standards and Protocol Evolution Update

Millions of people are able to exchange information over phones, computers, tablets and an array of new interconnected devices such as sensors, cameras, home appliances and others are increasingly becoming networked. At the core of this sizeable interconnection is a set of underlying protocols that enable millions of devices to seamlessly talk to each other. Aviation, as many other industries have, utilizes the internet protocol for ground-to-ground network communications and efforts are underway to bring it to the cockpit.In 2015, the International Civil Aviation Organization (ICAO) published the second edition of Document 9896 (Doc 9896) titled: Manual on the Aeronautical Telecommunication Network (ATN) using Internet Protocol Suite (IPS) Standards and Protocol. This manual adopted the Internet protocol version 6 (IPv6) for Internet layer interoperability. Document 9896 defined data communications protocols and services to be used for implementing aeronautical telecommunication network (ATN) using the Internet protocol suite (IPS). The document provided technical specifications that addressed security, network and transport protocols, described applications, supported by ATN/IPS and provided communications guidance. The international aviation community working under the guidance of ICAO initiated work on updates to Doc 9896. Under the ICAO Communication Panel, Working Group Internetworking (WG-I) got this challenging task. Key areas of work for WG-I are related to ATN/IPS Security and ANT/IPS Mobility. Two sub-groups have been assembled to work on these elements. The ICAO anticipates the release of updated Doc 9896 in 2020. Additional ATN/IPS standardization efforts include Radio Technical Commission for Aeronautics Special Committee 223 (RTCA SC-223) IPS profile development, Airlines Electronic Engineering Committee (AEEC) A658 Roadmap of IPS future activities and European Organization for Civil Aviation Equipment (EUROCAE) WG-108 development of guidance documentation.This paper describes ICAO WG-I approach to update key areas of the document in closed coordination with AEEC, RTCA and EUROCAE committees supporting the development of ATN/IPS. Additionally, the paper will explore WG-I mobility solutions under investigation, security developments, IPv6 addressing challenges and other proposed updates. Finally, as new operational expectations such as Free Route and Remote Piloted Aircraft System integration are currently pushing the boundaries set by old operational concepts, the paper identifies the emerging new challenges that will drive the ATN/IPS development beyond 2020. They are related to future voice utilization, System Wide Information Management and Remotely Piloted Aircraft System deployment. IPS systems are seen as the only way forward.

Apaza, Rafael↗
NASA NTRS2018

Yearlong 500 °C Operational Demonstration of Up-Scaled 4H-SiC JFET Integrated Circuits

This work describes recent progress in the design, processing, upscaling, and testing of 500°C durable two-level interconnect 4H-SiC JFET IC technology undergoing development at NASA Glenn Research Center. For the first time, stable electrical operation of semiconductor ICs for 1 year (8760 hours) at 500°C in air atmosphere is reported. These groundbreaking durability results were attained on two-level interconnect JFET demonstration ICs with 175 or more transistors on each chip. This corresponds to a more than 7-fold increase in 500°C-durable circuit complexity from the 24 transistor ring oscillator ICs reported at HiTEC 2016.

Neudeck, Philip G.↗