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At least 1,063 records · Page 59

Power Supply Changes for NSTX Resistive Wall Mode Coils

The National Spherical Torus Experiment (NSTX) has been designed and installed in the existing facilities at Princeton Plasma Physics Laboratory (PPPL). Most of the hardware, plant facilities, auxiliary sub-systems, and power systems originally used for the Tokamak Fusion Test Reactor (TFTR) have been used with suitable modifications to reflect NSTX needs. Prior to 2004, the NSTX power system was feeding twelve (12) circuits in the machine. In 2004 the Resistive Wall Mode (RWM) Coils were installed on the machine to correct error fields. There are six of these coils installed around the machine in the mid-plane. Since these coils need fast and accurate controls, a Switching Power Amplifier (SPA) with three sub-units was procured, installed and commissioned along with other power loop components. Two RWM Coils were connected in series and fed from one SPA sub-unit. After the initial RWM campaign, operational requirements evolved such that each of the RWM coils now requires separate power and control. Hence a second SPA with three sub-units has been procured and installed. The second unit is of improved design and has the controls and power components completely isolated. The existing thyristor rectifier is used as DC Link to both of the Switching Power Amplifiers. The controls for the RWM are integrated into the overall computer control of the DC Power systems for NSTX. This paper describes the design changes in the RWM Power system for NSTX.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY↗

Decoding and optimized implementation of SECDED codes over GF(q)

A plurality of columns for a check matrix that implements a distance d linear error correcting code are populated by providing a set of vectors from which to populate the columns, and applying to the set of vectors a filter operation that reduces the set by eliminating therefrom all vectors that would, if used to populate the columns, prevent the check matrix from satisfying a column-wise linear independence requirement associated with check matrices of distance d linear codes. One of the vectors from the reduced set may then be selected to populate one of the columns. The filtering and selecting repeats iteratively until either all of the columns are populated or the number of currently unpopulated columns exceeds the number of vectors in the reduced set. Columns for the check matrix may be processed to reduce the amount of logic needed to implement the check matrix in circuit logic.

97 MATHEMATICS AND COMPUTING↗

Design, decoding and optimized implementation of SECDED codes over GF(q)

A plurality of columns for a check matrix that implements a distance d linear error correcting code are populated by providing a set of vectors from which to populate the columns, and applying to the set of vectors a filter operation that reduces the set by eliminating therefrom all vectors that would, if used to populate the columns, prevent the check matrix from satisfying a column-wise linear independence requirement associated with check matrices of distance d linear codes. One of the vectors from the reduced set may then be selected to populate one of the columns. The filtering and selecting repeats iteratively until either all of the columns are populated or the number of currently unpopulated columns exceeds the number of vectors in the reduced set. Columns for the check matrix may be processed to reduce the amount of logic needed to implement the check matrix in circuit logic.

97 MATHEMATICS AND COMPUTING↗

Decoding and optimized implementation of SECDED codes over GF(q)

A plurality of columns for a check matrix that implements a distance d linear error correcting code are populated by providing a set of vectors from which to populate the columns, and applying to the set of vectors a filter operation that reduces the set by eliminating therefrom all vectors that would, if used to populate the columns, prevent the check matrix from satisfying a column-wise linear independence requirement associated with check matrices of distance d linear codes. One of the vectors from the reduced set may then be selected to populate one of the columns. The filtering and selecting repeats iteratively until either all of the columns are populated or the number of currently unpopulated columns exceeds the number of vectors in the reduced set. Columns for the check matrix may be processed to reduce the amount of logic needed to implement the check matrix in circuit logic.

97 MATHEMATICS AND COMPUTING↗

Translating Non-Trivial Algorithms from the Circuit Model to the Measurement

We provide a set of prescriptions for implementing a circuit model algorithm as measurement based quantum computing via a large discrete cluster state constructed sequentially, from qubits implemented as single photons. We describe a large optical discrete graph state capable of searching logical 4 and 8 element lists as an example. To do so we have developed several prescriptions based on analytic evaluation of the evolution of discrete cluster states and graph state equations. We describe the cluster state as a sequence of repeated entanglement and measurement steps using a small number of single photons for each step. These prescriptions can be generalized to implement any logical circuit model operation with appropriate single photon measurements and feed forward error corrections. Such a cluster state is not guaranteed to be optimal (i.e. minimum number of photons, measurements, run time).

Smith, IV, Amos M↗

BBMap: A Fast, Accurate, Splice-Aware Aligner

Alignment of reads is one of the primary computational tasks in bioinformatics. Of paramount importance to resequencing, alignment is also crucial to other areas - quality control, scaffolding, string-graph assembly, homology detection, assembly evaluation, error-correction, expression quantification, and even as a tool to evaluate other tools. An optimal aligner would greatly improve virtually any sequencing process, but optimal alignment is prohibitively expensive for gigabases of data. Here, we will present BBMap [1], a fast splice-aware aligner for short and long reads. We will demonstrate that BBMap has superior speed, sensitivity, and specificity to alternative high-throughput aligners bowtie2 [2], bwa [3], smalt, [4] GSNAP [5], and BLASR [6].

09 BIOMASS FUELS↗

Combined group ECC protection and subgroup parity protection

A method and system are disclosed for providing combined error code protection and subgroup parity protection for a given group of n bits. The method comprises the steps of identifying a number, m, of redundant bits for said error protection; and constructing a matrix P, wherein multiplying said given group of n bits with P produces m redundant error correction code (ECC) protection bits, and two columns of P provide parity protection for subgroups of said given group of n bits. In the preferred embodiment of the invention, the matrix P is constructed by generating permutations of m bit wide vectors with three or more, but an odd number of, elements with value one and the other elements with value zero; and assigning said vectors to rows of the matrix P.

97 MATHEMATICS AND COMPUTING↗

Programming Non-Trivial Algorithms in the Measurement Based Quantum Computation Model

We provide a set of prescriptions for implementing a quantum circuit model algorithm as measurement based quantum computing (MBQC) algorithm1, 2 via a large cluster state. As means of illustration we draw upon our numerical modeling experience to describe a large graph state capable of searching a logical 8 element list (a non-trivial version of Grover's algorithm3 with feedforward). We develop several prescriptions based on analytic evaluation of cluster states and graph state equations which can be generalized into any circuit model operations. Such a resulting cluster state will be able to carry out the desired operation with appropriate measurements and feed forward error correction. We also discuss the physical implementation and the analysis of the principal 3-qubit entangling gate (Toffoli) required for a non-trivial feedforward realization of an 8-element Grover search algorithm.

Alsing, Paul↗

In-memory interconnect protocol configuration registers

Systems, apparatuses, and methods for moving the interconnect protocol configuration registers into the main memory space of a node. The region of memory used for storing the interconnect protocol configuration registers may also be made cacheable to reduce the latency of accesses to the interconnect protocol configuration registers. Interconnect protocol configuration registers which are used during a startup routine may be prefetched into the host's cache to make the startup routine more efficient. The interconnect protocol configuration registers for various interconnect protocols may include one or more of device capability tables, memory-side statistics (e.g., to support two-level memory data mapping decisions), advanced memory and interconnect features such as repair resources and routing tables, prefetching hints, error correcting code (ECC) bits, lists of device capabilities, set and store base address, capability, device ID, status, configuration, capabilities, and other settings.

97 MATHEMATICS AND COMPUTING↗

Combined group ECC protection and subgroup parity protection

A method and system are disclosed for providing combined error code protection and subgroup parity protection for a given group of n bits. The method comprises the steps of identifying a number, m, of redundant bits for said error protection; and constructing a matrix P, wherein multiplying said given group of n bits with P produces m redundant error correction code (ECC) protection bits, and two columns of P provide parity protection for subgroups of said given group of n bits. In the preferred embodiment of the invention, the matrix P is constructed by generating permutations of m bit wide vectors with three or more, but an odd number of, elements with value one and the other elements with value zero; and assigning said vectors to rows of the matrix P.

97 MATHEMATICS AND COMPUTING↗

In-Place Zero-Space Memory Protection for CNN

Convolutional Neural Networks (CNN) are being actively explored for safetycritical applications such as autonomous vehicles and aerospace, where it is essential to ensure the reliability of inference results in the presence of possible memory faults. Traditional methods such as error correction codes (ECC) and Triple Modular Redundancy (TMR) are CNN-oblivious and incur substantial memory overhead and energy cost. This paper introduces in-place zero-space ECC assisted with a new training scheme weight distribution-oriented training. The new method provides the first known zero space cost memory protection for CNNs without compromising the reliability offered by traditional ECC.

Guan, Hui↗

Cyclic Prefix Direct Sequence Spread Spectrum Capacity Analysis

Cyclic Prefix Direct Sequence Spread Spectrum (CP-DSSS) is a novel waveform that has the potential to solve 5G objectives such as ultra reliable low latency communication (URLLC) and massive machine Type Communication (mMTC). This paper analyzes the capacity of the CP-DSSS waveform in comparison with Orthogonal Frequency Domain Multiplexing OFDM). CP-DSSS can be optimized to achieve the same capacity as OFDM when optimized by the water-filling algorithm. A significant advantage for CP-DSSS is that this capacity can be achieved with all symbols being transmitted with the same effective rate. As a result, stronger forward error correction codes can be used in a CP-DSSS implementation compared to an OFDM implementation with resource block constraints. In addition, the applicability of CP-DSSS as a waveform for a secondary network operating in the same frequency band as the primary network is discussed.

5G and Beyond Communications↗

Robustness of Gauge Digitization to Quantum Noise

Quantum noise limits the use of quantum memory in high energy physics simulations. In particular, it breaks the gauge symmetry of stored quantum states. We examine this effect for abelian and nonabelian theories and demonstrate that optimizing the digitization of gauge theories to quantum memory to account for noise channels can extend the lifetime before complete loss of gauge symmetry by $2-10\times$ over some other digitizations. These constructions also allow for quantum error correction to integrate the symmetries of quantum fields and prioritize the largest gauge violations.

Gustafson, Erik J.↗

Exploration of Optimizing FPGA-based Qubit Controller for Experiments on Superconducting Quantum Computing Hardware

This work explores avenues and target areas for optimizing FPGA-based control hardware for experiments conducted on superconducting quantum computing systems and serves as an introduction to some of the current research at the intersection of classical and quantum computing hardware. With the promise of building larger-scale error-corrected quantum computers based on superconducting qubit architecture, innovations to room-temperature control electronics are needed to bring these quantum realizations to fruition. The QICK (Quantum Instrumentation Control Kit) is one leading experimental FPGA-based implementations. However, its integration into other experimental quantum computing architectures, especially those using superconducting radiofrequency (SRF) cavities, is largely unexplored. We identify some key target areas for optimizing control electronics for superconducting qubit architectures and provide some preliminary results to the resolution of a control pulse waveform. With optimizations targeted at 3D superconducting qubit setups, we hope to bring to light some of the requirements in classical computational methodologies to bring out the full potential of this quantum computing architecture, and to convey the excitement of progress in this research.

43 PARTICLE ACCELERATORS↗

Method and apparatus for data protection in memory devices

An apparatus and method for efficiently transmitting data are described. A transmitter sends data to a receiver. An encoder of the transmitter divides a received first block of data into multiple sub-blocks. The encoder selects a portion of each sub-block to compare to one another. A portion in a particular sub-block has a same offset and a same size as other portions of other sub-blocks. If the encoder determines the multiple portions match one another, the encoder sends, to the receiver, a second block of data corresponding to the first block of data. The second block of data has a same size as a size of the received first block of data, and the second block of data includes security data from one of multiple error correction schemes. Therefore, the second block of data provides security without increasing an amount of data to transmit.

SeyedzadehDelcheh, SeyedMohammad↗

Suppression of quasiparticle poisoning in transmon qubits by gap engineering

The performance of various superconducting devices operating at ultra-low temperatures is impaired by the presence of non-equilibrium quasiparticles. Inelastic quasiparticle (QP) tunneling across Josephson junctions in superconducting qubits results in decoherence and spurious excitations and, notably, can trigger correlated errors that severely impede quantum error correction. In this work, we use "gap engineering" to suppress the tunneling of low-energy quasiparticles in Al-based transmon qubits, a leading building block for superconducting quantum processors. By implementing potential barriers for QP, we strongly suppress QP tunneling across the junction and preserve charge parity for over $10^3$ seconds. The suppression of QP tunneling also results in a reduction in the qubit energy relaxation rates. The demonstrated approach to gap engineering can be easily implemented in all Al-based circuits with Josephson junctions.

Kamenov, Plamen↗

System and method for simulating turbulence

A system and method for simulation of fluid flow. The system being configured to remove loops in a vortex filament in a simulation model and reconnect the filament. The system may also be configured to model fluid flow in relation to a moving object and to correct errors in surface vorticity.

Krispin, Jacob↗

Bridging the time scale in exascale computing of chemical systems (Final Technical Report)

This report summarizes the work carried out with support of the United States Department of Energy under Award DE-SC0019441. The theme of this project was to develop and apply methods that allowed for the acceleration of atomistic calculations, particularly in challenging areas such as multiphase systems, electrified interfaces, uncertainty estimation, and applications requiring chemical accuracy, which tend to be applications where simulation time is severely bottlenecked by the computational time requirements. Much of the focus was on the application of emerging machine-learning methodologies, although a wide range of methodologies were employed. This report has two major sections. The first focuses on the methodological advances themselves. Within this part, we report a number of major advances, a few examples of which are described here. We report the first machine-learning scheme for the acceleration of electronically grand-canonical calculations (that is, those applicable to electrochemistry). We report new methods of performing transfer learning, in which physics-based priors can be used to provide predictions, often with uncertainty estimates, of images well outside of training sets; we also offer ways to fine-tune these transfer-learning models. We provide a new systematic means to generate and apply minimal training data sets to very large (10,000’s of atoms) systems, with only small training sets appropriate for electronic structure. We developed new methodologies to integrate surface vibrations into surface adsorption calculations. We made advances to the applicability of diffusion Monte Carlo methods to allow (learned) force prediction, finite-size error correction, and force-free means of searching for transition states. We integrated machine-learned atomistic predictions into mechanism generation codes. Additionally, we released new software including AmpTorch, a modernized version of our original atomistic machine-learning code Amp. The second part of this report focuses on the scientific applications that accompanied, and were often enabled by, the methodological advances described earlier. A few examples follow, but full details are in the individual chapters of the report. For example, we developed a general theory of phonon-induced friction on molecular adsorbates. We showed fundamentally how solvent influences the adsorption and desorption process and how it differs from the processes typically involved at the solid–gas interface, making aqueous-phase and electrocatalysis different from traditional thermocatalysis. We examined how metal–insulator and magnetic transitions can be probed, and accelerated exciton dynamics via Frenkel Hamiltonian parameters. We showed that the nearsighted force-training approach, developed within this project, can predict both the stability and reactivity of large nanoparticles, and can also lead to insights on catalyst coverage on binding energies and entropies. These applied studies, which generally integrated with our method development, allowed us to push forward the theoretical understanding of several reaction classes.

08 HYDROGEN↗