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At least 1,063 records · Page 59

Physical understanding of electron mobility in asymmetrically strained InGaAs-on-insulator metal-oxide-semiconductor field-effect transistors fabricated by lateral strain relaxation

In this paper, we fabricated asymmetrically tensile-strained In{sub 0.53}Ga{sub 0.47}As-on-insulator (-OI) metal-oxide-semiconductor field-effect transistors (MOSFETs) using a lateral strain relaxation technique. A stripe-like line structure, fabricated in biaxially strained In{sub 0.53}Ga{sub 0.47}As-OI can lead to the lateral strain relaxation and asymmetric strain configuration in In{sub 0.53}Ga{sub 0.47}As-OI with the channel width of 100 nm. We have found that the effective mobility (μ{sub eff}) enhancement in In{sub 0.53}Ga{sub 0.47}As-OI MOSFETs with uniaxial-like asymmetric strain becomes smaller than that in In{sub 0.53}Ga{sub 0.47}As-OI MOSFETs with biaxial strain. We have clarified from a systematic analysis between the strain values and the μ{sub eff} characteristics that this mobility behavior can be understood by the change of the energy level of the conduction band minimum due to the lateral strain relaxation.

36 MATERIALS SCIENCE↗

A thermalization energy analysis of the threshold voltage shift in amorphous indium gallium zinc oxide thin film transistors under simultaneous negative gate bias and illumination

It has been previously observed that thin film transistors (TFTs) utilizing an amorphous indium gallium zinc oxide (a-IGZO) semiconducting channel suffer from a threshold voltage shift when subjected to a negative gate bias and light illumination simultaneously. In this work, a thermalization energy analysis has been applied to previously published data on negative bias under illumination stress (NBIS) in a-IGZO TFTs. A barrier to defect conversion of 0.65–0.75 eV is extracted, which is consistent with reported energies of oxygen vacancy migration. The attempt-to-escape frequency is extracted to be 10{sup 6}−10{sup 7} s{sup −1}, which suggests a weak localization of carriers in band tail states over a 20–40 nm distance. Models for the NBIS mechanism based on charge trapping are reviewed and a defect pool model is proposed in which two distinct distributions of defect states exist in the a-IGZO band gap: these are associated with states that are formed as neutrally charged and 2+ charged oxygen vacancies at the time of film formation. In this model, threshold voltage shift is not due to a defect creation process, but to a change in the energy distribution of states in the band gap upon defect migration as this allows a state formed as a neutrally charged vacancy to be converted into one formed as a 2+ charged vacancy and vice versa. Carrier localization close to the defect migration site is necessary for the conversion process to take place, and such defect migration sites are associated with conduction and valence band tail states. Under negative gate bias stressing, the conduction band tail is depleted of carriers, but the bias is insufficient to accumulate holes in the valence band tail states, and so no threshold voltage shift results. It is only under illumination that the quasi Fermi level for holes is sufficiently lowered to allow occupation of valence band tail states. The resulting charge localization then allows a negative threshold voltage shift, but only under conditions of simultaneous negative gate bias and illumination, as observed experimentally as the NBIS effect.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

L{sub g} = 100 nm In{sub 0.7}Ga{sub 0.3}As quantum well metal-oxide semiconductor field-effect transistors with atomic layer deposited beryllium oxide as interfacial layer

In this study, we have fabricated nanometer-scale channel length quantum-well (QW) metal-oxide-semiconductor field effect transistors (MOSFETs) incorporating beryllium oxide (BeO) as an interfacial layer. BeO has high thermal stability, excellent electrical insulating characteristics, and a large band-gap, which make it an attractive candidate for use as a gate dielectric in making MOSFETs. BeO can also act as a good diffusion barrier to oxygen owing to its small atomic bonding length. In this work, we have fabricated In{sub 0.53}Ga{sub 0.47}As MOS capacitors with BeO and Al{sub 2}O{sub 3} and compared their electrical characteristics. As interface passivation layer, BeO/HfO{sub 2} bilayer gate stack presented effective oxide thickness less 1 nm. Furthermore, we have demonstrated In{sub 0.7}Ga{sub 0.3}As QW MOSFETs with a BeO/HfO{sub 2} dielectric, showing a sub-threshold slope of 100 mV/dec, and a transconductance (g{sub m,max}) of 1.1 mS/μm, while displaying low values of gate leakage current. These results highlight the potential of atomic layer deposited BeO for use as a gate dielectric or interface passivation layer for III–V MOSFETs at the 7 nm technology node and/or beyond.

36 MATERIALS SCIENCE↗

Study of surface leakage current of AlGaN/GaN high electron mobility transistors

Temperature-dependent surface current measurements were performed to analyze the mechanism of surface conductance of AlGaN/GaN channel high-electron-mobility transistors by utilizing process-optimized double gate structures. Different temperatures and electric field dependence have been found in surface current measurements. At low electric field, the mechanism of surface conductance is considered to be two-dimensional variable range hopping. At elevated electric field, the Frenkel–Poole trap assisted emission governs the main surface electrons transportation. The extracted energy barrier height of electrons emitting from trapped state near Fermi energy level into a threading dislocations-related continuum state is 0.38 eV. SiN passivation reduces the surface leakage current by two order of magnitude and nearly 4 orders of magnitude at low and high electric fields, respectively. SiN also suppresses the Frenkel–Poole conductance at high temperature by improving the surface states of AlGaN/GaN. A surface treatment process has been introduced to further suppress the surface leakage current at high temperature and high field, which results in a decrease in surface current of almost 3 orders of magnitude at 476 K.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

C-H surface diamond field effect transistors for high temperature (400 °C) and high voltage (500 V) operation

By forming a highly stable Al{sub 2}O{sub 3} gate oxide on a C-H bonded channel of diamond, high-temperature, and high-voltage metal-oxide-semiconductor field-effect transistor (MOSFET) has been realized. From room temperature to 400 °C (673 K), the variation of maximum drain-current is within 30% at a given gate bias. The maximum breakdown voltage (V{sub B}) of the MOSFET without a field plate is 600 V at a gate-drain distance (L{sub GD}) of 7 μm. We fabricated some MOSFETs for which V{sub B}/L{sub GD} > 100 V/μm. These values are comparable to those of lateral SiC or GaN FETs. The Al{sub 2}O{sub 3} was deposited on the C-H surface by atomic layer deposition (ALD) at 450 °C using H{sub 2}O as an oxidant. The ALD at relatively high temperature results in stable p-type conduction and FET operation at 400 °C in vacuum. The drain current density and transconductance normalized by the gate width are almost constant from room temperature to 400 °C in vacuum and are about 10 times higher than those of boron-doped diamond FETs.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Improvement of bias-stability in amorphous-indium-gallium-zinc-oxide thin-film transistors by using solution-processed Y{sub 2}O{sub 3} passivation

We demonstrate back channel improvement of back-channel-etch amorphous-indium-gallium-zinc-oxide (a-IGZO) thin-film transistors by using solution-processed yttrium oxide (Y{sub 2}O{sub 3}) passivation. Two different solvents, which are acetonitrile (35%) + ethylene glycol (65%), solvent A and deionized water, solvent B are investigated for the spin-on process of the Y{sub 2}O{sub 3} passivation—performed after patterning source/drain (S/D) Mo electrodes by a conventional HNO{sub 3}-based wet-etch process. Both solvents yield devices with good performance but those passivated by using solvent B exhibit better light and bias stability. Presence of yttrium at the a-IGZO back interface, where it occupies metal vacancy sites, is confirmed by X-ray photoelectron spectroscopy. The passivation effect of yttrium is more significant when solvent A is used because of the existence of more metal vacancies, given that the alcohol (65% ethylene glycol) in solvent A may dissolve the metal oxide (a-IGZO) through the formation of alkoxides and water.

36 MATERIALS SCIENCE↗

Reduction in the interface-states density of metal-oxide-semiconductor field-effect transistors fabricated on high-index Si (114) surfaces by using an external magnetic field

After fabrication of Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) devices on high-index silicon (114) surfaces, their threshold voltage (Vth) and interface-states density (Dit) characteristics were measured under the influence of an externally applied magnetic field of B = 6 μT at room temperature. The electron flow of the MOSFET's channel presents high anisotropy on Si (114), and this effect is enhanced by using an external magnetic field B, applied parallel to the Si (114) surface but perpendicular to the electron flow direction. This special configuration results in the channel electrons experiencing a Lorentzian force which pushes the electrons closer to the Si (114)-SiO{sub 2} interface and therefore to the special morphology of the Si (114) surface. Interestingly, Dit evaluation of n-type MOSFETs fabricated on Si (114) surfaces shows that the Si (114)-SiO{sub 2} interface is of high quality so that Dit as low as ∼10{sup 10 }cm{sup −2}·eV{sup −1} are obtained for MOSFETs with channels aligned at specific orientations. Additionally, using both a small positive Vds ≤ 100 mV and B = 6 μT, the former Dit is reduced by 35% in MOSFETs whose channels are aligned parallel to row-like nanostructures formed atop Si (114) surfaces (channels having a 90° rotation), whereas Dit is increased by 25% in MOSFETs whose channels are aligned perpendicular to these nanostructures (channels having a 0° rotation). From these results, the special morphology of a high-index Si (114) plane having nanochannels on its surface opens the possibility to reduce the electron-trapping characteristics of MOSFET devices having deep-submicron features and operating at very high frequencies.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Strong Room-temperature Negative Transconductance In An Axial Si/Ge Hetero-nanowire Tunneling Field-effect Transistor

We report on room-temperature negative transconductance (NTC) in axial Si/Ge hetero-nanowire tunneling field-effect transistors (TFETs). The NTC produces a current peak-to-valley ratio > 45, a high value for a Si-based device. We characterize the NTC characteristics over a range of gate VG and drain VD voltages, finding that NTC persists down to VD = –50 mV. The physical mechanism responsible for the NTC is the VG-induced depletion in the p-Ge section that eventually reduces the maximum electric field that triggers the tunneling ID, as confirmed via three-dimensional TCAD simulations.

Environmental Molecular Sciences Laboratory↗

Transistor roadmap projection using predictive full-band atomistic modeling

In this letter, a full band atomistic quantum transport tool is used to predict the performance of double gate metal-oxide-semiconductor field-effect transistors (MOSFETs) over the next 15 years for International Technology Roadmap for Semiconductors (ITRS). As MOSFET channel lengths scale below 20 nm, the number of atoms in the device cross-sections becomes finite. At this scale, quantum mechanical effects play an important role in determining the device characteristics. These quantum effects can be captured with the quantum transport tool. Critical results show the ON-current degradation as a result of geometry scaling, which is in contrast to previous ITRS compact model calculations. Geometric scaling has significant effects on the ON-current by increasing source-to-drain (S/D) tunneling and altering the electronic band structure. By shortening the device gate length from 20 nm to 5.1 nm, the ratio of S/D tunneling current to the overall subthreshold OFF-current increases from 18% to 98%. Despite this ON-current degradation by scaling, the intrinsic device speed is projected to increase at a rate of at least 8% per year as a result of the reduction of the quantum capacitance.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

A compact quantum correction model for symmetric double gate metal-oxide-semiconductor field-effect transistor

A compact quantum correction model for a symmetric double gate (DG) metal-oxide-semiconductor field-effect transistor (MOSFET) is investigated. The compact quantum correction model is proposed from the concepts of the threshold voltage shift (ΔV{sub TH}{sup QM}) and the gate capacitance (C{sub g}) degradation. First of all, ΔV{sub TH}{sup QM} induced by quantum mechanical (QM) effects is modeled. The C{sub g} degradation is then modeled by introducing the inversion layer centroid. With ΔV{sub TH}{sup QM} and the C{sub g} degradation, the QM effects are implemented in previously reported classical model and a comparison between the proposed quantum correction model and numerical simulation results is presented. Based on the results, the proposed quantum correction model can be applicable to the compact model of DG MOSFET.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Passivation of GaSb using molecular beam epitaxy Y{sub 2}O{sub 3} to achieve low interfacial trap density and high-performance self-aligned inversion-channel p-metal-oxide-semiconductor field-effect-transistors

Molecular beam epitaxy deposited rare-earth oxide of Y{sub 2}O{sub 3} has effectively passivated GaSb, leading to low interfacial trap densities of (1–4) × 10{sup 12 }cm{sup −2} eV{sup −1} across the energy bandgap of GaSb. A high saturation drain current density of 130 μA/μm, a peak transconductance of 90 μS/μm, a low subthreshold slope of 147 mV/decade, and a peak field-effect hole mobility of 200 cm{sup 2}/V-s were obtained in 1 μm-gate-length self-aligned inversion-channel GaSb p-Metal-Oxide-Semiconductor Field-Effect-Transistors (MOSFETs). In this work, high-κ/GaSb interfacial properties were better in samples with a high substrate temperature of 200 °C than in those with high κ's deposited at room temperature, in terms of the interfacial electrical properties, particularly, the reduction of interfacial trap densities near the conduction band and the MOSFET device performance.

36 MATERIALS SCIENCE↗

Operation of the GaSb p-channel metal-oxide-semiconductor field-effect transistors fabricated on (111)A surfaces

We demonstrate the operation of GaSb p-channel metal-oxide-semiconductor field-effect transistors (p-MOSFETs) on (111)A surfaces with Al{sub 2}O{sub 3} gate dielectrics formed by atomic-layer deposition at 150 °C. The p-MOSFETs on (111)A surfaces exhibit higher drain current and lower subthreshold swing than those on (100) surfaces. We find that the interface-state density (D{sub it}) values at the Al{sub 2}O{sub 3}/GaSb MOS interfaces on the (111)A surfaces are lower than those on the (100) surfaces, which can lead to performance enhancement of the GaSb p-MOSFETs on (111)A surfaces. The mobility of the GaSb p-MOSFETs on (111)A surfaces is 80% higher than that on (100) surfaces.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Growth and characterization of AlGaN/GaN/AlGaN double-heterojunction high-electron-mobility transistors on 100-mm Si(111) using ammonia-molecular beam epitaxy

To improve the confinement of two-dimensional electron gas (2DEG) in AlGaN/GaN high electron mobility transistor (HEMT) heterostructures, AlGaN/GaN/AlGaN double heterojunction HEMT (DH-HEMT) heterostructures were grown using ammonia-MBE on 100-mm Si substrate. Prior to the growth, single heterojunction HEMT (SH-HEMT) and DH-HEMT heterostructures were simulated using Poisson-Schrödinger equations. From simulations, an AlGaN buffer with “Al” mole fraction of 10% in the DH-HEMT was identified to result in both higher 2DEG concentration (∼10{sup 13 }cm{sup −2}) and improved 2DEG confinement in the channel. Hence, this composition was considered for the growth of the buffer in the DH-HEMT heterostructure. Hall measurements showed a room temperature 2DEG mobility of 1510 cm{sup 2}/V.s and a sheet carrier concentration (n{sub s}) of 0.97 × 10{sup 13 }cm{sup −2} for the DH-HEMT structure, while they are 1310 cm{sup 2}/V.s and 1.09 × 10{sup 13 }cm{sup −2}, respectively, for the SH-HEMT. Capacitance-voltage measurements confirmed the improvement in the confinement of 2DEG in the DH-HEMT heterostructure, which helped in the enhancement of its room temperature mobility. DH-HEMT showed 3 times higher buffer break-down voltage compared to SH-HEMT, while both devices showed almost similar drain current density. Small signal RF measurements on the DH-HEMT showed a unity current-gain cut-off frequency (f{sub T}) and maximum oscillation frequency (f{sub max}) of 22 and 25 GHz, respectively. Thus, overall, DH-HEMT heterostructure was found to be advantageous due to its higher buffer break-down voltages compared to SH-HEMT heterostructure.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Enhanced photocurrent of Ge-doped InGaO thin film transistors with quantum dots

The photocurrent of germanium-doped indium-gallium oxide (GIGO) thin film transistors (TFTs) can be observed when the device is exposed to a ultra-violet light because GIGO is a wide band gap semiconducting material. Therefore, we decorated cadmium selenide (CdSe) quantum-dots (QDs) on the surface of GIGO to increase the photocurrent for low-energy light, i.e., visible light. A 10 nm GIGO film was deposited on the SiO{sub 2}/Si substrate by a radio frequency sputter system. Also, we prepared CdSe QDs with sizes of ∼6.3 nm, which can absorb red visible light. QDs were spin-coated onto the GIGO film, and post-annealing was done to provide cross-linking between QDs. The prepared devices showed a 231% increase in photocurrent when exposed to 650 nm light due to the QDs on the GIGO surface. Measurements to construct an energy level diagram were made using ultraviolet photoelectron spectroscopy to determine the origin of the photocurrent, and we found that the small band gap of CdSe QDs enables the increase in photocurrent in the GIGO TFTs. This result is relevant for developing highly transparent photosensors based on oxide semiconductors and QDs.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Ultrathin body GaSb-on-insulator p-channel metal-oxide-semiconductor field-effect transistors on Si fabricated by direct wafer bonding

We have realized ultrathin body GaSb-on-insulator (GaSb-OI) on Si wafers by direct wafer bonding technology using atomic-layer deposition (ALD) Al{sub 2}O{sub 3} and have demonstrated GaSb-OI p-channel metal-oxide-semiconductor field-effect transistors (p-MOSFETs) on Si. A 23-nm-thick GaSb-OI p-MOSFET exhibits the peak effective mobility of ∼76 cm{sup 2}/V s. We have found that the effective hole mobility of the thin-body GaSb-OI p-MOSFETs decreases with a decrease in the GaSb-OI thickness or with an increase in Al{sub 2}O{sub 3} ALD temperature. The InAs passivation of GaSb-OI MOS interfaces can enhance the peak effective mobility up to 159 cm{sup 2}/V s for GaSb-OI p-MOSFETs with the 20-nm-thick GaSb layer.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Dopant selection for control of charge carrier density and mobility in amorphous indium oxide thin-film transistors: Comparison between Si- and W-dopants

The dependence of oxygen vacancy suppression on dopant species in amorphous indium oxide (a-InO{sub x}) thin film transistors (TFTs) is reported. In a-InO{sub x} TFTs incorporating equivalent atom densities of Si- and W-dopants, absorption of oxygen in the host a-InO{sub x} matrix was found to depend on difference of Gibbs free energy of the dopants for oxidation. For fully oxidized films, the extracted channel conductivity was higher in the a-InO{sub x} TFTs containing dopants of small ionic radius. This can be explained by a reduction in the ionic scattering cross sectional area caused by charge screening effects.

36 MATERIALS SCIENCE↗

Inversion-mode GaAs wave-shaped field-effect transistor on GaAs (100) substrate

Inversion-mode GaAs wave-shaped metal-oxide-semiconductor field-effect transistors (WaveFETs) are demonstrated using atomic-layer epitaxy of La{sub 2}O{sub 3} as gate dielectric on (111)A nano-facets formed on a GaAs (100) substrate. The wave-shaped nano-facets, which are desirable for the device on-state and off-state performance, are realized by lithographic patterning and anisotropic wet etching with optimized geometry. A well-behaved 1 μm gate length GaAs WaveFET shows a maximum drain current of 64 mA/mm, a subthreshold swing of 135 mV/dec, and an I{sub ON}/I{sub OFF} ratio of greater than 10{sup 7}.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Restorative effect of oxygen annealing on device performance in HfIZO thin-film transistors

Metal-oxide based thin-film transistors (oxide-TFTs) are very promising for use in next generation electronics such as transparent displays requiring high switching and driving performance. In this study, we demonstrate an optimized process to secure excellent device performance with a favorable shift of the threshold voltage toward 0V in amorphous hafnium-indium-zinc-oxide (a-HfIZO) TFTs by using post-treatment with oxygen annealing. This enhancement results from the improved interfacial characteristics between gate dielectric and semiconductor layers due to the reduction in the density of interfacial states related to oxygen vacancies afforded by oxygen annealing. The device statistics confirm the improvement in the device-to-device and run-to-run uniformity. We also report on the photo-induced stability in such oxide-TFTs against long-term UV irradiation, which is significant for transparent displays.

36 MATERIALS SCIENCE↗