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At least 1,045 records · Page 58
All sourcesNASA NTRSDOE OSTI
DOE OSTI2023

FLASH: FPGA-Accelerated Smart Switches with GCN Case Study

Some communication switches, e.g., the Mellanox SHArP and those in the IBM BlueGene clusters, are augmented to process packets at the application level with fixed-function collectives. This approach, however, lacks flexibility, which limits their applicability in diverse and dynamic workloads. Recently, a new type of programmable packet processor, which uses high-level languages, e.g., P4, has emerged as possible candidates. P4-based switches, however, fall short in certain applications, including machine learning, where capabilities not currently supported by P4 are needed. These include more complex calculation, such as sparse computation and fused multiply-accumulate, data-intensive floating point operations, data reuse, and significant memory. The problem addressed here is that such a switch augmentation needs to support: a large amount of state, significant flexible compute capability, and ease of programming, all while maintaining full functionality, including ensuring high throughput, and demonstrating utility. In this work, we propose a programmable look-aside-type accelerator that can be embedded into, or attached to, existing communication switch pipelines and that is capable of processing packets at line-rate. The proposed in-switch accelerator is based on mixing an ISA (subset of RISC-V instructions) with dataflow graphs (found in CGRAs). To augment performance, vector instructions are also supported. To facilitate usability, we have developed a complete toolchain to compile user-provided C/C++ codes to appropriate back-end instructions for configuring the accelerator. While this approach is flexible enough to support various workloads, in this paper, we consider Graph Convolutional Networks (GCNs) as a case study. Experimental results show that this approach considerably improves the performance of distributed GCN applications.

Haghi, Pouya↗
NASA NTRS1983

The Information Adaptive System - A demonstration of real-time onboard image processing

The Information Adaptive System (IAS) program has the objective to develop and demonstrate, at the brassboard level, an architecture which can be used to perform advanced signal procesing functions on board the spacecraft. Particular attention is given to the processing of high-speed multispectral imaging data in real-time, and the development of advanced technology which could be employed for future space applications. An IAS functional description is provided, and questions of radiometric correction are examined. Problems of data packetization are considered along with data selection, a distortion coefficient processor, an adaptive system controller, an image processing demonstration system, a sensor simulator and output data buffer, a test support and demonstration controller, and IAS demonstration operating modes.

Thomas, G. L.↗
NASA NTRS1986

Extending the granularity of representation and control for the MIL-STD CAIS 1.0 node model

The Common APSE (Ada 1 Program Support Environment) Interface Set (CAIS) (DoD85) node model provides an excellent baseline for interfaces in a single-host development environment. To encompass the entire spectrum of computing, however, the CAIS model should be extended in four areas. It should provide the interface between the engineering workstation and the host system throughout the entire lifecycle of the system. It should provide a basis for communication and integration functions needed by distributed host environments. It should provide common interfaces for communications mechanisms to and among target processors. It should provide facilities for integration, validation, and verification of test beds extending to distributed systems on geographically separate processors with heterogeneous instruction set architectures (ISAS). Additions to the PROCESS NODE model to extend the CAIS into these four areas are proposed.

Rogers, Kathy L.↗
NASA NTRS2001

The Paperless Solution

REI Systems, Inc. developed a software solution that uses the Internet to eliminate the paperwork typically required to document and manage complex business processes. The data management solution, called Electronic Handbooks (EHBs), is presently used for the entire SBIR program processes at NASA. The EHB-based system is ideal for programs and projects whose users are geographically distributed and are involved in complex management processes and procedures. EHBs provide flexible access control and increased communications while maintaining security for systems of all sizes. Through Internet Protocol- based access, user authentication and user-based access restrictions, role-based access control, and encryption/decryption, EHBs provide the level of security required for confidential data transfer. EHBs contain electronic forms and menus, which can be used in real time to execute the described processes. EHBs use standard word processors that generate ASCII HTML code to set up electronic forms that are viewed within a web browser. EHBs require no end-user software distribution, significantly reducing operating costs. Each interactive handbook simulates a hard-copy version containing chapters with descriptions of participants' roles in the online process.

Source record↗
NASA NTRS2011

MicroShell Minimalist Shell for Xilinx Microprocessors

MicroShell is a lightweight shell environment for engineers and software developers working with embedded microprocessors in Xilinx FPGAs. (MicroShell has also been successfully ported to run on ARM Cortex-M1 microprocessors in Actel ProASIC3 FPGAs, but without project-integration support.) Micro Shell decreases the time spent performing initial tests of field-programmable gate array (FPGA) designs, simplifies running customizable one-time-only experiments, and provides a familiar-feeling command-line interface. The program comes with a collection of useful functions and enables the designer to add an unlimited number of custom commands, which are callable from the command-line. The commands are parameterizable (using the C-based command-line parameter idiom), so the designer can use one function to exercise hardware with different values. Also, since many hardware peripherals instantiated in FPGAs have reasonably simple register-mapped I/O interfaces, the engineer can edit and view hardware parameter settings at any time without stopping the processor. MicroShell comes with a set of support scripts that interface seamlessly with Xilinx's EDK tool. Adding an instance of MicroShell to a project is as simple as marking a check box in a library configuration dialog box and specifying a software project directory. The support scripts then examine the hardware design, build design-specific functions, conditionally include processor-specific functions, and complete the compilation process. For code-size constrained designs, most of the stock functionality can be excluded from the compiled library. When all of the configurable options are removed from the binary, MicroShell has an unoptimized memory footprint of about 4.8 kB and a size-optimized footprint of about 2.3 kB. Since MicroShell allows unfettered access to all processor-accessible memory locations, it is possible to perform live patching on a running system. This can be useful, for instance, if a bug is discovered in a routine but the system cannot be rebooted: Shell allows a skilled operator to directly edit the binary executable in memory. With some forethought, MicroShell code can be located in a different memory location from custom code, permitting the custom functionality to be overwritten at any time without stopping the controlling shell.

Werne, Thomas A.↗
NASA NTRS1977

Development of a standardized control module for dc-to-dc converters

The electrical performance of a power processor depends on the quality of its control system. Most of the existing control circuits suffer one or more of the following imperfections that tend to restrict their respective utility: (1) inability to perform different modes of duty cycle control; (2) lack of immunity to output filter parameter changes, and (3) lack of capability to provide power component stress limiting on an instantaneous basis. The three lagging aspects of existing control circuits have been used to define the major objectives of the current Standardized Control Module (SCM) Program. Detailed information on the SCM functional block diagram, its universality, and performance features, circuit description, test results, and modeling and analysis efforts are presented.

Yu, Y.↗
NASA NTRS1986

Hard ACTS to follow

The Advanced Communications Technology Satellite (ACTS), the third phase of NASA's 30/20 GHz satellite communications program, is praised for its frugal usage of both the geosynchronous orbital arch and the frequency spectrum resources necessary for communications satellites. Its objective is to verify Ka-band satellite communications concepts and to develop a flight and ground system for validation of the multibeam communications proof-of-concept technologies. The ACTS ground segment (comprised of four types of terminals) is designed to compliment the spacecraft for the SS launch in 1989. Precise coordination between the ground and spacecraft segments is performed by the baseband processor (BBP), which is an in-orbit switchboard, and the tracking error word, which enables the ground terminals to remain synchronized with onboard timing. Fixed spot beams and scan beams, comprising the two types of spot beams used, both operate at the same frequency and hence, conserve frequency resources. In addition, the time division multiple access serves to enhance system efficiency. It is concluded that Ka-band satellites are a practical approach to the better usage of those resources potentially threatened by communications satellites. Comprehensive graphs and block diagrams of the system are included.

Moy, L.↗
NASA NTRS1987

Optimal dynamic remapping of parallel computations

A large class of computations are characterized by a sequence of phases, with phase changes occurring unpredictably. The decision problem was considered regarding the remapping of workload to processors in a parallel computation when the utility of remapping and the future behavior of the workload is uncertain, and phases exhibit stable execution requirements during a given phase, but requirements may change radically between phases. For these problems a workload assignment generated for one phase may hinder performance during the next phase. This problem is treated formally for a probabilistic model of computation with at most two phases. The fundamental problem of balancing the expected remapping performance gain against the delay cost was addressed. Stochastic dynamic programming is used to show that the remapping decision policy minimizing the expected running time of the computation has an extremely simple structure. Because the gain may not be predictable, the performance of a heuristic policy that does not require estimnation of the gain is examined. The heuristic method's feasibility is demonstrated by its use on an adaptive fluid dynamics code on a multiprocessor. The results suggest that except in extreme cases, the remapping decision problem is essentially that of dynamically determining whether gain can be achieved by remapping after a phase change. The results also suggest that this heuristic is applicable to computations with more than two phases.

Nicol, David M.↗
NASA NTRS2006

The Space Technology 8 mission

the Space Technology 8 (ST8) mission is the latest in NASA's New Millenium Program technology demonstration missions. ST8 includes a spacecraft bus built by industry, flying four new technology payloads in low Earth orbit. This paper will describe each payload, along with a brief description of the mission and spacecraft.

thermal loop↗
NASA NTRS1999

Portable Parallel Programming for the Dynamic Load Balancing of Unstructured Grid Applications

The ability to dynamically adapt an unstructured -rid (or mesh) is a powerful tool for solving computational problems with evolving physical features; however, an efficient parallel implementation is rather difficult, particularly from the view point of portability on various multiprocessor platforms We address this problem by developing PLUM, tin automatic anti architecture-independent framework for adaptive numerical computations in a message-passing environment. Portability is demonstrated by comparing performance on an SP2, an Origin2000, and a T3E, without any code modifications. We also present a general-purpose load balancer that utilizes symmetric broadcast networks (SBN) as the underlying communication pattern, with a goal to providing a global view of system loads across processors. Experiments on, an SP2 and an Origin2000 demonstrate the portability of our approach which achieves superb load balance at the cost of minimal extra overhead.

Biswas, Rupak↗
DOE OSTI2023

Programmable photonic integrated meshes for modular generation of optical entanglement links

Abstract Large-scale generation of quantum entanglement between individually controllable qubits is at the core of quantum computing, communications, and sensing. Modular architectures of remotely-connected quantum technologies have been proposed for a variety of physical qubits, with demonstrations reported in atomic and all-photonic systems. However, an open challenge in these architectures lies in constructing high-speed and high-fidelity reconfigurable photonic networks for optically-heralded entanglement among target qubits. Here we introduce a programmable photonic integrated circuit (PIC), realized in a piezo-actuated silicon nitride (SiN)-in-oxide CMOS-compatible process, that implements an N × N Mach–Zehnder mesh (MZM) capable of high-speed execution of linear optical transformations. The visible-spectrum photonic integrated mesh is programmed to generate optical connectivity on up to N = 8 inputs for a range of optically-heralded entanglement protocols. In particular, we experimentally demonstrated optical connections between 16 independent pairwise mode couplings through the MZM, with optical transformation fidelities averaging 0.991 ± 0.0063. The PIC’s reconfigurable optical connectivity suffices for the production of 8-qubit resource states as building blocks of larger topological cluster states for quantum computing. Our programmable PIC platform enables the fast and scalable optical switching technology necessary for network-based quantum information processors.

47 OTHER INSTRUMENTATION↗
NASA NTRS1980

An Engineering Data Management System for Ipad

An overview of the capabilities and software architecture of the IPAD information processor (IPIP) is presented. IPIP is a state-of-the-art data base management system that satisfies engineering requirements not addressed by present day commercial systems. It also significantly advances a number of capabilities that are offered commercially. IPIP capabilities range from support for multiple schemas and data models to support for distributed processing, configuration control, and data inventory management. IPIP exploits semantic commonality in features offered in various forms at different user interfaces in today's commercial systems. An integrated software architecture supports all user interfaces: programming languages, interactive data manipulation, and schema languages. This approach promotes simplicity and compactness in software and permits features to be offered symmetrically across all appropriate user interfaces.

H R Johnson↗
NASA NTRS1988

Autonomous space processor for orbital debris removal and flame augmentation additives in scramjets for the National Aerospace Plane

This is a brief description of the USRA-sponsored design project at the University of Arizona. Approximately eighty-percent of this effort was spent pursuing a novel engineering concept for the in-situ processing of orbital debris utilizing resources available in low Earth orbit (LEO); the other twenty-percent was devoted to discovering innovative additives for the anchoring of supersonic combustion zones that find direct use in the Aerospace Plane that is expected to use scramjets. The seriousness of the orbital debris problem is briefly described. Available 'solutions' are outlined from the literature. The engineering design is briefly mentioned, with an emphasis on the positive aspects of the space environment that should be used in an economical approach. The aspects of operating in microgravity, vacuum, and in utilizing solar energy are mentioned. A quantitative computer animation was developed to provide design data. Three specific dead spacecraft were identified for an initial cleanup mission. The design concept, which includes a solar processor, remote arm manipulators, and the gradual processing of the debris, is also described. This is followed by a description of hardware construction. Operation and actual processing of simulated debris parts (aluminum, for now) are demonstrated in the NASP task, construction of the new design for measuring the radiation from the key free radicals (as enhanced by the additives) is described. Immediate (1988) and long-range (through 1992) future plans are shown to clearly indicate the full engineering design strategy in the light of the national space program thrusts.

Source record↗
NASA NTRS1999

Advanced Communications Technology Satellite (ACTS): Four-Year System Performance

The Advanced Communications Technology Satellite (ACTS) was conceived at the National Aeronautics and Space Administration (NASA) in the late 1970's as a follow-on program to ATS and CTS to continue NASA's long history of satellite communications projects. The ACTS project set the stage for the C-band satellites that started the industry, and later the ACTS project established the use of Ku-band for video distribution and direct-to-home broadcasting. ACTS, launched in September 1993 from the space shuttle, created a revolution in satellite system architecture by using digital communications techniques employing key technologies such as a fast hopping multibeam antenna, an on-board baseband processor, a wide-band microwave switch matrix, adaptive rain fade compensation, and the use of 900 MHz transponders operating at Ka-band frequencies. This paper describes the lessons learned in each of the key ACTS technology areas, as well as in the propagation investigations.

Acosta, Roberto J.↗
NASA NTRS2011

Virtual Sensor Test Instrumentation

Virtual Sensor Test Instrumentation is based on the concept of smart sensor technology for testing with intelligence needed to perform sell-diagnosis of health, and to participate in a hierarchy of health determination at sensor, process, and system levels. A virtual sensor test instrumentation consists of five elements: (1) a common sensor interface, (2) microprocessor, (3) wireless interface, (4) signal conditioning and ADC/DAC (analog-to-digital conversion/ digital-to-analog conversion), and (5) onboard EEPROM (electrically erasable programmable read-only memory) for metadata storage and executable software to create powerful, scalable, reconfigurable, and reliable embedded and distributed test instruments. In order to maximize the efficient data conversion through the smart sensor node, plug-and-play functionality is required to interface with traditional sensors to enhance their identity and capabilities for data processing and communications. Virtual sensor test instrumentation can be accessible wirelessly via a Network Capable Application Processor (NCAP) or a Smart Transducer Interlace Module (STIM) that may be managed under real-time rule engines for mission-critical applications. The transducer senses the physical quantity being measured and converts it into an electrical signal. The signal is fed to an A/D converter, and is ready for use by the processor to execute functional transformation based on the sensor characteristics stored in a Transducer Electronic Data Sheet (TEDS). Virtual sensor test instrumentation is built upon an open-system architecture with standardized protocol modules/stacks to interface with industry standards and commonly used software. One major benefit for deploying the virtual sensor test instrumentation is the ability, through a plug-and-play common interface, to convert raw sensor data in either analog or digital form, to an IEEE 1451 standard-based smart sensor, which has instructions to program sensors for a wide variety of functions. The sensor data is processed in a distributed fashion across the network, providing a large pool of resources in real time to meet stringent latency requirements.

Wang, Roy↗
DOE OSTI2022

The Importance of Scientific Visualization on Novel Hardware

Innovation in HPC hardware and adoption of heterogeneous systems has led to a variety of unique programming models. This has led to a challenge for scientific visualization software (and indeed all HPC software) to take full advantage of recent generations of supercomputing. Edge computing, where hardware is specialized for the needs of the particular application, exacerbates the problem. VTK-m has had many successes on this front by providing device-agnostic algorithms that compare favorably to implementations written to specific devices as shown in Table 1. However, VTK-m has focused mostly on GPU and traditional CPU multicore technology. There are numerous processor technologies, both existing and potential future, that are not being addressed by current R&D efforts.

97 MATHEMATICS AND COMPUTING↗
NASA NTRS1976

Atmosphere, Magnetosphere and Plasmas in Space (AMPS). Spacelab payload definition study. Volume 7, book 3: Supporting Research and Technology (SR and T) report

The items identified as required to support the AMPS mission and requiring SR and T support and further work are: (1) a general purpose Experiment Pointing Mount; (2) a technique for measuring the attitude of the pallet-mounted or deployed experiments; (3) the development of a common optics cryogenically cooled interferometer spectrometer; (4) the development of a differential absorption lidar system for the measurement of ozone densitites in the earth's atmosphere; (5) the development of dc to dc power processors which are capable of converting energy stored in a capacitor system at 500 V to energy supplied to equipment operating at 40 kV and at 20 kW (eventually up to 100 kW); and (6) the development of a magnetic or possibly electrostatic deflection system capable of bending the beam of an electron accelerator. A data sheet is included for each item, briefly describing the background and need for each item, and the general objectives of the required development, and identifying the schedule requirements in support of the AMPS program.

Source record↗
NASA NTRS1987

Programming a hillslope water movement model on the MPP

A physically based numerical model was developed of heat and moisture flow within a hillslope on a parallel architecture computer, as a precursor to a model of a complete catchment. Moisture flow within a catchment includes evaporation, overland flow, flow in unsaturated soil, and flow in saturated soil. Because of the empirical evidence that moisture flow in unsaturated soil is mainly in the vertical direction, flow in the unsaturated zone can be modeled as a series of one dimensional columns. This initial version of the hillslope model includes evaporation and a single column of one dimensional unsaturated zone flow. This case has already been solved on an IBM 3081 computer and is now being applied to the massively parallel processor architecture so as to make the extension to the one dimensional case easier and to check the problems and benefits of using a parallel architecture machine.

Devaney, J. E.↗