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All sourcesNASA NTRSDOE OSTI
DOE OSTI2020

W-band system-on-chip electron cyclotron emission imaging system on DIII-D

Monolithic, millimeter wave “system-on-chip” (SoC) technology has been employed in heterodyne receiver integrated circuit radiometers in a newly developed Electron Cyclotron Emission Imaging (ECEI) system on the DIII-D tokamak for 2D electron temperature profile and fluctuation evolution diagnostics. Here, a prototype module operating in E-band (72-80 GHz) was first employed in a 2 x 10 element array that demonstrated significant improvements over the previous quasi-optical Schottky diode mixer arrays during the 2018 operational campaign of the DIII-D tokamak. For compatibility with International Thermonuclear Experimental Reactor (ITER) relevant scenarios on DIII-D, the SoC ECEI system was upgraded with 20 horn-waveguide receiver modules. Each individual module contains a University of California at Davis designed W-band (75 -110 GHz) receiver die that integrates a broadband low noise amplifier (LNA), a double balanced down-converting mixer, and a x4 multiplier on the local oscillator (LO) chain. A x2 multiplier and two IF amplifiers are packaged and selected to further boost the signal strength as well as downconvert the signal frequency. The upgraded W-band array exhibits > 30 dB additional gain and 20x improvement in noise temperature comparing with the previous Schottky diode radio frequency (RF) mixer input systems; an internal 8 times multiplier chain is used to bring down the LO frequency below 12 GHz, thereby obviating the need for a large aperture for quasi-optical LO coupling and replacing it with coaxial connectors. The horn-waveguide shielding housing avoids out-of-band noise interference on each individual module. The upgraded ECEI system plays an important role for absolute electron temperature evolution and fluctuation measurements for edge and core region transport physics studies.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY↗
NASA NTRS2011

Carbon Nanofiber-Based, High-Frequency, High-Q, Miniaturized Mechanical Resonators

High Q resonators are a critical component of stable, low-noise communication systems, radar, and precise timing applications such as atomic clocks. In electronic resonators based on Si integrated circuits, resistive losses increase as a result of the continued reduction in device dimensions, which decreases their Q values. On the other hand, due to the mechanical construct of bulk acoustic wave (BAW) and surface acoustic wave (SAW) resonators, such loss mechanisms are absent, enabling higher Q-values for both BAW and SAW resonators compared to their electronic counterparts. The other advantages of mechanical resonators are their inherently higher radiation tolerance, a factor that makes them attractive for NASA s extreme environment planetary missions, for example to the Jovian environments where the radiation doses are at hostile levels. Despite these advantages, both BAW and SAW resonators suffer from low resonant frequencies and they are also physically large, which precludes their integration into miniaturized electronic systems. Because there is a need to move the resonant frequency of oscillators to the order of gigahertz, new technologies and materials are being investigated that will make performance at those frequencies attainable. By moving to nanoscale structures, in this case vertically oriented, cantilevered carbon nanotubes (CNTs), that have larger aspect ratios (length/thickness) and extremely high elastic moduli, it is possible to overcome the two disadvantages of both bulk acoustic wave (BAW) and surface acoustic wave (SAW) resonators. Nano-electro-mechanical systems (NEMS) that utilize high aspect ratio nanomaterials exhibiting high elastic moduli (e.g., carbon-based nanomaterials) benefit from high Qs, operate at high frequency, and have small force constants that translate to high responsivity that results in improved sensitivity, lower power consumption, and im - proved tunablity. NEMS resonators have recently been demonstrated using topdown, lithographically fabricated ap - proaches to form cantilever or bridgetype structures. Top-down approaches, however, rely on complicated and expensive e-beam lithography, and often require a release mechanism. Reso - nance effects in structures synthesized using bottom-up approaches have also recently been reported based on carbon nanotubes, but such approaches have relied on a planar two-dimensional (2D) geometry. In this innovation, vertically aligned tubes synthesized using a bottom- up approach have been considered, where the vertical orientation of the tubes has the potential to increase integration density even further. The simulation of a vertically oriented, cantilevered carbon nanotube was performed using COMSOL Multi - physics, a finite element simulation package. All simulations were performed in a 2D geometry that provided consistent results and minimized computational complexity. The simulations assumed a vertically oriented, cantilevered nanotube of uniform density (1.5 g/cu cm). An elastic modulus was assumed to be 600 GPa, relative permittivity of the nanotube was assumed to be 5.0, and Poisson s ratio was assumed to be 0.2. It should be noted that the relative permittivity and Poisson s ratio for the nanotubes of interest are not known accurately. However, as in previous simulations, the relative permittivity and Poisson s ratios were treated as weak variables in the simulation, and no significant changes were recognized when these variables were varied.

Kaul, Anupama B.↗
NASA NTRS1991

Low cost high efficiency GaAs monolithic RF module for SARSAT distress beacons

Low cost high performance (5 Watts output) 406 MHz beacons are urgently needed to realize the maximum utilization of the Search and Rescue Satellite-Aided Tracking (SARSAT) system spearheaded in the U.S. by NASA. Although current technology can produce beacons meeting the output power requirement, power consumption is high due to the low efficiency of available transmitters. Field performance is currently unsatisfactory due to the lack of safe and reliable high density batteries capable of operation at -40 C. Low cost production is also a crucial but elusive requirement for the ultimate wide scale utilization of this system. Microwave Monolithics Incorporated (MMInc.) has proposed to make both the technical and cost goals for the SARSAT beacon attainable by developing a monolithic GaAs chip set for the RF module. This chip set consists of a high efficiency power amplifier and a bi-phase modulator. In addition to implementing the RF module in Monolithic Microwave Integrated Circuit (MMIC) form to minimize ultimate production costs, the power amplifier has a power-added efficiency nearly twice that attained with current commercial technology. A distress beacon built using this RF module chip set will be significantly smaller in size and lighter in weight due to a smaller battery requirement, since the 406 MHz signal source and the digital controller have far lower power consumption compared to the 5 watt power amplifier. All the program tasks have been successfully completed. The GaAs MMIC RF module chip set has been designed to be compatible with the present 406 MHz signal source and digital controller. A complete high performance low cost SARSAT beacon can be realized with only additional minor iteration and systems integration.

Petersen, W. C.↗
DOE OSTI2025

Automating Testing of DUNE Electronics via a Finite State Machine

The Deep Underground Neutrino Experiment (DUNE) is a flagship international collaboration designed to study neutrinos tiny, nearly massless particles that may hold answers to fundamental questions about the Universe. Fermilab s Robotic Test Stand (RTS) plays a critical role in ensuring the quality of approximately 50,000 Application-Specific Integrated Circuit (ASIC) chips that will be used in DUNE s massive liquid argon detectors. These electronics will be inside the cryostat; therefore, they will need to have a high yield of working chips and low noise. To improve the automation and reliability of the RTS, this project focused on designing and implementing a Python-based finite state machine (FSM) to manage chip handling workflows. The FSM was developed as a modular software framework to coordinate robotic arm movements, manage chip tray positions, and monitor system states during testing. Key features include robust error handling routines, a pause/resume system for safe mid-cycle interruptions, and a simulation mode for iterative testing without hardware dependencies. The system was designed to prepare for seamless integration with RTS hardware components such as the robotic arm and vision system. This integration will streamline collaboration and enable efficient deployment of updates across the six total institutions performing testing. The outcomes of this internship contribute to Fermilab s mission to advance high-energy physics and support the DOE s national goals by directly improving the testing of equipment to be used in DUNE. The project also provided valuable experience in software design and contributing to the success of DUNE.

Kang, Caleb [William Rainey Harper Coll.]↗
DOE OSTI2025

Automating Testing of DUNE Electronics via a Finite State Machine

The Deep Underground Neutrino Experiment (DUNE) is a flagship international collaboration designed to study neutrinos—tiny, nearly massless particles that may hold answers to fundamental questions about the Universe. Fermilab’s Robotic Test Stand (RTS) plays a critical role in ensuring the quality of approximately 50,000 Application-Specific Integrated Circuit (ASIC) chips that will be used in DUNE’s massive liquid argon detectors. These electronics will be inside the cryostat; therefore, they will need to have a high yield of working chips and low noise. To improve the automation and reliability of the RTS, this project focused on designing and implementing a Python-based finite state machine (FSM) to manage chip handling workflows. The FSM was developed as a modular software framework to coordinate robotic arm movements, manage chip tray positions, and monitor system states during testing. Key features include robust error handling routines, a pause/resume system for safe mid-cycle interruptions, and a simulation mode for iterative testing without hardware dependencies. The system was designed to prepare for seamless integration with RTS hardware components such as the robotic arm and vision system. This integration will streamline collaboration and enable efficient deployment of updates across the six institutions performing testing. The outcomes of this internship contribute to Fermilab’s mission to advance high-energy physics and support the DOE’s national goals by directly improving the testing of equipment to be used in DUNE. The project also provided valuable experience in software design and contributing to the success of DUNE.

Kang, Caleb [Fermilab]↗
DOE OSTI2024

Characterizing electron-collecting CdTe for use in a 77 ns burst-rate imager

The Keck-PAD (pixel array detector) was developed at Cornell as a burst-rate imager capable of recording images from successive electron bunches (153 ns period) from the Advanced Photon Source (APS). Both Si and hole-collecting Schottky CdTe have been successfully bonded to this ASIC (application-specific integrated circuit) and used with this frame rate. The facility upgrades at the APS will lower the bunch period to 77 ns, which will require modifications to the Keck-PAD electronics to image properly at this reduced period. In addition, operation at high X-ray energies will require a different sensor material having a shorter charge collection time. For the target energy of 40 keV for this project, simulations have shown that electron-collecting CdTe should allow >90% charge collection within 35 ns. This collection time will be sufficient to sample the signal from one frame and prepare for the next. 750 µm-thick electron-collecting Schottky CdTe has been obtained from Acrorad and bonded to two different charge-integrating ASICs developed at Cornell, the Keck-PAD and the CU-APS-PAD. Carrier mobility has been investigated using the detector response to single X-ray bunches at the Cornell High Energy Synchrotron Source and to a pulsed optical laser. The tests indicate that the collection time will meet the requirements for 77 ns imaging.

36 MATERIALS SCIENCE↗
NASA NTRS1996

Microelectromechanical Systems for Aerodynamics Applications

Microelectromechanical systems (MEMS) embody the integration of sensors, actuators, and electronics on a single substrate using integrated circuit fabrication techniques and compatible micromachining processes. Silicon and its derivatives form the material base for the MEMS technology. MEMS devices, including micro-sensors and micro-actuators, are attractive because they can be made small (characteristic dimension about microns), be produced in large numbers with uniform performance, include electronics for high performance and sophisticated functionality, and be inexpensive. MEMS pressure sensors, wall-shear-stress sensors, and micromachined hot-wires are nearing application in aeronautics. MEMS actuators face a tougher challenge since they have to be scaled (up) to the physical phenomena that are being controlled. MEMS actuators are proposed, for example, for controlling the small structures in a turbulent boundary layer, for aircraft control, for cooling, and for mixing enhancement. Data acquisition or control logistics require integration of electronics along with the transducer elements with appropriate consideration of analog-to-digital conversion, multiplexing, and telemetry. Altogether, MEMS technology offers exciting opportunities for aerodynamics applications both in wind tunnels and in flight

Mehregany, Mehran↗
DOE OSTI2023

Towards On-Chip Learning for Low Latency Reasoning with End-to-End Synthesis

The Software Defined Architectures (SODA) Synthesizer is an open-source compiler-based tool able to automatically generate domain-specialized systems targeting Application-Specific Integrated Circuits (ASICs) or Field Programmable Gate Arrays (FPGAs) starting from high-level programming. SODA is composed of a frontend, SODA-OPT, which leverages the multilevel intermediate representation (MLIR) framework to interface with productive programming tools (e.g., machine learning frame-works), identify kernels suitable for acceleration, and perform high-level optimizations, and of a state-of-the-art high-level synthesis backend, Bambu from the PandA framework, to generate custom accelerators. One specific application of the SODA Synthesizer is the generation of accelerators to enable ultra-low latency inference and control on autonomous systems for scientific discovery (e.g., electron microscopes, sensors in particle accelerators, etc.). This paper provides an overview of the flow in the context of the generation of accelerators for edge processing to be integrated in transmission electron microscopy (TEM) devices, focusing on use cases from precision material synthesis. We show the tool in action with an example of design space exploration for inference on reconfigurable devices with a conventional deep neural network model (LeNet). Finally, we discuss the research directions and opportunities enabled by SODA in the area of autonomous control for scientific experimental workflows.

Castellana, Vito G.↗
NASA NTRS2012

A Radiation Hardened by Design CMOS ASIC for Thermopile Readouts

A radiation hardened by design (RHBD) mixed-signal application specific integrated circuit (ASIC) has been designed for a thermopile readout for operation in the harsh Jovian orbital environment. The multi-channel digitizer (MCD) ASIC includes 18 low noise amplifier channels which have tunable gain/filtering coefficients, a 16-bit sigma-delta analog-digital converter (SDADC) and an on-chip controller. The 18 channels, SDADC and controller were designed to operate with immunity to single event latchup (SEL) and to at least 10 Mrad total ionizing dose (TID). The ASIC also contains a radiation tolerant 16-bit 20 MHz Nyquist ADC for general purpose instrumentation digitizer needs. The ASIC is currently undergoing fabrication in a commercial 180 nm CMOS process. Although this ASIC was designed specifically for the harsh radiation environment of the NASA led JEO mission it is suitable for integration into instrumentation payloads 011 the ESA JUICE mission where the radiation hardness requirements are slightly less stringent.

Quilligan, G.↗
DOE OSTI2022

Progress toward picosecond on-chip magnetic memory

Here, we offer a perspective on the prospects of ultrafast spintronics and opto-magnetism as a pathway to high-performance, energy-efficient, and non-volatile embedded memory in digital integrated circuit applications. Conventional spintronic devices, such as spin-transfer-torque magnetic-resistive random-access memory (STT-MRAM) and spin–orbit torque MRAM, are promising due to their non-volatility, energy-efficiency, and high endurance. STT-MRAMs are now entering into the commercial market; however, they are limited in write speed to the nanosecond timescale. Improvement in the write speed of spintronic devices can significantly increase their usefulness as viable alternatives to the existing CMOS-based devices. In this article, we discuss recent studies that advance the field of ultrafast spintronics and opto-magnetism. An optimized ferromagnet–ferrimagnet exchange-coupled magnetic stack, which can serve as the free layer of a magnetic tunnel junction (MTJ), can be optically switched in as fast as ~3 ps. Integration of ultrafast magnetic switching of a similar stack into an MTJ device has enabled electrical readout of the switched state using a relatively larger tunneling magnetoresistance ratio. Purely electronic ultrafast spin–orbit torque induced switching of a ferromagnet has been demonstrated using ~6 ps long charge current pulses. We conclude our Perspective by discussing some of the challenges that remain to be addressed to accelerate ultrafast spintronics technologies toward practical implementation in high-performance digital information processing systems.

42 ENGINEERING↗
NASA NTRS2008

MEMS Microshutter Array System for James Webb Space Telescope

A complex MEMS microshutter array system has been developed at NASA Goddard Space Flight Center (GSFC) for use as a multi-object aperture array for a Near-Infrared Spectrometer (NIRSpec). The NIRSpec is one of the four major instruments carried by the James Webb Space Telescope (JWST), the next generation of space telescope after the Hubble Space Telescope retires. The microshutter arrays (MSAs) are designed for the selective transmission of light with high efficiency and high contrast. It is demonstrated in Figure 1 how a MSA is used as a multiple object selector in deep space. The MSAs empower the NIRSpec instrument simultaneously collect spectra from more than 100 targets therefore increases the instrument efficiency 100 times or more. The MSA assembly is one of three major innovations on JWST and the first major MEMS devices serving observation missions in space. The MSA system developed at NASA GSFC is assembled with four quadrant fully addressable 365x171 shutter arrays that are actuated magnetically, latched and addressed electrostatically. As shown in Figure 2, each MSA is fabricated out of a 4' silicon-on-insulator (SOI) wafer using MEMS bulk-micromachining technology. Individual shutters are close-packed silicon nitride membranes with a pixel size close to 100x200 pm (Figure 3). Shutters are patterned with a torsion flexure permitting shutters to open 90 degrees with a minimized mechanical stress concentration. In order to prevent light leak, light shields are made on to the surrounding frame of each shutter to cover the gaps between the shutters and the Game (Figure 4). Micro-ribs and sub-micron bumps are tailored on hack walls and light shields, respectively, to prevent sticktion, shown in Figures 4 and 5. JWST instruments are required to operate at cryogenic temperatures as low as 35K, though they are to be subjected to various levels of ground tests at room temperature. The shutters should therefore maintain nearly flat in the entire temperature range between 35K and 300K. Through intensive numerical simulations and experimental studies, an optically opaque and electrically conductive metal-nitride thin film was selected as a coating material deposited on the shutters with the best thermal-expansion match to silicon nitride - the shutter blade thin film material. A shutter image shown in Figure 6 was taken at room temperature, presenting shutters slightly bowing down as expected. Shutters become flat when the temperature decreases to 35K. The MSAs are then bonded to silicon substrates that are fabricated out of 6" single-silicon wafers in the thickness of 2mm. The bonding is conducted using a novel single-sided indium flip-chip bonding technology. Indium bumps fabricated on a substrate are shown in Figure 7. There are 180,000 indium bumps for bonding a flight format MSA array to its substrate. Besides a MSA, each substrate houses five customer-designed ASIC (Application Specific Integrated Circuit) multiplexer/address chips for 2-dimensional addressing, twenty capacitors, two temperature sensors, numbers of resistors and all necessary interconnects, as shown in Figure 8. Complete MSA quadrant assemblies have been successfully manufactured and fully functionally tested. The assemblies have passed a series of critical reviews required by JWST in satisfying all the design specifications. The qualification tests cover programmable 2-D addressing, life tests, optical contrast tests, and environmental tests including radiation, vibration, and acoustic tests. A 2-D addressing pattern with 'ESA' letters programmed in a MSA is shown in Figure 9. The MSAs passed 1 million cycle life tests and achieved high optical contrast over 10,000. MSA teams are now making progress in final fabrication, testing and assembly (Figure 10). The delivery of flight-format MSA system is scheduled at the end of 2008 for being integrated to the focal plane of the NIRSpec detectors.

Li, Mary J.↗
NASA NTRS2008

On-Wafer Measurement of a Silicon-Based CMOS VCO at 324 GHz

The world s first silicon-based complementary metal oxide/semiconductor (CMOS) integrated-circuit voltage-controlled oscillator (VCO) operating in a frequency range around 324 GHz has been built and tested. Concomitantly, equipment for measuring the performance of this oscillator has been built and tested. These accomplishments are intermediate steps in a continuing effort to develop low-power-consumption, low-phase-noise, electronically tunable signal generators as local oscillators for heterodyne receivers in submillimeter-wavelength (frequency > 300 GHz) scientific instruments and imaging systems. Submillimeter-wavelength imaging systems are of special interest for military and law-enforcement use because they could, potentially, be used to detect weapons hidden behind clothing and other opaque dielectric materials. In comparison with prior submillimeter- wavelength signal generators, CMOS VCOs offer significant potential advantages, including great reductions in power consumption, mass, size, and complexity. In addition, there is potential for on-chip integration of CMOS VCOs with other CMOS integrated circuitry, including phase-lock loops, analog- to-digital converters, and advanced microprocessors.

Samoska, Lorene↗
NASA NTRS2005

Single-Chip FPGA Azimuth Pre-Filter for SAR

A field-programmable gate array (FPGA) on a single lightweight, low-power integrated-circuit chip has been developed to implement an azimuth pre-filter (AzPF) for a synthetic-aperture radar (SAR) system. The AzPF is needed to enable more efficient use of data-transmission and data-processing resources: In broad terms, the AzPF reduces the volume of SAR data by effectively reducing the azimuth resolution, without loss of range resolution, during times when end users are willing to accept lower azimuth resolution as the price of rapid access to SAR imagery. The data-reduction factor is selectable at a decimation factor, M, of 2, 4, 8, 16, or 32 so that users can trade resolution against processing and transmission delays. In principle, azimuth filtering could be performed in the frequency domain by use of fast-Fourier-transform processors. However, in the AzPF, azimuth filtering is performed in the time domain by use of finite-impulse-response filters. The reason for choosing the time-domain approach over the frequency-domain approach is that the time-domain approach demands less memory and a lower memory-access rate. The AzPF operates on the raw digitized SAR data. The AzPF includes a digital in-phase/quadrature (I/Q) demodulator. In general, an I/Q demodulator effects a complex down-conversion of its input signal followed by low-pass filtering, which eliminates undesired sidebands. In the AzPF case, the I/Q demodulator takes offset video range echo data to the complex baseband domain, ensuring preservation of signal phase through the azimuth pre-filtering process. In general, in an SAR I/Q demodulator, the intermediate frequency (fI) is chosen to be a quarter of the range-sampling frequency and the pulse-repetition frequency (fPR) is chosen to be a multiple of fI. The AzPF also includes a polyphase spatial-domain pre-filter comprising four weighted integrate-and-dump filters with programmable decimation factors and overlapping phases. To prevent aliasing of signals, the bandwidth of the AzPF is made 80 percent of fPR/M. The choice of four as the number of overlapping phases is justified by prior research in which it was shown that a filter of length 4M can effect an acceptable transfer function. The figure depicts prototype hardware comprising the AzPF and ancillary electronic circuits. The hardware was found to satisfy performance requirements in real-time tests at a sampling rate of 100 MHz.

Gudim, Mimi↗
NASA NTRS2004

Four-Channel PC/104 MIL-STD-1553 Circuit Board

The mini bus interface card (miniBIC) is the first four-channel electronic circuit board that conforms to MIL-STD-1553 and to the electrical-footprint portion of PC/104. [MIL-STD-1553 is a military standard that encompasses a method of communication and electrical- interface requirements for digital electronic subsystems connected to a data bus. PC/104 is an industry standard for compact, stackable modules that are fully compatible (in architecture, hardware, and software) with personal-computer data- and power-bus circuitry.] Prior to the development of the miniBIC, only one- and two-channel PC/104 MIL-STD-1553 boards were available. To obtain four channels, it was necessary to include at least two boards in a PC/104 stack. In comparison with such a two-board stack, the miniBIC takes up less space, consumes less power, and is more reliable. In addition, the miniBIC includes 32 digital input/output channels. The miniBIC (see figure) contains four MIL-STD-1553B hybrid integrated circuits (ICs), four transformers, a field-programmable gate array (FPGA), and an Industry Standard Architecture (ISA) interface. Each hybrid IC includes a MILSTD-1553 dual transceiver, memory-management circuitry, processor interface logic circuitry, and 64Kx16 bits of shared static random access memory. The memory is used to configure message and data blocks. In addition, 23 16-bit registers are available for (1) configuring the hybrid IC for, and starting it in, various modes of operation; (2) reading the status of the functionality of the hybrid IC; and (3) resetting the hybrid IC to a known state. The miniBIC can operate as a remote terminal, bus controller, or bus monitor. The FPGA provides the chip-select and data-strobe signals needed for operation of the hybrid ICs. The FPGA also receives interruption signals and forwards them to the ISA bus. The ISA interface connects the address, data, and control interfaces of the hybrid ICs to the ISA backplane. Each channel is, in effect, a MIL-STD-1553 interface that can operate either independently of the others or else as a redundant version of one of the others. The transformer in each channel provides electrical isolation between the rest of the miniBIC circuitry and the bus to which that channel is connected.

Cox, Gary L.↗
NASA NTRS2013

An All-Solid-State, Room-Temperature, Heterodyne Receiver for Atmospheric Spectroscopy at 1.2 THz

Heterodyne receivers at submillimeter wavelengths have played a major role in astrophysics as well as Earth and planetary remote sensing. All-solid-state heterodyne receivers using both MMIC (monolithic microwave integrated circuit) Schottky-diode-based LO (local oscillator) sources and mixers are uniquely suited for long-term planetary missions or Earth climate monitoring missions as they can operate for decades without the need for any active cryogenic cooling. However, the main concern in using Schottky-diode-based mixers at frequencies beyond 1 THz has been the lack of enough LO power to drive the devices because 1 to 3 mW are required to properly pump Schottky diode mixers. Recent progress in HEMT- (high-electron-mobility- transistor) based power amplifier technology, with output power levels in excess of 1 W recently demonstrated at W-band, as well as advances in MMIC Schottky diode circuit technology, have led to measured output powers up to 1.4 mW at 0.9 THz. Here the first room-temperature tunable, all-planar, Schottky-diode-based receiver is reported that is operating at 1.2 THz over a wide (≈20%) bandwidth. The receiver front-end (see figure) consists of a Schottky-diode-based 540 to 640 GHz multiplied LO chain (featuring a cascade of W-band power amplifiers providing around 120 to 180 mW at W-band), a 200-GHz MMIC frequency doubler, and a 600-GHz MMIC frequency tripler, plus a biasable 1.2-THz MMIC sub-harmonic Schottky-diode mixer. The LO chain has been designed, fabricated, and tested at JPL and provides around 1 to 1.5 mW at 540 o 640 GHz. The sub-harmonic mixer consists of two Schottky diodes on a thin GaAs membrane in an anti-parallel configuration. An integrated metal insulator metal (MIM) capacitor has been included on-chip to allow dc bias for the Schottky diodes. A bias voltage of around 0.5 V/diode is necessary to reduce the LO power required down to the 1 to 1.5 mW available from the LO chain. The epilayer thickness and doping profiles have been specifically optimized to maximize the mixer performance beyond 1 THz. The measured DSB noise temperatures and conversion losses of the receiver are 2,000 to 3,500 K and 12 to 14 dB, respectively, at 120 K, and 4,000 to 6,000 K and 13 to 15 dB, respectively, at 300 K. These results establish the state-of-the-art for all-solid-state, all-planar heterodyne receivers at 1.2 THz operating at either room temperature or using passive cooling only. Since no cryogenic cooling is needed, the receiver is eminently suited to atmospheric heterodyne spectroscopy of the outer planets and their moons.

Siles, Jose V.↗
NASA NTRS2010

Differential Resonant Ring YIG Tuned Oscillator

A differential SiGe oscillator circuit uses a resonant ring-oscillator topology in order to electronically tune the oscillator over multi-octave bandwidths. The oscillator s tuning is extremely linear, because the oscillator s frequency depends on the magnetic tuning of a YIG sphere, whose resonant frequency is equal to a fundamental constant times the DC magnetic field. This extremely simple circuit topology uses two coupling loops connecting a differential pair of SiGe bipolar transistors into a feedback configuration using a YIG tuned filter creating a closed-loop ring oscillator. SiGe device technology is used for this oscillator in order to keep the transistor s 1/f noise to an absolute minimum in order to achieve minimum RF phase noise. The single-end resonant ring oscillator currently has an advantage in fewer parts, but when the oscillation frequency is greater than 16 GHz, the package s parasitic behavior couples energy to the sphere and causes holes and poor phase noise performance. This is because the coupling to the YIG is extremely low, so that the oscillator operates at near the unloaded Q. With the differential resonant ring oscillator, the oscillation currents are just in the YIG coupling mechanisms. The phase noise is even better, and the physical size can be reduced to permit monolithic microwave integrated circuit oscillators. This invention is a YIG tuned oscillator circuit making use of a differential topology to simultaneously achieve an extremely broadband electronic tuning range and ultra-low phase noise. As a natural result of its differential circuit topology, all reactive elements, such as tuning stubs, which limit tuning bandwidth by contributing excessive open loop phase shift, have been eliminated. The differential oscillator s open-loop phase shift is associated with completely non-dispersive circuit elements such as the physical angle of the coupling loops, a differential loop crossover, and the high-frequency phase shift of the n-p-n transistors. At the input of the oscillator s feedback loop is a pair of differentially connected n-p-n SiGe transistors that provides extremely high gain, and because they are bulk-effect devices, extremely low 1/f noise (leading to ultralow RF phase noise). The 1/f corner frequency for n-p-n SiGe transistors is approximately 500 Hz. The RF energy from the transistor s collector output is connected directly to the top-coupling loop (the excitation loop) of a single-sphere YIG tuned filter. A uniform magnetic field to bias the YIG must be at a right angle to any vector associated with an RF current in a coupling loop in order for the precession to interact with the RF currents.

Parrott, Ronald A.↗
NASA NTRS1995

Low-cost 20-22 GHz MIC active receiver/radiometer

A microwave integrated circuit active receiver is built and tested at 19-25 GHz. The receiver consists of a planar CPW-fed double folded-slot antenna coupled to a six-stage MESFET (metal semiconductor field effect transistors) amplifier and followed by a planar Schottky-diode detector. The folded-slot antenna on a GaAs half-space results in a wide frequency bandwidth suitable for MMIC amplifiers. The measured system performance show a video responsivity close to 1 GV/W at 20 GHz with a 3-dB bandwidth of 1500 MHz. A novel method which uses the planar video detector after the amplifier stages as an RF (radio frequency) mixer is used to measure the noise-figure of the direct detection radiometer. The system noise figure is 4.8 dB at 22 GHz. The radiometer sensitivity to a hot/cold load is 3.8 mu V/K. The measured antenna patterns show a 90% Gaussicity at 20-22 GHz. The active MIC receiver can be integrated monolithically for low-cost applications and is well suited for millimeter-wave linear imaging arrays.

PLANAR SCHOTTKY DIODE DETECTOR↗
NASA NTRS1995

A Micromechanical INS/GPS System for Small Satellites

The cost and complexity of large satellite space missions continue to escalate. To reduce costs, more attention is being directed toward small lightweight satellites where future demand is expected to grow dramatically. Specifically, micromechanical inertial systems and microstrip global positioning system (GPS) antennas incorporating flip-chip bonding, application specific integrated circuits (ASIC) and MCM technologies will be required. Traditional microsatellite pointing systems do not employ active control. Many systems allow the satellite to point coarsely using gravity gradient, then attempt to maintain the image on the focal plane with fast-steering mirrors. Draper's approach is to actively control the line of sight pointing by utilizing on-board attitude determination with micromechanical inertial sensors and reaction wheel control actuators. Draper has developed commercial and tactical-grade micromechanical inertial sensors, The small size, low weight, and low cost of these gyroscopes and accelerometers enable systems previously impractical because of size and cost. Evolving micromechanical inertial sensors can be applied to closed-loop, active control of small satellites for micro-radian precision-pointing missions. An inertial reference feedback control loop can be used to determine attitude and line of sight jitter to provide error information to the controller for correction. At low frequencies, the error signal is provided by GPS. At higher frequencies, feedback is provided by the micromechanical gyros. This blending of sensors provides wide-band sensing from dc to operational frequencies. First order simulation has shown that the performance of existing micromechanical gyros, with integrated GPS, is feasible for a pointing mission of 10 micro-radians of jitter stability and approximately 1 milli-radian absolute error, for a satellite with 1 meter antenna separation. Improved performance micromechanical sensors currently under development will be suitable for a range of micro-nano-satellite applications.

Barbour, N.↗