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NASA NTRS1988

An expert system for a distributed real-time trainer

The problem addressed by this expert system concerns the expansion of capability of a Real Time Trainer for the Spacelab flight crew. As requirements for more models or fidelity are placed upon the system, expansion is necessary. The simulator can be expanded using a larger processor or by going to a distributed system and expand by adding additional processors. The distributed system is preferable because it is more economical and can be expanded in a more incremental manner. An expert system was developed to evaluate modeling and timing capability within a real time training simulator. The expert system is based upon a distributed configuration. Components of the modeled system are control tasks, network tasks, emulator tasks, processors, displays, and a network. The distributed module expert system (DMES) allows the configuring of processors, tasks, display use, keyboard use, and selection of alternate methods to update the data buffer. Modules can be defined with execution occurring in a specific processor on a network. The system consists of a knowledge front end editor to interactively generate or update the knowledge base, an inference engine, a display module, and a recording module.

Purinton, Steven C.↗

NASA NTRS1988

A parallel Householder tridiagonalization stratagem using scattered square decomposition

The parallel stratagem in this paper uses scattered square decomposition, introduced by Fox (1985), for its data assignment and then exploits parallelism in the solution steps of the sequential Householder tridiagonalization algorithm. One may condense a real symmetric full matrix A of order n into a tridiagonal form by the stratagem in concurrent machines where N(=D-squared) processors are used. Expressions for efficiency and speedup are given for the evaluation of the stratagem. An alternative stratagem which requires less data transmission but more computations is also discussed. The results shown that the Householder method of tridiagonalization may be implemented on a concurrent machine efficiently by scattered square decomposition provided that the number of matrix elements contained in each processor is much larger than the number of processors of the concurrent machine, and the ratio of the time to transmit one data item from one processor to any other processor to the time to perform a floating-point arithmetic operation is small enough.

Chang, H. Y.↗

NASA NTRS1987

Spacecraft on-board SAR processing technology

This paper provides an assessment of the on-board SAR processing technology for Eos-type missions. The proposed Eos SAR sensor and flight data system are introduced, and the SAR processing requirements are described. The SAR on-board SAR processor architecture selection is discussed, and a baseline processor architecture using a frequency-domain processor for range correlation and a modular fault-tolerant VLSI time-domain parallel array for azimuth correlation are described. The mass storage and VLSI technologies needed for implementing the proposed SAR processing are assessed. It is shown that acceptable processor power and mass characteristics should be feasible for Eos-type applications. A proposed development strategy for the on-board SAR processor is presented.

Liu, K. Y.↗

NASA NTRS1988

Hypercluster - Parallel processing for computational mechanics

An account is given of the development status, performance capabilities and implications for further development of NASA-Lewis' testbed 'hypercluster' parallel computer network, in which multiple processors communicate through a shared memory. Processors have local as well as shared memory; the hypercluster is expanded in the same manner as the hypercube, with processor clusters replacing the normal single processor node. The NASA-Lewis machine has three nodes with a vector personality and one node with a scalar personality. Each of the vector nodes uses four board-level vector processors, while the scalar node uses four general-purpose microcomputer boards.

Blech, Richard A.↗

NASA NTRS1988

The computational structural mechanics testbed architecture. Volume 2: The interface

This is the third set of five volumes which describe the software architecture for the Computational Structural Mechanics Testbed. Derived from NICE, an integrated software system developed at Lockheed Palo Alto Research Laboratory, the architecture is composed of the command language CLAMP, the command language interpreter CLIP, and the data manager GAL. Volumes 1, 2, and 3 (NASA CR's 178384, 178385, and 178386, respectively) describe CLAMP and CLIP and the CLIP-processor interface. Volumes 4 and 5 (NASA CR's 178387 and 178388, respectively) describe GAL and its low-level I/O. CLAMP, an acronym for Command Language for Applied Mechanics Processors, is designed to control the flow of execution of processors written for NICE. Volume 3 describes the CLIP-Processor interface and related topics. It is intended only for processor developers.

Felippa, Carlos A.↗

NASA NTRS1988

A multi-satellite orbit determination problem in a parallel processing environment

The Engineering Orbit Analysis Unit at GE Valley Forge used an Intel Hypercube Parallel Processor to investigate the performance and gain experience of parallel processors with a multi-satellite orbit determination problem. A general study was selected in which major blocks of computation for the multi-satellite orbit computations were used as units to be assigned to the various processors on the Hypercube. Problems encountered or successes achieved in addressing the orbit determination problem would be more likely to be transferable to other parallel processors. The prime objective was to study the algorithm to allow processing of observations later in time than those employed in the state update. Expertise in ephemeris determination was exploited in addressing these problems and the facility used to bring a realism to the study which would highlight the problems which may not otherwise be anticipated. Secondary objectives were to gain experience of a non-trivial problem in a parallel processor environment, to explore the necessary interplay of serial and parallel sections of the algorithm in terms of timing studies, to explore the granularity (coarse vs. fine grain) to discover the granularity limit above which there would be a risk of starvation where the majority of nodes would be idle or under the limit where the overhead associated with splitting the problem may require more work and communication time than is useful.

Deakyne, M. S.↗

NASA NTRS1988

Accelerated convergence for synchronous approximate agreement

The protocol for synchronous approximate agreement presented by Dolev et. al. exhibits the undesirable property that a faulty processor, by the dissemination of a value arbitrarily far removed from the values held by good processors, may delay the termination of the protocol by an arbitrary amount of time. Such behavior is clearly undesirable in a fault tolerant dynamic system subject to hard real-time constraints. A mechanism is presented by which editing data suspected of being from Byzantine-failed processors can lead to quicker, predictable, convergence to an agreement value. Under specific assumptions about the nature of values transmitted by failed processors relative to those transmitted by good processors, a Monte Carlo simulation is presented whose qualitative results illustrate the trade-off between accelerated convergence and the accuracy of the value agreed upon.

Kearns, J. P.↗

NASA NTRS1989

Parallel eigenanalysis of finite element models in a completely connected architecture

A parallel algorithm is presented for the solution of the generalized eigenproblem in linear elastic finite element analysis, (K)(phi) = (M)(phi)(omega), where (K) and (M) are of order N, and (omega) is order of q. The concurrent solution of the eigenproblem is based on the multifrontal/modified subspace method and is achieved in a completely connected parallel architecture in which each processor is allowed to communicate with all other processors. The algorithm was successfully implemented on a tightly coupled multiple-instruction multiple-data parallel processing machine, Cray X-MP. A finite element model is divided into m domains each of which is assumed to process n elements. Each domain is then assigned to a processor or to a logical processor (task) if the number of domains exceeds the number of physical processors. The macrotasking library routines are used in mapping each domain to a user task. Computational speed-up and efficiency are used to determine the effectiveness of the algorithm. The effect of the number of domains, the number of degrees-of-freedom located along the global fronts and the dimension of the subspace on the performance of the algorithm are investigated. A parallel finite element dynamic analysis program, p-feda, is documented and the performance of its subroutines in parallel environment is analyzed.

Akl, F. A.↗

NASA NTRS1990

An analysis of scatter decomposition

A formal analysis of a powerful mapping technique known as scatter decomposition is presented. Scatter decomposition divides an irregular computational domain into a large number of equal sized pieces, and distributes them modularly among processors. A probabilistic model of workload in one dimension is used to formally explain why, and when scatter decomposition works. The first result is that if correlation in workload is a convex function of distance, then scattering a more finely decomposed domain yields a lower average processor workload variance. The second result shows that if the workload process is stationary Gaussian and the correlation function decreases linearly in distance until becoming zero and then remains zero, scattering a more finely decomposed domain yields a lower expected maximum processor workload. Finally it is shown that if the correlation function decreases linearly across the entire domain, then among all mappings that assign an equal number of domain pieces to each processor, scatter decomposition minimizes the average processor workload variance. The dependence of these results on the assumption of decreasing correlation is illustrated with situations where a coarser granularity actually achieves better load balance.

Nicol, David M.↗

NASA NTRS1990

Photonic processing at NASA Ames Research Center

The Photonic Processing group is engaged in applied research on optical processors in support of the Ames vision to lead the development of autonomous intelligent systems. Optical processors, in conjunction with numeric and symbolic processors, are needed to provide the powerful processing capability that is required for many future agency missions. The research program emphasizes application of analog optical processing, where free-space propagation between components allows natural implementations of algorithms requiring a large degree of parallel computation. Special consideration is given in the Ames program to the integration of optical processors into larger, heterogeneous computational systems. Demonstration of the effective integration of optical processors within a broader knowledge-based system is essential to evaluate their potential for dependable operation in an autonomous environment such as space. The Ames Photonics program is currently addressing several areas of interest. One of the efforts is to develop an optical correlator system with two programmable spatial light modulators (SLMs) to perform distortion invariant pattern recognition. Another area of research is optical neural networks, also for use in distortion-invariant pattern recognition.

Ochoa, Ellen↗

NASA NTRS1990

Multi-processing on supercomputers for computational aerodynamics

The MIMD concept is applied, through multitasking, with relatively minor modifications to an existing code for a single processor. This approach maps the available memory to multiple processors, exploiting the C-FORTRAN-Unix interface. An existing single processor algorithm is mapped without the need for developing a new algorithm. The procedure of designing a code utilizing this approach is automated with the Unix stream editor. A Multiple Processor Multiple Grid (MPMG) code is developed as a demonstration of this approach. This code solves the three-dimensional, Reynolds-averaged, thin-layer and slender-layer Navier-Stokes equations with an implicit, approximately factored and diagonalized method. This solver is applied to a generic, oblique-wing aircraft problem on a four-processor computer using one process for data management and nonparallel computations and three processes for pseudotime advance on three different grid systems.

Yarrow, Maurice↗

NASA NTRS1991

Gigaflop performance on a CRAY-2: Multitasking a computational fluid dynamics application

The methodology is described for converting a large, long-running applications code that executed on a single processor of a CRAY-2 supercomputer to a version that executed efficiently on multiple processors. Although the conversion of every application is different, a discussion of the types of modification used to achieve gigaflop performance is included to assist others in the parallelization of applications for CRAY computers, especially those that were developed for other computers. An existing application, from the discipline of computational fluid dynamics, that had utilized over 2000 hrs of CPU time on CRAY-2 during the previous year was chosen as a test case to study the effectiveness of multitasking on a CRAY-2. The nature of dominant calculations within the application indicated that a sustained computational rate of 1 billion floating-point operations per second, or 1 gigaflop, might be achieved. The code was first analyzed and modified for optimal performance on a single processor in a batch environment. After optimal performance on a single CPU was achieved, the code was modified to use multiple processors in a dedicated environment. The results of these two efforts were merged into a single code that had a sustained computational rate of over 1 gigaflop on a CRAY-2. Timings and analysis of performance are given for both single- and multiple-processor runs.

Tennille, Geoffrey M.↗

NASA NTRS1991

An efficient massively parallel Euler solver for unstructured grids

A data parallel mesh-vertex upwind finite-volume scheme for solving the Euler equations on triangular unstructured meshes is described. A novel vertex-based partitioning of the problem is introduced which minimizes the computation and communication costs associated with distributing the computation to the processors of a massively parallel computer. Finally, the performance of this unstructured computation on 8K processors of the Connection Machine CM-2 is compared with one processor of a Cray-YMP. The experiments show that 8K processors of the CM-2 achieve approximately 70 percent of the performance of one processor of the Cray-YMP on the unstructured mesh computations described here.

Hammond, Steven W.↗

NASA NTRS1990

An analysis of scatter decomposition

A formal analysis of a mapping method known as scatter decomposition (SD) is presented. SD divides an irregular domain into many equal-size pieces and distributes them modularly among processors. It is shown that, if a correlation in workload is a convex function of distance, then scattering a more finely decomposed domain yields a lower average processor workload variance; if the workload process is stationary Gaussian and the correlation function decreases linearly in distance to zero and then remains zero, scattering a more finely decomposed domain yields a lower expected maximum processor workload. Finally, if the correlation function decreases linearly across the entire domain, then (among all mappings that assign an equal number of domain pieces to each processor) SD minimizes the average processor workload variance. The dependence of these results on the assumption of decreasing correlation is illustrated with cases where a coarser granularity actually achieves better load balance.

Nicol, David M.↗

NASA NTRS1991

Distributed memory compiler methods for irregular problems: Data copy reuse and runtime partitioning

Outlined here are two methods which we believe will play an important role in any distributed memory compiler able to handle sparse and unstructured problems. We describe how to link runtime partitioners to distributed memory compilers. In our scheme, programmers can implicitly specify how data and loop iterations are to be distributed between processors. This insulates users from having to deal explicitly with potentially complex algorithms that carry out work and data partitioning. We also describe a viable mechanism for tracking and reusing copies of off-processor data. In many programs, several loops access the same off-processor memory locations. As long as it can be verified that the values assigned to off-processor memory locations remain unmodified, we show that we can effectively reuse stored off-processor data. We present experimental data from a 3-D unstructured Euler solver run on iPSC/860 to demonstrate the usefulness of our methods.

Das, Raja↗

NASA NTRS1991

Analysis of an initial lunar outpost life support system preliminary design

A preliminary design of a life-support system (LSS) was developed as part of an ongoing comprehensive trade study of advanced processor technologies and system architectures for an initial lunar outpost. The design is based on a mission scenario requiring intermittent occupation of a lunar-surface habitat by a crew of four. It incorporates physiochemical process technologies that were considered for Space Station Freedom. A system-level simulation model of the design was developed to obtain steady-state material balances for each LSS processor. The mass-flow rate predictions were used to obtain estimates of the LSS mass, volume, and power consumption by means of processor-sizing correlations that were extrapolated from Space Station Freedom processor designs. The results were used to analyze the impacts of varying crew size, mission duration, processor-operation strategy, and crew-cabin loads on the LSS mass, average power consumption, volume, periodic resupply mass, and waste-accumulation rates. The merits of the design were quantified relative to an open-loop LSS, and the implications of this assessment for future LSS research and technology development were identified.

Ballin, Mark G.↗

NASA NTRS1991

AR/D image processing system

General Dynamics has developed advanced hardware, software, and algorithms for use with the Tomahawk cruise missile and other unmanned vehicles. We have applied this technology to the problem of locating and determining the orientation of the docking port of a target vehicle with respect to an approaching spacecraft. The system described in this presentation utilizes a multi-processor based computer to digitize and process television imagery and extract parameters such as range to the target vehicle, approach, velocity, and pitch and yaw angles. The processor is based on the Inmos T-800 Transputer and is configured as a loosely coupled array. Each processor operates asynchronously and has its own local memory. This allows additional processors to be easily added if additional processing power is required for more complex tasks. Total system throughput is approximately 100 MIPS (scalar) and 60 MFLOPS and can be expanded as desired. The algorithm implemented on the system uses a unique adaptive thresholding technique to locate the target vehicle and determine the approximate position of the docking port. A target pattern surrounding the port is than analyzed in the imagery to determine the range and orientation of the target. This information is passed to an autopilot which uses it to perform course and speed corrections. Future upgrades to the processor are described which will enhance its capabilities for a variety of missions.

Wookey, Cathy↗

NASA NTRS1993

Efficiently modeling neural networks on massively parallel computers

Neural networks are a very useful tool for analyzing and modeling complex real world systems. Applying neural network simulations to real world problems generally involves large amounts of data and massive amounts of computation. To efficiently handle the computational requirements of large problems, we have implemented at Los Alamos a highly efficient neural network compiler for serial computers, vector computers, vector parallel computers, and fine grain SIMD computers such as the CM-2 connection machine. This paper describes the mapping used by the compiler to implement feed-forward backpropagation neural networks for a SIMD (Single Instruction Multiple Data) architecture parallel computer. Thinking Machines Corporation has benchmarked our code at 1.3 billion interconnects per second (approximately 3 gigaflops) on a 64,000 processor CM-2 connection machine (Singer 1990). This mapping is applicable to other SIMD computers and can be implemented on MIMD computers such as the CM-5 connection machine. Our mapping has virtually no communications overhead with the exception of the communications required for a global summation across the processors (which has a sub-linear runtime growth on the order of O(log(number of processors)). We can efficiently model very large neural networks which have many neurons and interconnects and our mapping can extend to arbitrarily large networks (within memory limitations) by merging the memory space of separate processors with fast adjacent processor interprocessor communications. This paper will consider the simulation of only feed forward neural network although this method is extendable to recurrent networks.

Farber, Robert M.↗