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Failure of the ERBE scanner instrument aboard NOAA 10 spacecraft and results of failure analysis

The Earth Radiation Budget Experiment (ERBE) scanner instrument on the NOAA 10 spacecraft malfunctioned on May 22, 1989, after more than 4 years of in-flight operation. After the failure, all instrument operational mode commands were tested and the resulting data analyzed. Details of the tests and analysis of output data are discussed therein. The radiometric and housekeeping data appear to be valid. However, the instrument will not correctly execute operational scan mode commands or the preprogrammed calibration sequences. The data indicate the problem is the result of a failure in the internal address decoding circuity in one of the ROM (read only memory) chips of the instrument computer.

Miller, J. B.↗

An overview of the Solar, Anomalous, and Magnetospheric Particle Explorer (SAMPEX) mission

The scientific objective of the NASA Small-class Explorer Mission SAMPEX is summarized. A brief history of the Small Explorer program is provided along with a description of the SAMPEX project development and structure. The spacecraft and scientific instrument configuration is presented. The orbit of SAMPEX has an altitude of 520 by 670 km and an 82 deg inclination. Maximum possible power is provided by articulated solar arrays that point continuously toward the sun. Highly sensitive science instruments point generally toward the local zenith, especially over the terrestrial poles, in order to measure optimally the galactic and solar cosmic ray flux. Energetic magnetospheric particle precipitation is monitored at lower geomagnetic latitudes. The spacecraft uses several innovative approaches including an optical fiber bus, powerful onboard computers, and large solid state memories (instead of tape recorders). Spacecraft communication and data acquisition are discussed, and the space- and ground-segment data flows are summarized. A mission lifetime of 3 years is sought with the goal of extending data acquisition over an even longer portion of the 11-year solar activity cycle.

Baker, Daniel N.↗

Shape Control of Solar Collectors Using Shape Memory Alloy Actuators

Solar collectors that are focused on a central receiver are designed with a mechanism for defocusing the collector or disabling it by turning it out of the path of the sun's rays. This is required to avoid damaging the receiver during periods of inoperability. In either of these two cases a fail-safe operation is very desirable where during power outages the collector passively goes to its defocused or deactivated state. This paper is principally concerned with focusing and defocusing the collector in a fail-safe manner using shape memory alloy actuators. Shape memory alloys are well suited to this application in that once calibrated the actuators can be operated in an on/off mode using a minimal amount of electric power. Also, in contrast to other smart materials that were investigated for this application, shape memory alloys are capable of providing enough stroke at the appropriate force levels to focus the collector. Design and analysis details presented, along with comparisons to test data taken from an actual prototype, demonstrate that the collector can be repeatedly focused and defocused within accuracies required by typical solar energy systems. In this paper the design, analysis and testing of a solar collector which is deformed into its desired shape by shape memory alloy actuators is presented. Computations indicate collector shapes much closer to spherical and with smaller focal lengths can be achieved by moving the actuators inward to a radius of approximately 6 inches. This would require actuators with considerably more stroke and some alternate SMA actuators are currently under consideration. Whatever SMA actuator is finally chosen for this application, repeatability and fatigue tests will be required to investigate the long term performance of the actuator.

Lobitz, D. W.↗

Visualization Co-Processing of a CFD Simulation

OVERFLOW, a widely used CFD simulation code, is combined with a visualization system, pV3, to experiment with an environment for simulation/visualization co-processing on a SGI Origin 2000 computer(O2K) system. The shared memory version of the solver is used with the O2K 'pfa' preprocessor invoked to automatically discover parallelism in the source code. No other explicit parallelism is enabled. In order to study the scaling and performance of the visualization co-processing system, sample runs are made with different processor groups in the range of 1 to 254 processors. The data exchange between the visualization system and the simulation system is rapid enough for user interactivity when the problem size is small. This shared memory version of OVERFLOW, with minimal parallelization, does not scale well to an increasing number of available processors. The visualization task takes about 18 to 30% of the total processing time and does not appear to be a major contributor to the poor scaling. Improper load balancing and inter-processor communication overhead are contributors to this poor performance. Work is in progress which is aimed at obtaining improved parallel performance of the solver and removing the limitations of serial data transfer to pV3 by examining various parallelization/communication strategies, including the use of the explicit message passing.

Vaziri, Arsi↗

Toward Automatic Scalability Analysis of Message Passing Programs: A Case Study

Scalability analysis forms an important component of any performance debugging cycle, for massively parallel machines. However, tools that help in performing such analysis for parallel programs are non-existent. The primary reason for lack of such tools is the complexity involved in capturing program dynamics such as communication-computation overlap, communication latencies and memory hierarchy reference patterns. In this paper, we highlight some simple techniques that can be used to study scalability of explicit message-passing parallel programs that consider the above issues. We start from the high level source code and use a methodology for deducing communication characteristics and its impact on the total execution time of the program. The approach is validated with the help of a pipelined method for solving scalar tri-diagonal systems, using both simulations and symbolic cost models on the Intel hypercube.

Sarukkai, Sekhar R.↗

Advanced Unstructured Grid Generation for Complex Aerodynamic Applications

A new approach for distribution of grid points on the surface and in the volume has been developed and implemented in the NASA unstructured grid generation code VGRID. In addition to the point and line sources of prior work, the new approach utilizes surface and volume sources for automatic curvature-based grid sizing and convenient point distribution in the volume. A new exponential growth function produces smoother and more efficient grids and provides superior control over distribution of grid points in the field. All types of sources support anisotropic grid stretching which not only improves the grid economy but also provides more accurate solutions for certain aerodynamic applications. The new approach does not require a three-dimensional background grid as in the previous methods. Instead, it makes use of an efficient bounding-box auxiliary medium for storing grid parameters defined by surface sources. The new approach is less memory-intensive and more efficient computationally. The grids generated with the new method either eliminate the need for adaptive grid refinement for certain class of problems or provide high quality initial grids that would enhance the performance of many adaptation methods.

Pirzadeh, Shahyar Z.↗

Advanced Unstructured Grid Generation for Complex Aerodynamic Applications

A new approach for distribution of grid points on the surface and in the volume has been developed. In addition to the point and line sources of prior work, the new approach utilizes surface and volume sources for automatic curvature-based grid sizing and convenient point distribution in the volume. A new exponential growth function produces smoother and more efficient grids and provides superior control over distribution of grid points in the field. All types of sources support anisotropic grid stretching which not only improves the grid economy but also provides more accurate solutions for certain aerodynamic applications. The new approach does not require a three-dimensional background grid as in the previous methods. Instead, it makes use of an efficient bounding-box auxiliary medium for storing grid parameters defined by surface sources. The new approach is less memory-intensive and more efficient computationally. The grids generated with the new method either eliminate the need for adaptive grid refinement for certain class of problems or provide high quality initial grids that would enhance the performance of many adaptation methods.

Pirzadeh, Shahyar↗

Vector-Ordering Filter Procedure for Data Reduction

The vector-ordering filter (VOF) technique involves a procedure for sampling a large population of data vectors to select a subset of data vectors that fully characterize the state space of the large population. The VOF technique enables a large reduction of the volume of data that must be handled in the automated monitoring system and method discussed in the two immediately preceding articles. In so doing, the VOF technique enables the development of data-driven mathematical models of a monitored asset from sets of data that would otherwise exceed the memory capacities of conventional engineering computers. Data-driven mathematical models have been shown to offer high fidelity for purposes of control and monitoring of assets. In practice, a collection of asset-operating observations is acquired with the intention that the collection contain observations characteristic of the full dynamic range of operation of the asset. Often, such a collection contains an extremely large number of observations, many of which are redundant. The VOF technique fills the need for a means to extract, from the original collection of observational data, a reduced data matrix that excludes redundant data while maintaining the full statistical character and dynamic range of the original data. The reduced data matrix can then be used as the input data for development of a mathematical model of the monitored asset, or as training data for a neural-network substitute for an explicit mathematical model of the asset. Alternatively, the reduced data matrix can, itself, be used directly as a mathematical model of the monitored asset, as is commonly done in multivariate state-estimation techniques. The original data are collected from the asset over a range of operating states and are put in matrix form. Each column vector in the original data matrix represents the signal values acquired at a particular operational state of the asset. Thus, the number of columns of the original data matrix equals the number of observed states and the number of rows in this matrix equals the number of signals acquired at each observation. In the VOF technique, one extracts the reduced data matrix from the original data matrix through the selection of a representative subset of the column (state) vectors.

Bickford, Randall L.↗

The Use of Field Programmable Gate Arrays (FPGA) in Small Satellite Communication Systems

This paper will describe the use of digital Field Programmable Gate Arrays (FPGA) to contribute to advancing the state-of-the-art in software defined radio (SDR) transponder design for the emerging SmallSat and CubeSat industry and to provide advances for NASA as described in the TAO5 Communication and Navigation Roadmap (Ref 4). The use of software defined radios (SDR) has been around for a long time. A typical implementation of the SDR is to use a processor and write software to implement all the functions of filtering, carrier recovery, error correction, framing etc. Even with modern high speed and low power digital signal processors, high speed memories, and efficient coding, the compute intensive nature of digital filters, error correcting and other algorithms is too much for modern processors to get efficient use of the available bandwidth to the ground. By using FPGAs, these compute intensive tasks can be done in parallel, pipelined fashion and more efficiently use every clock cycle to significantly increase throughput while maintaining low power. These methods will implement digital radios with significant data rates in the X and Ka bands. Using these state-of-the-art technologies, unprecedented uplink and downlink capabilities can be achieved in a 1/2 U sized telemetry system. Additionally, modern FPGAs have embedded processing systems, such as ARM cores, integrated inside the FPGA allowing mundane tasks such as parameter commanding to occur easily and flexibly. Potential partners include other NASA centers, industry and the DOD. These assets are associated with small satellite demonstration flights, LEO and deep space applications. MSFC currently has an SDR transponder test-bed using Hardware-in-the-Loop techniques to evaluate and improve SDR technologies.

Varnavas, Kosta↗

The Generic Resolution Advisor and Conflict Evaluator (GRACE) for Detect-And-Avoid Systems

Java Architecture for Detect-And-Avoid (DAA) Extensibility and Modeling (JADEM) was developed at NASA Ames Research Center as a research and modeling tool for Unmanned Aircraft Systems (UAS) Integration in the National Airspace System (NAS). UAS will be required to have DAA systems in order to fulfill the regulatory requirement to remain well clear'' of other traffic. JADEM supports research on technological requirements and Minimum Operational Performance Standards (MOPS) for UAS DAA systems by providing a flexible and extensible software platform that includes models and algorithms for all major DAA functions. This paper describes one of these algorithms, the Generic Resolution Advisor and Conflict Evaluator (GRACE). GRACE supports two core DAA functions: threat evaluation and guidance. GRACE is generic in the sense that it is designed to work with any aircraft or sensor type (both cooperative and non-cooperative), and to be used in various applications and DAA guidance concepts, thus supporting evolving MOPS requirements and research. GRACE combines flexibility, robustness, and computational efficiency. It has modest memory requirements and can handle multiple cooperative and noncooperative intruders. GRACE has been used as a core JADEM component in several real-time and fast-time experiments, including human-in-the-loop simulations and live flight tests.

detect and avoid↗

Design, processing, and testing of lsi arrays for space station

The design of a MOS 256-bit Random Access Memory (RAM) is discussed. Technological achievements comprise computer simulations that accurately predict performance; aluminum-gate COS/MOS devices including a 256-bit RAM with current sensing; and a silicon-gate process that is being used in the construction of a 256-bit RAM with voltage sensing. The Si-gate process increases speed by reducing the overlap capacitance between gate and source-drain, thus reducing the crossover capacitance and allowing shorter interconnections. The design of a Si-gate RAM, which is pin-for-pin compatible with an RCA bulk silicon COS/MOS memory (type TA 5974), is discussed in full. The Integrated Circuit Tester (ICT) is limited to dc evaluation, but the diagnostics and data collecting are under computer control. The Silicon-on-Sapphire Memory Evaluator (SOS-ME, previously called SOS Memory Exerciser) measures power supply drain and performs a minimum number of tests to establish operation of the memory devices. The Macrodata MD-100 is a microprogrammable tester which has capabilities of extensive testing at speeds up to 5 MHz. Beam-lead technology was successfully integrated with SOS technology to make a simple device with beam leads. This device and the scribing are discussed.

Lile, W. R.↗

NOR Flash Memory Scrubbing Application for Boot File Preservation of NASA’s Descent and Landing Computer (DLC)

Progress on NASA’s Safe and Precise Landing Integrated Capabilities Evolution (SPLICE)project continues, specifically with this development of the Descent and Landing Computer(DLC). One of the DLC’s primary contributions as a SPLICE technology is its implementationof algorithms and operation of sensors to autonomously guide a spacecraft in performing moreprecise and safer landings on celestial bodies such as the Moon and Mars. The second iterationof the DLC is known as the Engineering Test Unit (ETU) and one of its desired functionalitiesis the ability to preserve the fidelity of the system’s boot file through the use of memoryscrubbing. The ETU has two primary boards, one for housing a Multi-Processor System ona Chip (MPSoC) and the other for housing a Xilinx Kintex Ultrascale FPGA3. To emulate amemory scrubbing function implemented on the ETU’s FPGA board, the design and testingof a software application was performed on a Xilinx KCU105 FPGA evaluation board. Thememory scrubbing application had to meet certain key criteria such as (1) properly utilize withthe flash memory’s Serial Peripheral Interface (SPI) to read, write, and erase flash memoryproperly, (2) be able to detect arbitrarily large or small amounts of bit-errors, (3) be able tocorrect all detected errors, and (4) perform memory scrubbing indefinitely and autonomously.A prototype implementation was constructed and tested, demonstrating successful detectionand correction of bit errors in multiple configurations. In the form of burst errors or singularbit flips, and in amounts of errors ranging from one to fifteen (per 256 Bytes), the applicationwas successful in preserving memory fidelity.

Radiation tolerant↗

Experimental evaluation of multiprocessor cache-based error recovery

Several variations of cache-based checkpointing for rollback error recovery in shared-memory multiprocessors have been recently developed. By modifying the cache replacement policy, these techniques use the inherent redundancy in the memory hierarchy to periodically checkpoint the computation state. Three schemes, different in the manner in which they avoid rollback propagation, are evaluated. By simulation with address traces from parallel applications running on an Encore Multimax shared-memory multiprocessor, the performance effect of integrating the recovery schemes in the cache coherence protocol are evaluated. The results indicate that the cache-based schemes can provide checkpointing capability with low performance overhead but uncontrollable high variability in the checkpoint interval.

Janssens, Bob↗

A view into FleCSI [Slides]

FleCSI is largely based around sharing of memory spaces. FleCSI facilitates parallel execution and sharing of memory across memory spaces. Execute() transforms sender-side data structures into receiver-side data structures.

97 MATHEMATICS AND COMPUTING↗

Exploring the use of I/O nodes for computation in a MIMD multiprocessor

As parallel systems move into the production scientific-computing world, the emphasis will be on cost-effective solutions that provide high throughput for a mix of applications. Cost effective solutions demand that a system make effective use of all of its resources. Many MIMD multiprocessors today, however, distinguish between 'compute' and 'I/O' nodes, the latter having attached disks and being dedicated to running the file-system server. This static division of responsibilities simplifies system management but does not necessarily lead to the best performance in workloads that need a different balance of computation and I/O. Of course, computational processes sharing a node with a file-system service may receive less CPU time, network bandwidth, and memory bandwidth than they would on a computation-only node. In this paper we begin to examine this issue experimentally. We found that high performance I/O does not necessarily require substantial CPU time, leaving plenty of time for application computation. There were some complex file-system requests, however, which left little CPU time available to the application. (The impact on network and memory bandwidth still needs to be determined.) For applications (or users) that cannot tolerate an occasional interruption, we recommend that they continue to use only compute nodes. For tolerant applications needing more cycles than those provided by the compute nodes, we recommend that they take full advantage of both compute and I/O nodes for computation, and that operating systems should make this possible.

Kotz, David↗

Towards Accurate and Efficient Predictions of Martensitic Transition Temperatures for Shape Memory Alloys from First Principles

Recent rapid progresses in physics theory and computational power have made it possible to predict the martensitic transition temperatures (MTTs) in shape memory alloys (SMAs) from first principles [1-3]. In particular, rigorous while time-consuming thermodynamic integration has been employed to compute the anharmonic phonon free energies, which play a crucial role in determining martensitic phase transitions in SMAs. However, this approach has only been applied to simple binaries, and its accuracy is unsatisfying for certain SMAs such as the most commonly used NiTi. In this work, we report on several new developments to our method that bring first-principles theory and experiment much closer into agreement including the MTT of NiTi, and that improve the computational efficiency significantly. We have applied our refined approach to investigate the Ni0.5Ti0.5-xHfx and PdxNi0.5-xTi0.5 ternaries, and the predicted MTT for each composition is within 100K compared with experiment. We will address various techniques to overcome the difficulty encountered in studying ternaries. Our theoretical approach is expected to be a broadly applicable and predictive theory for designing complex SMAs with desirable properties. [1] J.B. Haskins, A.E. Thompson,and J.W. Lawson, Phys. Rev B 94, 214110 (2016). [2] J.B. HaskinsandJ.W. Lawson, J. App. Phys. 121, 205103 (2017). [3] J.B. Haskins, H. Malmir, S. J. Honrao, L. A. Sandoval, and J.W. Lawson, Acta Materialia 212, 116872 (2017).

Zhigang Wu↗

Towards Accurate and Efficient Predictions of Martensitic Transition Temperatures for Shape Memory Alloys from First Principles

Recent rapid progresses in physics theory and computational power have made it possible to predict the martensitic transition temperatures (MTTs) in shape memory alloys (SMAs) from first principles [1-3]. In particular, rigorous while time-consuming thermodynamic integration has been employed to compute the anharmonic phonon free energies, which play a crucial role in determining martensitic phase transitions in SMAs. However, this approach has only been applied to simple binaries, and its accuracy is unsatisfying for certain SMAs such as the most commonly used NiTi. In this work, we report on several new developments to our method that bring first-principles theory and experiment much closer into agreement including the MTT of NiTi, and that improve the computational efficiency significantly. We have applied our refined approach to investigate the Ni0.5Ti0.5-xHfx and PdxNi0.5-xTi0.5 ternaries, and the predicted MTT for each composition is within 100K compared with experiment. We will address various techniques to overcome the difficulty encountered in studying ternaries. Our theoretical approach is expected to be a broadly applicable and predictive theory for designing complex SMAs with desirable properties.

Zhigang Wu↗

A Byzantine resilient processor with an encoded fault-tolerant shared memory

The memory requirements for ultra-reliable computers are expected to increase due to future increases in mission functionality and operating-system requirements. This increase will have a negative effect on the reliability and cost of the system. Increased memory size will also reduce the ability to reintegrate a channel after a transient fault, since the time required to reintegrate a channel in a conventional fault-tolerant processor is dominated by memory realignment time. A Byzantine Resilient Fault-Tolerant Processor with Fault-Tolerant Shared Memory (FTP/FTSM) is presented as a solution to these problems. The FTSM uses an encoded memory system, which reduces the memory requirement by one-half compared to a conventional quad-FTP design. This increases the reliability and decreases the cost of the system. The realignment problem is also addressed by the FTSM. Because any single error is corrected upon a read from the FTSM, a faulty channel's corrupted memory does not need realignment before reintegration of the faulty channel. A combination of correct-on-access and background scrubbing is proposed to prevent the accumulation of transient errors in the memory. With a hardware-implemented scrubber, the scrubbing cycle time, and therefore the memory fault latency, can be upper-bounded at a small value. This technique increases the reliability of the memory system and facilitates validation of its reliability model.

Butler, Bryan↗