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At least 1,027 records · Page 57

Monolithic optoelectronic circuit design for on-chip terahertz applications

We demonstrate a monolithic coplanar stripline platform for on-chip terahertz (THz) generation, transmission, and detection, addressing key challenges of mode purity, bandwidth, and referencing. Capacitive coupling of the photoconductive generator switch enforces pure odd-mode propagation, increases THz field strength, and extends the operational frequency range, achieving 0.05–1.4 THz. Our architecture enables fully monolithic fabrication with amorphous silicon switches, in situ field referencing, and galvanic isolation between generation and detection. Finite-element simulations and experiments confirm that suppressing parasitic modes improves signal integrity, providing a robust platform for high-fidelity THz spectroscopy, ultrafast electronics, and nanoscale quantum materials research.

Capacitive coupling↗

Thermionic Emission and Negative dI/dV in Photoactive Graphene Heterostructures

Transport in photoactive graphene heterostructures, originating from the dynamics of photogenerated hot carriers, is governed by the processes of thermionic emission, electron–lattice thermal imbalance, and cooling. These processes give rise to interesting photoresponse effects, in particular negative differential resistance (NDR) arising in the hot-carrier regime. The NDR effect stems from a strong dependence of electron–lattice cooling on the carrier density, which results in the carrier temperature dropping precipitously upon increasing bias. Finally, the ON–OFF switching between the NDR regime and the conventional cold emission regime, as well as the gate-controlled closed-circuit current that is present at zero bias voltage, can serve as signatures of hot-carrier dominated transport.

42 ENGINEERING↗

Busbar Design and Optimization for Voltage Overshoot Mitigation of a Silicon Carbide High-Power Three-Phase T-Type Inverter

The silicon carbide (SiC) devices have faster switching speed than that of the conventional silicon (Si) devices, which however may cause excessive device voltage overshoot. Larger gate resistance can help to restrain the overshoot, it however slows down the switching speed and increases switching losses. There are other methods that can mitigate the voltage overshoot, e.g., using low-inductance busbars, adding snubber circuits, etc. In this article, the busbar design for a 250-kW SiC three-level T-type inverter is investigated. The current commutation loops (CCLs) are first analyzed using a single-phase equivalent circuit. Then the detailed busbar design methods, especially a 3-D busbar design concept, are proposed to select the optimal stacking order for the multilayer laminated busbar and to address constraints posed by the physical terminal arrangements of SiC modules and dc-link capacitors. The stray inductance in each CCL is extracted via a finite element analysis and validated on the actual inverter busbar prototypes using an impedance analyzer. To further minimize the busbar stray inductance, a hybrid busbar structure with printed circuit board based buffer circuit using high-frequency decoupling capacitors is designed and evaluated in this article. Lastly, the effectiveness of the designed busbars as well as the buffer circuit are validated using experimental studies.

42 ENGINEERING↗

Gallium Arsenide Semiconductor Opening Switches: Enabling Nanosecond High Powering Pulsed Systems

The goal of this work awas to investigate design manufacturing semiconductor opening switches (SOS) in both silicon and gallium arsenide (GaAs). Solid-state opening switches are critical components for pulsed power systems and applications in directed energy, dielectric wall accelerators, and novel semiconductor manufacturing techniques. Under this funding, we have developed silicon SOS designs that suppresses an unwanted prepulse, increases the peak output voltage by about 10 percent, and reduces the pulse rise time by ~ 4x compared with more conventional profiles. Through this effort we have improved device fabrication and bonding techniques. Additionally, work on this the GaAs opening switch has defined a unique application space that these devices are suited for. GaAs opening switches have short risetimes and pulse widths compared to silicon devices, however the short carrier lifetime of GaAs makes the circuit design more challenging than in silicon. For high PRF operation, the lifetime of the GaAs is an advantage compared to silicon. TCAD simulations of GaAs devices have been used to optimize a GaAs profile. Additionally, we have designed pulsers with sub 50ns reserve pump times and tested GaAs COTs PIN diodes in them.

42 ENGINEERING↗

Predicting performance of power converters operating with switching frequencies in the vicinity of 100 kHZ

A model describing the turning-on period of a power switching transistor in an energy storage voltage step-up converter is presented. Comparisons between an experimental layout and the circuit model during the turning-on interval demonstrate the ability of the model to closely predict the effects of circuit topology on the performance of the converter. A phenomenon of particular importance that is observed in the experimental circuits and is predicted by the model is the deleterious feedback effect of the parasitic emitter lead inductance on the base current waveform during the turning-on interval.

Bahler, D. D.↗

A transportable 50 kA dual mode lightning simulator

A transportable lightning simulator was designed, built and tested, which is capable of delivering more than 50 kA to an 8 micro-H test object. The simulator was designed to be a versatile device in the lightning laboratory while meeting the requirements of MIL-STD-1757A for component E current waveforms. The system is capable of operating in either a ringing mode with a Q greater than 5 and a nominal frequency of 160 kHz, or a unipolar mode with no hardware configuration changes. The ringing mode is obtained by the LCR series circuit formed by the pulse generator and test object. The unipolar mode is obtained by closing an electrically triggered crowbar switch at peak current. The simulator exceeds the peak current requirement and rate of rise requirements for MIL-STD-1757A in both the ringing and unipolar modes. The pulse half width in the unipolar mode is in excess of 50 microsec and the action is in excess of 10(exp 5) A(exp 2)s. The design, component values, and test results are presented.

Salisbury, K.↗

Single Event Transients in Linear Integrated Circuits

On November 5, 2001, a processor reset occurred on board the Microwave Anisotropy Probe (MAP), a NASA mission to measure the anisotropy of the microwave radiation left over from the Big Bang. The reset caused the spacecraft to enter a safehold mode from which it took several days to recover. Were that to happen regularly, the entire mission would be compromised, so it was important to find the cause of the reset and, if possible, to mitigate it. NASA assembled a team of engineers that included experts in radiation effects to tackle the problem. The first clue was the observation that the processor reset occurred during a solar event characterized by large increases in the proton and heavy ion fluxes emitted by the sun. To the radiation effects engineers on the team, this strongly suggested that particle radiation might be the culprit, particularly when it was discovered that the reset circuit contained three voltage comparators (LM139). Previous testing revealed that large voltage transients, or glitches appeared at the output of the LM139 when it was exposed to a beam of heavy ions [NI96]. The function of the reset circuit was to monitor the supply voltage and to issue a reset command to the processor should the voltage fall below a reference of 2.5 V [PO02]. Eventually, the team of engineers concluded that ionizing particle radiation from the solar event produced a negative voltage transient on the output of one of the LM139s sufficiently large to reset the processor on MAP. Fortunately, as of the end of 2004, only two such resets have occurred. The reset on MAP was not the first malfunction on a spacecraft attributed to a transient. That occurred shortly after the launch of NASA s TOPEX/Poseidon satellite in 1992. It was suspected, and later confirmed, that an anomaly in the Earth Sensor was caused by a transient in an operational amplifier (OP-15) [KO93]. Over the next few years, problems on TDRS, CASSINI, [PR02] SOHO [HA99,HA01] and TERRA were also attributed to transients. In some cases, such events produced resets by falsely triggering circuits designed to protect against over- voltage or over-current. On at least three occasions, transients caused satellites to switch into "safe mode" in which most of the systems on board the satellites were powered down for an extended period. By the time the satellites were reconfigured and returned to full operational state, much scientific data had been lost. Fortunately, no permanent damage occurred in any of the systems and they were all successfully re-activated.

Buchner, Stephen↗

Decentralized Interleaving of Paralleled Dc-Dc Buck Converters: Preprint

We present a decentralized control strategy that yields switch interleaving among parallel connected dc-dc buck converters without communication. The proposed method is based on the digital implementation of the dynamics of a nonlinear oscillator circuit as the controller. Each controller is fully decentralized, i.e., it only requires the locally measured output current to synthesize the pulse width modulation (PWM) carrier waveform. By virtue of the intrinsic electrical coupling between converters, the nonlinear oscillator-based controllers converge to an interleaved state with uniform phase-spacing across PWM carriers. To the knowledge of the authors, this work represents the first fully decentralized strategy for switch interleaving of paralleled dc-dc buck converters.

14 SOLAR ENERGY↗

Response of a Memristive Biomembrane and Demonstration of Potential Use in Online Learning

The pervasive von Neumann architecture uses complex processor cores and sequential computation. In contrast, the brain is massively parallel and highly efficient, owing to the ability of the neurons and synapses to store and process information simultaneously and to adapt according to incoming information. These features have motivated researchers to develop a host of brain-inspired computers, devices, and models, collectively referred to as neuromorphic computing systems. The quest for synaptic materials capable of closely mimicking biological synapses has led to an alamethicin-doped, synthetic biomembrane with volatile memristive properties which can emulate key synaptic functions to facilitate learning and computation. In contrast to its solid-state counterparts, this two-terminal, biomolecular memristor features similar structure, switching mechanisms, and ionic transport modality as biological synapses while consuming considerably lower power. To use the device as a circuit element, it is important to understand its response to different kinds of input signals. Here we develop a simplified closed form analytical solution based on the underlying state equations for pulse and sine wave inputs. A Verilog-A model based on Runge-Kutta method was developed to incorporate the device in a circuit simulator. Finally, the paper demonstrates possible applications for short- and long-term learning using its unique volatile memristive properties.

Hasan, Md Sakib↗

An RC snubber design method to achieve optimized switching noise‐loss trade‐off of cascode GaN HEMTs

Abstract The cascode gallium nitride high electron mobility transistors (GaN HEMTs) are very vulnerable to self‐sustained turn‐off oscillation due to their cascode configuration. This paper presents a design approach for the RC snubber of cascode GaN HEMTs to achieve the optimized noise‐loss trade‐off. At first, an analytical model is proposed to describe the instability of cascode GaN HEMTs‐based test circuits utilizing RC snubber. Based on the model, an analytical approach is proposed to achieve two optimum RC snubber designs S1 and S2. The design S1 can satisfactorily dampen the oscillation with minimum switching losses. The design S2 achieves maximum effective damping on the oscillation at a minimized cost of additional power losses. In the end, the accuracy of the proposed model is validated by the double‐pulse test and good agreement is obtained.

Xue, Peng↗

Decentralized Interleaving of Paralleled Dc-Dc Buck Converters

We present a decentralized control strategy that yields switch interleaving among parallel-connected dc-dc buck converters. The proposed method is based on the digital implementation of the dynamics of a nonlinear oscillator circuit as the controller. Each controller is fully decentralized, i.e., it only requires the locally measured output current to synthesize the pulse width modulation (PWM) carrier waveform and no communication between different controllers is needed. By virtue of the intrinsic electrical coupling between converters, the nonlinear oscillator-based controllers converge to an interleaved state with uniform phase-spacing across PWM carriers. To the knowledge of the authors, this work presents the first fully decentralized strategy for switch interleaving in paralleled dc-dc buck converters.

14 SOLAR ENERGY↗

Josephson dynamics in two-dimensional ring-shaped condensates

We investigate Josephson transport in a fully closed, two-dimensional superfluid circuit formed by a ring-shaped 87 Rb Bose-Einstein condensate that contains two optical barriers acting as movable weak links. Translating these barriers at controlled speeds imposes a steady bias current, enabling direct mapping of the current-chemical-potential (𝐼−Δ⁢𝜇) characteristics. For narrow junctions (𝑤 ≈ 1µ⁢m), the circuit exhibits a pronounced dc branch that terminates at a critical current 𝐼 𝑐 = 9⁢(1) × 10 3 s −1 ; above this threshold, the system switches to an ac, resistive regime. Classical-field simulations that include the moving barriers quantitatively reproduce both the nonlinear 𝐼−Δ⁢𝜇 curve and the measured 𝐼 𝑐 , validating the underlying microscopic picture. Analysis of the ensuing phase dynamics shows that dissipation is mediated by the nucleation and traversal of vortex-antivortex pairs through the junctions, while the bulk condensate remains globally phase locked—direct evidence of the ring's topological constraint enforcing quantized circulation. These results establish a cold-atom analog of a superconducting quantum interference device in which Josephson dynamics can be resolved at the single-vortex level, providing a versatile platform for atomtronic circuit elements, nonreciprocal Josephson devices, and on-chip Sagnac interferometers for multiaxis rotation sensing.

74 ATOMIC AND MOLECULAR PHYSICS↗

A Novel Model of Thyristor in Reverse Recovery Process for Current Interruption Test of HVDC Circuit Breakers

The high voltage thyristor is widely used in high voltage DC (HVDC) grids due to its large current capability. Recently, the high voltage thyristor is implemented to produce a high current in the HVDC circuit breaker (CB) testing process. Unfortunately, the reverse recovery process (RRP) of a thyristor could induce significant turn-off overvoltage and power losses, jeopardizing the safety of the devices. The existing models of a thyristor cannot describe such hard-switching transient accurately. Therefore, this paper divides this process into four stages based on the physical mechanism and proposes a novel cosine exponential (CE), simulating the voltage and current of the thyristor with analytical equations, which are derived from the equivalent circuit. Moreover, the extraction procedure of the proposed model is illustrated in this paper. Finally, we develop an HVDC CB test platform to validate the proposed model. Experimental results show that the proposed CE model can accurately predict the overvoltage with a relative error of less than 8% at various current varying rates.

Dongye, Zhonghao↗

Nanosecond pulsed electric fields (nsPEFs) low cost generator design using power MOSFET and Cockcroft-Walton multiplier circuit as high voltage DC source

Purpose: Non-ionizing radiation therapy for cancer using pulsed electric field with high intensity field has become an interesting field new research topic. A new method using nanosecond pulsed electric fields (nsPEFs) offers a novel means to treat cancer. Not like the conventional electroporation, nsPEFs able to create nanopores in all membranes of the cell, including membrane in cell organelles, like mitochondria and nucleus. NsPEFs will promote cell death in several cell types, including cancer cell by apoptosis mechanism. NsPEFs will use pulse with intensity of electric field higher than conventional electroporation, between 20–100 kV/cm and with shorter duration of pulse than conventional electroporation. NsPEFs requires a generator to produce high voltage pulse and to achieve high intensity electric field with proper pulse width. However, manufacturing cost for creating generator that generates a high voltage with short duration for nsPEFs purposes is highly expensive. Hence, the aim of this research is to obtain the low cost generator design that is able to produce a high voltage pulse with nanosecond width and will be used for nsPEFs purposes. Method: Cockcroft-Walton multiplier circuit will boost the input of 220 volt AC into high voltage DC around 1500 volt and it will be combined by a series of power MOSFET as a fast switch to obtain a high voltage with nanosecond pulse width. The motivation using Cockcroft-Walton multiplier is to acquire a low-cost high voltage DC generator; it will use capacitors and diodes arranged like a step. Power MOSFET connected in series is used as voltage divider to share the high voltage in order not to damage them. Results: This design is expected to acquire a low-cost generator that can achieve the high voltage pulse in amount of −1.5 kV with falltime 3 ns and risetime 15 ns into a 50Ω load that will be used for nsPEFs purposes. Further detailed on the circuit design will be explained at presentation.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Substation-Level Grid Topology Optimization Using Bus Splitting: Preprint

Operations of substation circuit breakers are of high significance for performing system maintenance and topology optimization. Bus splitting is one type of topology changes where the two bus-bars at a substation become electrically disconnected after certain actions of circuit breakers. As these events involve detailed substation modeling, they are not typically considered in power system routine operation and control. In this paper, an improved substation-level topology optimization is developed by expanding traditional line switching with breaker-level bus splitting, which can further reduce grid congestion and generation costs. A tight McCormick relaxation is proposed to reformulate the bi-linear terms in the resultant topology optimization model. Thus, a tractable mixed-integer linear program formulation is presented which can be efficiently solved for real-time control. Numerical studies on the IEEE 14-bus and 118-bus systems demonstrate the performance and economic benefits of the proposed topology optimization approach.

bus split↗

A spark gap switching system for gasdynamic facilities

A spark gap switching system has been developed to coordinate the discharge of a 300 kJ capacitor bank with the high speed flow of helium in a shock tube driver. The trigger system includes a flow transducer, a pulse forming circuit, a high voltage spark generator, and four heavy duty spark gaps that can carry total peak currents greater than 1.5 million A. A glow gauge flow transducer sensitive to small gas density changes was used whose input power and signal output can withstand high voltage fluctuations. This switching system is of use with gasdynamic discharge devices requiring a minimum number of switches.

Leibowitz, L. P.↗

Electro-Thermal Characterization of Dynamical VO 2 Memristors via Local Activity Modeling

We report translating the surging interest in neuromorphic electronic components, such as those based on nonlinearities near Mott transitions, into large-scale commercial deployment faces steep challenges in the current lack of means to identify and design key material parameters. These issues are exemplified by the difficulties in connecting measurable material properties to device behavior via circuit element models. Here, the principle of local activity is used to build a model of VO 2 /SiN Mott threshold switches by sequentially accounting for constraints from a minimal set of quasistatic and dynamic electrical and high-spatial-resolution thermal data obtained via in situ thermoreflectance mapping. By combining independent data sets for devices with varying dimensions, the model is distilled to measurable material properties, and device scaling laws are established. The model can accurately predict electrical and thermal conductivities and capacitances and locally active dynamics (especially persistent spiking self-oscillations). The systematic procedure by which this model is developed has been a missing link in predictively connecting neuromorphic device behavior with their underlying material properties, and should enable rapid screening of material candidates before employing expensive manufacturing processes and testing procedures.

36 MATERIALS SCIENCE↗

The Concept of Negative Capacitance in Ionically Conductive Van der Waals Ferroelectrics

Negative capacitance (NC) provides a path to overcome the Boltzmann limit that dictates operating voltages in transistors and, therefore, may open up a path to the challenging proposition of lowering energy consumption and waste heat in nanoelectronic integrated circuits. Typically, NC effects in ferroelectric materials are based on either stabilizing a zero-polarization state or slowing down ferroelectric switching in order to access NC regimes of the free-energy distribution. Here, a fundamentally different mechanism for NC, based on CuInP 2 S 6 , a van der Waals layered ferrielectric, is demonstrated. Using density functional theory and piezo-response force microscopy, it is shown that an unusual combination of high Cu-ion mobility and its crucial role in determining polarization magnitude and orientation (P) leads to a negative slope of the polarization versus the electric field E, dP/dE < 0, which is a requirement for NC. This mechanism for NC is likely to occur in a wide class of materials, offering new possibilities for NC-based devices. Finally, the nanoscale demonstration of this mechanism can be extended to the device-level by increasing the regions of homogeneous polarization and polarization switching, for example, through strain engineering and carefully selected electric field pulses.

36 MATERIALS SCIENCE↗