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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 1,009 records · Page 56

Distributionally Safe Path Planning: Wasserstein Safe RRT

In this paper, we propose a Wasserstein metric-based random path planning algorithm. Wasserstein Safe RRT (W-Safe RRT) provides finite-sample probabilistic guarantees on the safety of a returned path in an uncertain obstacle environment. Vehicle and obstacle states are modeled as distributions based upon state and model observations. Additionally, we define limits on distributional sampling error so the Wasserstein distance between a vehicle state distribution and obstacle distributions can be bounded. This enables the algorithm to return safe paths with a confidence bound through combining finite sampling error bounds with calculations of the Wasserstein distance between discrete distributions. W-Safe RRT is compared against a baseline minimum encompassing ball algorithm, which ensures balls that minimally encompass discrete state and obstacle distributions do not overlap. The improved performance is verified in a 3D environment using single, multi, and rotating non-convex obstacle cases, with and without forced obstacle error in adversarial directions, showing that W-Safe RRT can handle poorly modeled complex environments.

42 ENGINEERING↗

Blockchains for Transactive Energy Systems: Opportunities, Challenges, and Approaches

The emergence of blockchains and smart contracts has renewed interest in electrical cyberphysical systems, especially transactive energy systems. Here, to address the associated challenges, we present TRANSAX, a blockchain-based transactive energy system that provides an efficient, safe, and privacy-preserving market built on smart contracts.

29 ENERGY PLANNING, POLICY, AND ECONOMY↗

A Confidence-Guided Technique for Tracking Time-Varying Features

Application scientists often employ feature tracking algorithms to capture the temporal evolution of various features in their simulation data. However, as the complexity of the scientific features is increasing with the advanced simulation modeling techniques, quantification of reliability of the feature tracking algorithms is becoming important. One of the desired requirements for any robust feature tracking algorithm is to estimate its confidence during each tracking step so that the results obtained can be interpreted without any ambiguity. To address this, we develop a confidence-guided feature tracking algorithm that allows reliable tracking of user-selected features and presents the tracking dynamics using a graph-based visualization along with the spatial visualization of the tracked feature. Here, the efficacy of the proposed method is demonstrated by applying it to two scientific datasets containing different types of time-varying features.

97 MATHEMATICS AND COMPUTING↗

Will Stochastic Devices Play Nice With Others in Neuromorphic Hardware?: There’s More to a Probabilistic System Than Noisy Devices

Achieving brain-like efficiency in computing requires a co-design between the development of neural algorithms, brain-inspired circuit design, and careful consideration of how to use emerging devices. The recognition that leveraging device-level noise as a source of controlled stochasticity represents an exciting prospect of achieving brain-like capabilities in probabilistic neural algorithms, but the reality of integrating stochastic devices with deterministic devices in an already-challenging neuromorphic circuit design process is formidable. Here, we explore how the brain combines different signaling modalities into its neural circuits as well as consider the implications of more tightly integrated stochastic, analog, and digital circuits. Further, by acknowledging that a fully CMOS implementation is the appropriate baseline, we conclude that if mixing modalities is going to be successful for neuromorphic computing, it will be critical that device choices consider strengths and limitations at the overall circuit level.

42 ENGINEERING↗

Systematic Crosstalk Mitigation for Superconducting Qubits via Frequency-Aware Compilation

One of the key challenges in current Noisy Intermediate-Scale Quantum (NISQ) computers is to control a quantum system with high-fidelity quantum gates. There are many reasons a quantum gate can go wrong - for superconducting transmon qubits in particular, one major source of gate error is the unwanted crosstalk between neighboring qubits due to a phenomenon called frequency crowding. We motivate a systematic approach for understanding and mitigating the crosstalk noise when executing near-term quantum programs on superconducting NISQ computers. Here, we present a general software solution to alleviate frequency crowding by systematically tuning qubit frequencies according to input programs, trading parallelism for higher gate fidelity when necessary. The net result is that our work dramatically improves the crosstalk resilience of tunable-qubit, fixed-coupler hardware, matching or surpassing other more complex architectural designs such as tunable-coupler systems. On NISQ benchmarks, we improve worst-case program success rate by 13.3x on average, compared to existing traditional serialization strategies.

Computer architecture↗

How Can Probabilistic Solar Power Forecasts Be Used to Lower Costs and Improve Reliability in Power Spot Markets? A Review and Application to Flexiramp Requirements

Net load uncertainty in electricity spot markets is rapidly growing. There are five general approaches by which system operators and market participants can use probabilistic forecasts of wind, solar, and load to help manage this uncertainty. These include operator situation awareness, resource risk hedging, reserves procurement, definition of contingencies, and explicit stochastic optimization. We review these approaches, and then provide a case study in which a method for using probabilistic solar forecasts to define needs for reserves is developed and evaluated. The case study has three parts. First, we describe building blocks for enhancing the Watt-Sun solar forecasting system to produce probabilistic irradiance and power forecasts. Second, relationships between Watt-Sun forecasts for multiple sites in California and the system's need for flexible ramp capability (flexiramp) are defined by machine learning and statistical methods. Third, the performance of present methods to defining flexiramp requirements, which are not conditioned on weather and renewables forecasts, is compared with that of probabilistic solar forecast-based requirements, using a multi-timescale production costing model with an 1820-bus representation of the WECC power system. Significant potential savings in fuel and flexiramp procurement costs from using solar-informed reserve requirements are found.

14 SOLAR ENERGY↗

Composite Power System Reliability with Renewables and Customer Flexibility

Composite Power System Reliability is defined as the computational procedure that quantifies the probability that the power system will perform the function of delivering electric power to customers adequately, on a continuous basis and with an acceptable quality. This definition leaves many details undefined and exemplifies the ambiguity in reliability analysis. The increasing deployment of wind and PV creates additional uncertainties that make reliability analysis a rather complex issue. Because of increased uncertainty the need for composite reliability analysis and utilization of results in power system planning is critical. New approaches are emerging for dealing with these problems from the operational point of view, including demand response programs, tapping on customer and distributed resource flexibility and new control approaches. The key question to be addressed is: how the new operational paradigms affect composite power system reliability. Here, this paper presents the ongoing work of the IEEE Composite System Reliability Task Force of the IEEE PES Reliability, Risk, Probability Application (RRPA) Subcommittee.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Forecasting Day-Ahead Solar Irradiance for Puerto Rico Using the WRF Model and NSRDB

Accurately predicting solar energy resources is a major challenge in integrating photovoltaics generation on the electric grid. Numerical weather prediction has been recognized by the solar energy community as a major approach to provide solar resource forecasts at various locations and for a variety of timescales. In this study, as a part of the Puerto Rico Grid Resilience and Transitions to 100% Renewable Energy Study (PR100), we develop day-head solar irradiance forecast data using the Weather Research and Forecasting (WRF) model at 3 km and hourly/5-minute. The global horizontal irradiance (GHI) and direct normal irradiance (DNI) forecasts simulated from the WRF model are postprocessed by a simple optimization method using satellite-derived gridded observations from the National Solar Radiation Data Base (NSRDB) to reduce error and bias of the solar irradiance forecasts covering 2018-2020. The NSRDB contributes to improving the GHI and DNI forecasts and also offers the opportunity for an in-depth analysis to evaluate their accuracy over a wide range of Puerto Rico regions. Preliminary results show overall improvements of GHI forecasts up to 37% (DNI: 15%) for mean absolute error and 97% (DNI: 76%) for mean bias error by applying a postprocessing technique to WRF model output.

data models↗

Experimental Analysis of Distribution Network Voltage Regulation Using Smart Inverters

Smart inverters (SIs) have demonstrated their potential to provide grid services for both transmission and distribution systems. One of these grid services, distribution network voltage regulation by SIs, has the potential to improve network voltage regulation through controlling the reactive and active power output of the SIs. Voltage regulation by SIs will be distributed and might be better suited to controlling local conditions to complement traditional voltage-regulating assets, e.g., tap-changing transformers, capacitor banks, and line voltage regulators. There is a gap in the literature on comparing the SI response characteristics when the SIs are controlled by a local controller or external control signals. This paper presents an experimental study to characterize SI reactive power regulation responses to two different control methods: autonomous control and remote dispatch. We found that SI reactive power regulation responses exhibit important differences between these methods in terms of delays and ramp rate. Finally, power-hardware-in-the-loop (PHIL) tests were conducted to evaluate the performance of these two methods. The PHIL test results show that the SI response characteristics for autonomous control and remote dispatch need to be considered when planning for distribution network voltage regulation using SIs.

autonomous control↗

Enabling Pulse-level Programming, Compilation, and Execution in XACC

Noisy gate-model quantum processing units (QPUs) are currently available from vendors over the cloud, and digital quantum programming approaches exist to run low-depth circuits on physical hardware. These digital representations are ultimately lowered to pulse-level instructions by vendor quantum control systems to affect unitary evolution representative of the submitted digital circuit. Vendors are beginning to open this pulse-level control system to the public via specified interfaces. Robust programming methodologies, software frameworks, and backend simulation technologies for this analog model of quantum computation will prove critical to advancing pulse-level control research and development. Prototypical use cases for this include error mitigation, optimal pulse control, and physics-inspired pulse construction. Here we present an extension to the XACC quantum-classical software framework that enables pulse-level programming for superconducting, gate-model quantum computers, and a novel, general, and extensible pulse-level simulation backend for XACC that scales on classical compute clusters via MPI. Our work enables custom backend Hamiltonian definitions and gate-level compilation to available pulses with a focus on performance and scalability. We end with a demonstration of this capability, and show how to use XACC for pertinent pulse-level programming tasks.

97 MATHEMATICS AND COMPUTING↗

Probing the Atomic Scale Mechanisms of Time Dependent Dielectric Breakdown in Si/SiO 2 MOSFETs (June 2022)

Here we report on an atomic-scale study of trap generation in the initial/intermediate stages of time-dependent dielectric breakdown (TDDB) in high-field stressed (100) Si/SiO2 MOSFETs using two powerful analytical techniques: electrically detected magnetic resonance (EDMR) and near-zero-field magnetoresistance (NZFMR). We find the dominant EDMR-sensitive traps generated throughout the majority of the TDDB process to be silicon dangling bonds at the (100) Si/SiO2 interface (Pb0 and Pb1 centers) for both the spin-dependent recombination (SDR) and trap-assisted tunneling (SDTAT) processes. We find this generation to be linked to both changes in the calculated interface state densities as well as changes in the NZFMR spectra for recombination events at the interface, indicating a redistribution of mobile magnetic nuclei which we conclude could only be due to the redistribution of hydrogen at the interface. Additionally, we observe the generation of traps known as E’ centers in EDMR measurements at lower experimental temperatures via SDR measurements at the interface. Our work strongly suggests the involvement of a rate-limiting step in the tunneling process between the silicon dangling bonds generated at the interface and the ones generated throughout the oxide.

36 MATERIALS SCIENCE↗

On the Feasibility of 1T Ferroelectric FET Memory Array

To fully exploit the ferroelectric field effect transistor (FeFET) as compact embedded nonvolatile memory for various computing and storage applications, it is desirable to use a single FeFET (1T) as a unit cell and arrange the cells into an array. However, many write mechanisms for an 1T FeFET array reported in the literature are yet to be validated experimentally. In this work, we performed a comprehensive experimental characterization on the write operations in an 1T- NOR and 1T- AND array using n-channel bulk FeFETs. We discovered that: 1) the source/drain contact can only supply minority carriers (i.e., electrons) to the channel for polarization screening during the low- V TH state programming; 2) the body contact can not only supply majority carriers (i.e., holes) for efficient high- V TH state write, but also depletion charge for low- V TH state programming, though with lower efficiency; and 3) during the low/high- V TH programming, only the path that can supply negative/positive screening charges, respectively, need to respond, which necessitates the application of proper write biases on the corresponding terminal. Based on the understanding of these write mechanisms, we show the importance of localized body contact or column-wise body contact for the successful high- V TH state programming. We also show that the previously proposed C- AND write scheme fails to program the FeFET to the low- V TH state for our devices. Finally, we propose several write schemes for both 1T- AND and 1T- NOR arrays for various scenarios providing insights for choosing the appropriate write scheme, which will facilitate the adoption of 1T FeFET memory arrays for emerging applications.

FeFET↗

A 4 kV/120 A SiC Solid-State DC Circuit Breaker Powered By a Load-Independent IPT System

This article introduces a 4 kV/120 A solid-state dc circuit breaker (DCCB) based on discrete SiC mosfets. The DCCB is designed in a five-layer tower structure. Each layer consists of a circular main conduction branch and an attached gate driver. There are two primary benefits of the proposed DCCB. First, it reduces conduction loss with multiple devices in parallel. Second, it achieves an ultrafast response speed with SiC mosfets. Moreover, the gate drivers of the DCCB are powered by a domino inductive power transfer (IPT) system. It achieves the load-independent constant-voltage output characteristics, which means the outputs are immune to load variations. Additionally, an IPT system prototype is implemented to test the power transfer performance. At 500-kHz frequency, the total output power reaches 15.73 W, which is sufficient to power on five gate drivers, with a peak transfer efficiency of 75.4%. The IPT system is tested to power a 4 kV/120 A DCCB prototype. It validates that the DCCB is effective to turn off 120 A current within 3.5 μs.

42 ENGINEERING↗

DFF Layout Variations in CMOS SOI—Analysis of Hardening by Design Options

Four D flip-flop (DFF) layouts were created from the same schematic in Sandia National Laboratories’ CMOS7 silicon-on-insulator (SOI) process. Single-event upset (SEU) modeling and testing showed an improved response with the use of shallow (not fully bottomed) N-type metal-oxide-semiconductor field-effect transistors (NMOSFETs), extending the size of the drain implant and increasing the critical charge of the transmission gates in the circuit design and layout. This research also shows the importance of correctly modeling nodal capacitance, which is a major factor determining SEU critical charge. Accurate SEU models enable the understanding of the SEU vulnerabilities and how to make the design more robust.

42 ENGINEERING↗

Impact of Surface Recombination on Single-Event Charge Collection in an SOI Technology

Semiconductor–insulator interfaces play an important role in the reliability of integrated devices; however, the impact of these interfaces on the physical mechanisms related to single-event effects has not been previously reported. We present experimental data that demonstrate that single-event charge collection can be impacted by changes in interface quality. The experimental data, combined with simulations, show that single-event response may depend on surface recombination at interface defects. The effect depends on strike location and increases with increasing linear energy transfer (LET). Surface recombination can affect single-event charge collection for interfaces with a surface recombination velocity (SRV) of 1000 cm/s and is a dominant charge collection mechanism with SRV >10 5 cm/s.

42 ENGINEERING↗

Characterization of a Small-Scale Prototype Detector With Wide Dynamic Range for Time-Resolved High-Energy X-Ray Applications

We present characterization measurements of a fast-framing, wide-dynamic-range x-ray area detector intended for high-energy applications (≥20 keV photons). The MM-PAD-2.1 combines an integrating pixel front-end with a charge-removal mechanism to extend the maximum measurable signal to > 107 20-keV ph/pixel/frame. The charge-removal mechanism is dead-time-less (i.e., incoming signal continues to be integrated by the front-end while charge removal is taking place) up to an incoming photon rate of > 109 20-keV ph/pix/s. A 16×16 pixel prototype was fabricated and characterized using both laboratory and synchrotron x-ray sources, allowing for measurements from single-photon to high-flux conditions. High-flux measurements show linear performance up to ~1010 ph/s in a spot spanning approximately 2×1.5 pixels (FWHM). The onset of temporary radiation damage in the detector was observed during these measurements, manifesting as failure of the digital readout from the detector. These effects were seen to reverse after annealing at 30° C for several hours.

47 OTHER INSTRUMENTATION↗

The Effects of Threshold Voltage and Number of Fins per Transistor on the TID Response of GF 12LP Technology

This abstract presents a comprehensive analysis of total ionizing dose (TID) response in GlobalFoundries’ 12LP 12nm bulk FinFET technology using 10keV X-rays. Devices with higher threshold voltages (VTs) demonstrated lower increases in off-state leakage current (IDS,OFF) post-irradiation, highlighting the mitigating role of high VT in TID response. Our data shows that transistors with fewer fins exhibit superior TID resistance, implying lower susceptibility to radiation effects. Our study also probed two bias conditions, "Gate-On" and "Pass-Gate," with the former displaying more severe TID degradation. Interestingly, p-type devices displayed negligible degradation, underscoring their inherent resilience to TID effects. Additionally, medium thick n-type devices echoed the fin-count-dependent TID response observed in other transistor types, further strengthening our findings. These results underscore the importance of strategic transistor selection and design for enhancing the TID resilience of future CMOS FinFET architectures, particularly critical in radiation-intense environments.

42 ENGINEERING↗