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At least 991 records · Page 55

Autonomous space processor for orbital debris

This work continues to develop advanced designs toward the ultimate goal of a Get Away Special to demonstrate economical removal of orbital debris using local resources in orbit. The fundamental technical feasibility was demonstrated in 1988 through theoretical calculations, quantitative computer animation, a solar focal point cutter, a robotic arm design, and a subscale model. Last year improvements were made to the solar cutter and the robotic arm. Also performed last year was a mission analysis that showed the feasibility of retrieving at least four large (greater than 1500-kg) pieces of debris. Advances made during this reporting period are the incorporation of digital control with the existing placement arm, the development of a new robotic manipulator arm, and the study of debris spin attenuation. These advances are discussed here.

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A general multiblock Euler code for propulsion integration. Volume 2: User guide for BCON, pre-processor for grid generation and GMBE

The BCON is a menu-driven graphics interface program whose input consists of strings or arrays of points generated from a computer aided design (CAD) tool or any other surface geometry source. The user needs to design the block topology and prepare the surface geometry definition and surface grids separately. The BCON generates input files that contain the block definitions and the block relationships required for generating a multiblock volume grid with the EAGLE grid generation package. The BCON also generates the block boundary conditions file which is used along with the block relationship file as input for the general multiblock Euler (GMBE) code (GMBE, volumes 1 and 3).

Su, T. Y.↗

Using Landsat to provide potato production estimates to Columbia Basin farmers and processors

A summary of project activities relative to the estimation of potato yields in the Columbia Basin is given. Oregon State University is using a two-pronged approach to yield estimation, one using simulation models and the other using purely empirical models. The simulation modeling approach has used satellite observations to determine key dates in the development of the crop for each field identified as potatoes. In particular, these include planting dates, emergence dates, and harvest dates. These critical dates are fed into simulation models of crop growth and development to derive yield forecasts. Two empirical modeling approaches are illustrated. One relates tuber yield to estimates of cumulative intercepted solar radiation; the other relates tuber yield to the integral under the GVI curve.

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High performance processors for real-time flight simulation

In order to meet the requirements of the NASA Langley Research Center for simulating the increased complexity and higher performance of modern aircraft, a flight simulation computing system with very high scalar performance is needed. The requirements and proposed response, probable areas of difficulty, planned implementation, and current status and plans are reviewed. A solution utilizing centralized minisupercomputers coupled with a proven real-time network technology will provide engineers and research scientists with the tools required for high-performance flight simulation. Subsequent to testing and verification of the initial simulation, general-purpose configuration management software with a nonconfiguration dependent serial highway driver software will be integrated to support any arbitrary combination of simulation sites.

Cleveland, Jeff I., II↗

Trajectory optimization for real-time guidance. I - Time-varying LQR on a parallel processor

A key algorithmic element of a real-time trajectory optimization hardware/software implementation, the quadratic program (QP) solver element, is presented. The purpose of the effort is to make nonlinear trajectory optimization fast enough to provide real-time commands during guidance of a vehicle such as an aeromaneuvering orbiter. Many methods of nonlinear programming require the solution of a QP at each iteration. In the trajectory optimization case the QP has a special dynamic programming structure, a LQR-like structure. QP algorithm speed is increased by taking advantage of this special structure and by parallel implementation.

Psiaki, Mark L.↗

Control of multiple resonant power processors in a multi-source system

Analysis and test results show that phasor-regulated, Mapham-derived resonant inverters can be paralleled to provide standardizing interfaces for multiple sources on a utility-type, aerospace power distribution bus. The basic sources do not require matching in any way, and may have grossly different characteristics. Fully stable system architectures with multiple sources, parallel/redundant distribution buses, and a wide variety of loads can be easily constructed and controlled. The commands and parameters available for system control allow for tight tolerance bus voltage control, and absolute power-sharing control from the various sources over the full range of possible source and load variations. That level of control enables simplified load power processing hardware and the distribution of losses to optimally load the source thermal control system. Positive control of all system performance and allocation of losses are not required by all missions or vehicles, and overall vehicle considerations do not always require the loads on vehicle energy sources and thermal control systems to be balanced. In those cases, power system control can be simplified, and a hierarchical set of defaults can be substituted for computer-generated or supervisory input commands to allow for stable, fully autonomous system operation.

Mildice, James↗

Time variant analysis of large scale constrained rotorcraft systems dynamics - An exploitation of IBM-3090 vector-processor's pipe-lining feature

A generalized algorithmic procedure is presented for handling the constraints in transmissions, which are treated as a multibody system of interconnected rigid/flexible bodies. The type of constraints are classified based on the interconnection of the bodies, assuming one or more points of contact to exist between them. The method is explained through flow charts and configuration/interaction tables. A significant increase in speed of execution is achieved by vectorizing the developed code in computationally intensive areas. The study of an example consisting of two meshing disks rotating at high angular velocity is carried out. The dynamic behavior of the constraint forces associated with the generalized coordinates of the system are plotted by selecting various modes. Applications are intended for the study of dynamic and subsequent prediction of constraint forces at the gear teeth contacting points in helicopter transmissions with the aim of improving performance dependability.

Amirouche, F. M. L.↗

Fault recovery characteristics of the fault tolerant multi-processor

The fault handling performance of the fault tolerant multiprocessor (FTMP) was investigated. Fault handling errors detected during fault injection experiments were characterized. In these fault injection experiments, the FTMP disabled a working unit instead of the faulted unit once every 500 faults, on the average. System design weaknesses allow active faults to exercise a part of the fault management software that handles byzantine or lying faults. It is pointed out that these weak areas in the FTMP's design increase the probability that, for any hardware fault, a good LRU (line replaceable unit) is mistakenly disabled by the fault management software. It is concluded that fault injection can help detect and analyze the behavior of a system in the ultra-reliable regime. Although fault injection testing cannot be exhaustive, it has been demonstrated that it provides a unique capability to unmask problems and to characterize the behavior of a fault-tolerant system.

Padilla, Peter A.↗

Memory Network For Distributed Data Processors

Universal Memory Network (UMN) is modular, digital data-communication system enabling computers with differing bus architectures to share 32-bit-wide data between locations up to 3 km apart with less than one millisecond of latency. Makes it possible to design sophisticated real-time and near-real-time data-processing systems without data-transfer "bottlenecks". This enterprise network permits transmission of volume of data equivalent to an encyclopedia each second. Facilities benefiting from Universal Memory Network include telemetry stations, simulation facilities, power-plants, and large laboratories or any facility sharing very large volumes of data. Main hub of UMN is reflection center including smaller hubs called Shared Memory Interfaces.

Bolen, David↗

Using LANDSAT to provide potato production estimates to Columbia Basin farmers and processors

The estimation of potato yields in the Columbia basin is described. The fundamental objective is to provide CROPIX with working models of potato production. A two-pronged approach was used to yield estimation: (1) using simulation models, and (2) using purely empirical models. The simulation modeling approach used satellite observations to determine certain key dates in the development of the crop for each field identified as potatoes. In particular, these include planting dates, emergence dates, and harvest dates. These critical dates are fed into simulation models of crop growth and development to derive yield forecasts. Purely empirical models were developed to relate yield to some spectrally derived measure of crop development. Two empirical approaches are presented: one relates tuber yield to estimates of cumulative intercepted solar radiation, the other relates tuber yield to the integral under GVI (Global Vegetation Index) curve.

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Network of dedicated processors for finding lowest-cost map path

A method and associated apparatus are disclosed for finding the lowest cost path of several variable paths. The paths are comprised of a plurality of linked cost-incurring areas existing between an origin point and a destination point. The method comprises the steps of connecting a purality of nodes together in the manner of the cost-incurring areas; programming each node to have a cost associated therewith corresponding to one of the cost-incurring areas; injecting a signal into one of the nodes representing the origin point; propagating the signal through the plurality of nodes from inputs to outputs; reducing the signal in magnitude at each node as a function of the respective cost of the node; and, starting at one of the nodes representing the destination point and following a path having the least reduction in magnitude of the signal from node to node back to one of the nodes representing the origin point whereby the lowest cost path from the origin point to the destination point is found.

Eberhardt, Silvio P.↗

Design and scheduling for periodic concurrent error detection and recovery in processor arrays

Periodic application of time-redundant error checking provides the trade-off between error detection latency and performance degradation. The goal is to achieve high error coverage while satisfying performance requirements. We derive the optimal scheduling of checking patterns in order to uniformly distribute the available checking capability and maximize the error coverage. Synchronous buffering designs using data forwarding and dynamic reconfiguration are described. Efficient single-cycle diagnosis is implemented by error pattern analysis and direct-mapped recovery cache. A rollback recovery scheme using start-up control for local recovery is also presented.

Wang, Yi-Min↗

Fault tolerance in onboard processors - Protecting efficient FDM demultiplexers

The application of convolutional codes to protect demultiplexer filter banks is demonstrated analytically for efficient implementations. An overview is given of the parameters for the efficient implementations of filter banks, and real convolutional codes are discussed in terms of DSP operations. Methods for composite filtering and parity generation are outlined, and attention is given to the protection of polyphase filter demultiplexing systems. Real convolutional codes can be applied to protect demultiplexer filter banks by employing two forms of low-rate parity calculation to each filter bank. The parity values are computed either by the output with an FIR parity filter or in parallel with the normal processing by a composite filter. Hardware similarities between the filter bank and the main demultiplexer bank permit efficient redeployment of the processing resources to the main processing function in any configuration.

Redinbo, Robert↗

Using a Cray Y-MP as an array processor for a RISC Workstation

As microprocessors increase in power, the economics of centralized computing has changed dramatically. At the beginning of the 1980's, mainframes and super computers were often considered to be cost-effective machines for scalar computing. Today, microprocessor-based RISC (reduced-instruction-set computer) systems have displaced many uses of mainframes and supercomputers. Supercomputers are still cost competitive when processing jobs that require both large memory size and high memory bandwidth. One such application is array processing. Certain numerical operations are appropriate to use in a Remote Procedure Call (RPC)-based environment. Matrix multiplication is an example of an operation that can have a sufficient number of arithmetic operations to amortize the cost of an RPC call. An experiment which demonstrates that matrix multiplication can be executed remotely on a large system to speed the execution over that experienced on a workstation is described.

Lamaster, Hugh↗

Information Switching Processor (ISP) contention analysis and control

Future satellite communications, as a viable means of communications and an alternative to terrestrial networks, demand flexibility and low end-user cost. On-board switching/processing satellites potentially provide these features, allowing flexible interconnection among multiple spot beams, direct to the user communications services using very small aperture terminals (VSAT's), independent uplink and downlink access/transmission system designs optimized to user's traffic requirements, efficient TDM downlink transmission, and better link performance. A flexible switching system on the satellite in conjunction with low-cost user terminals will likely benefit future satellite network users.

Shyy, D.↗