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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 991 records · Page 55
All sourcesNASA NTRSDOE OSTI
DOE OSTI2023

Porting the WAVEWATCH III (v6.07) wave action source terms to GPU

Abstract. Surface gravity waves play a critical role in several processes, including mixing, coastal inundation, and surface fluxes. Despite the growing literature on the importance of ocean surface waves, wind–wave processes have traditionally been excluded from Earth system models (ESMs) due to the high computational costs of running spectral wave models. The development of the Next Generation Ocean Model for the DOE’s (Department of Energy) E3SM (Energy Exascale Earth System Model) Project partly focuses on the inclusion of a wave model, WAVEWATCH III (WW3), into E3SM. WW3, which was originally developed for operational wave forecasting, needs to be computationally less expensive before it can be integrated into ESMs. To accomplish this, we take advantage of heterogeneous architectures at DOE leadership computing facilities and the increasing computing power of general-purpose graphics processing units (GPUs). This paper identifies the wave action source terms, W3SRCEMD, as the most computationally intensive module in WW3 and then accelerates them via GPU. Our experiments on two computing platforms, Kodiak (P100 GPU and Intel(R) Xeon(R) central processing unit, CPU, E5-2695 v4) and Summit (V100 GPU and IBM POWER9 CPU) show respective average speedups of 2× and 4× when mapping one Message Passing Interface (MPI) per GPU. An average speedup of 1.4× was achieved using all 42 CPU cores and 6 GPUs on a Summit node (with 7 MPI ranks per GPU). However, the GPU speedup over the 42 CPU cores remains relatively unchanged (∼ 1.3×) even when using 4 MPI ranks per GPU (24 ranks in total) and 3 MPI ranks per GPU (18 ranks in total). This corresponds to a 35 %–40 % decrease in both simulation time and usage of resources. Due to too many local scalars and arrays in the W3SRCEMD subroutine and the huge WW3 memory requirement, GPU performance is currently limited by the data transfer bandwidth between the CPU and the GPU. Ideally, OpenACC routine directives could be used to further improve performance. However, W3SRCEMD would require significant code refactoring to make this possible. We also discuss how the trade-off between the occupancy, register, and latency affects the GPU performance of WW3.

58 GEOSCIENCES↗
DOE OSTI2020

Generic characterization of electrical test benches for AC- and HVDC-connected wind power plants

The electrical test and assessment of wind turbines go hand in hand with standards and network connection requirements. In this paper, the generic structure of advanced electrical test benches, including grid emulator or controllable grid interface, wind torque emulator, and device under test, is proposed to harmonize state-of-the-art test sites. On the other hand, modern wind turbines are under development towards new features, concerning grid-forming, black-start, and frequency support capabilities as well as harmonic stability and control interaction considerations, to secure the robustness and stability of renewable-energy-based power systems. Therefore, it is necessary to develop new and revised test standards and methodologies to address the new features of wind turbines. This paper proposes a generic test structure within two main groups, including open-loop and closed-loop tests. The open-loop tests include the IEC 61400-21-1 standard tests as well as the additional proposed test options for the new capabilities of wind turbines, which replicate grid connection compliance tests using open-loop references for the grid emulator. In addition, the closed-loop tests evaluate the device under test as part of a virtual wind power plant and perform real-time simulations considering the grid dynamics. The closed-loop tests concern grid connection topologies consisting of AC and HVDC, as well as different electrical characteristics, including impedance, short-circuit ratio, inertia, and background harmonics. The proposed tests can be implemented using available advanced test benches by adjusting their control systems. The characteristics of a real power system can be emulated by a grid emulator coupled with real-time digital simulator systems through a high-bandwidth power-hardware-in-the-loop interface.

17 WIND ENERGY↗
DOE OSTI2022

A reference open-source controller for fixed and floating offshore wind turbines

Abstract. This paper describes the development of a new reference controller framework for fixed and floating offshore wind turbines that greatly facilitates controller tuning and represents standard industry practices. The reference wind turbine controllers that are most commonly cited in the literature have been developed to work with specific reference wind turbines. Although these controllers have provided standard control functionalities, they are often not easy to modify for use on other turbines, so it has been challenging for researchers to run representative, fully dynamic simulations of other wind turbine designs. The Reference Open-Source Controller (ROSCO) has been developed to provide a modular reference wind turbine controller that represents industry standards and performs comparably to or better than existing reference controllers. The formulation of the ROSCO controller logic and tuning processes is presented in this paper. Control capabilities such as tip speed ratio tracking generator torque control, minimum pitch saturation, wind speed estimation, and a smoothing algorithm at near-rated operation are included to provide modern controller features. A floating offshore wind turbine feedback module is also included to facilitate growing research in the floating offshore arena. All of the standard controller implementations and control modules are automatically tuned such that a non-controls engineer or automated optimization routine can easily improve the controller performance. This article provides the framework and theoretical basis for the ROSCO controller modules and generic tuning processes. Simulations of the National Renewable Energy Laboratory (NREL) 5 MW reference wind turbine and International Energy Agency 15 MW reference turbine on the University of Maine semisubmersible platform are analyzed to demonstrate the controller's performance in both fixed and floating configurations, respectively. The simulation results demonstrate ROSCO's peak shaving routine to reduce maximum rotor thrusts by over 10 % compared to the NREL 5 MW reference wind turbine controller on the land-based turbine and to reduce maximum platform pitch angles by nearly 30 % when using the platform feedback routine instead of a more traditional low-bandwidth controller.

17 WIND ENERGY↗
DOE OSTI2021

The Digital Mirror Langmuir Probe: Field Programmable Gate Array Implementation of Real-Time Langmuir Probe Biasing

High bandwidth, high spatial resolution measurements of electron temperature, density and plasma potential are valuable for resolving turbulence in the boundary plasma of tokamaks. While conventional Langmuir probes can provide such measurements either their temporal or spatial resolution is limited: the former by the sweep rate necessary for obtaining I-V characteristics and the latter by the need to use multiple electrodes, as is the case in triple and double probe configurations. The Mirror Langmuir Probe (MLP) bias technique overcomes these limitations by rapidly switching the voltage on a single electrode cycling between three bias states, each dynamically optimised for the local plasma conditions. The MLP system on Alcator C-Mod used analog circuitry to perform this function, measuring Te, VF, and Isat at 1.1 MSPS. Recently, a new prototype digital MLP controller has been implemented on a Red Pitaya Field Programmable Gate Array (FPGA) board which reproduces the functionality of the original controller and performs all data acquisition. There is also the potential to provide the plasma parameters externally for use with feedback control systems. The use of FPGA technology means the system is readily customisable at a fraction of the development time and implementation cost. A second Red Pitaya was used to test the MLP by simulating the current response of a physical probe using C-Mod experimental measurements. This project is available as a git repository to facilitate extensibility (e.g. real-time control outputs, more voltage states) and scalability through collaboration.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY↗
DOE OSTI2020

Additively Manufactured Interdigital Filters for Ultra- Wideband Radar

Abstract— In this paper, we present the development of ultrawideband (UWB) inter-digital cavity filters manufactured with an additive technique. We employed a selective laser melting process with stainless steel via a “flipping and fixturing” approach to achieve dimensional accuracy and frequency selectivity (no postfabrication tuning) comparable to that of conventional micromachining. The filters operate at a center frequency of 3.75 GHz and 6 GHz, respectively, with an instantaneous bandwidth of 2 GHz. This paper presents design and fabrication details, a discussion of measured characteristics for both filters, and a performance comparison with respect to subtractively manufactured parts.

Keywords— Interdigital filters, UWB radar, additiv↗
DOE OSTI2020

Checkpoint triggering in a computer system

According to an aspect, a method for triggering creation of a checkpoint in a computer system includes executing a task in a processing node of the computer system. A monitoring block size is determined for the checkpoint. A checkpoint interval is determined based on the monitoring block size, a checkpoint bandwidth, and a failure rate of the computer system. Based on determining that the checkpoint interval has elapsed, the checkpoint including state data of the task is created to enable restarting execution of the task upon a restart operation. The state data of the checkpoint is restored from a memory responsive to detecting an error condition at the processing node. Execution of the task is restarted in the processing node based on the state data restored from the memory.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2020

ROOT I/O compression improvements for HEP analysis

We overview recent changes in the ROOT I/O system, increasing performance and enhancing it and improving its interaction with other data analysis ecosystems. Both the newly introduced compression algorithms, the much faster bulk I/O data path, and a few additional techniques have the potential to significantly to improve experiment's software performance. The need for efficient lossless data compression has grown significantly as the amount of HEP data collected, transmitted, and stored has dramatically increased during the LHC era. While compression reduces storage space and, potentially, I/O bandwidth usage, it should not be applied blindly: there are significant trade-offs between the increased CPU cost for reading and writing files and the reduce storage space.

Shadura, Oksana↗
DOE OSTI2021

An Analysis of System Balance and Architectural Trends Based on Top500 Supercomputers

Supercomputer design is a complex, multi-dimensional optimization process, wherein several subsystems need to be reconciled to meet a desired figure of merit performance for a portfolio of applications and a budget constraint. However, overall, the HPC community has been gravitating towards ever more Flops, at the expense of many other subsystems. To draw attention to overall system balance, in this paper, we analyze balance ratios and architectural trends in the world’s most powerful supercomputers. Specifically, we have collected the performance characteristics of systems between 1993 and 2019 based on the Top500 lists and then analyzed their architectures from diverse system design perspectives. Notably, our analysis studies the performance balance of the machines, across a variety of subsystems such as compute, memory, I/O, interconnect, intra-node connectivity and power. Our analysis reveals that balance ratios of the various subsystems need to be considered carefully alongside the application workload portfolio to provision the subsystem capacity and bandwidth specifications, which can help achieve optimal performance.

Khan, Awais↗
DOE OSTI2021

Service-Based, Segmented, 5G Network-Based Architecture for Securing Distributed Energy Resources: Preprint

As the number of connected devices in the energy grid increase exponentially, so too are the cybersecurity risks. With the development of modern communications standards such as 5G and beyond the extent to which devices will continue to connect will continue to increase exponentially along with the inherent risks. However, 5G also includes features to help address cybersecurity concerns and therefore helping to mitigate many of these risks. This paper proposes a new service-based network architecture implementing network-slicing capabilities for connected systems and devices to improve performance, availability, security, and reliability of the grid devices and services. This paper considers the quality of service requirements and criticality of services needed for securely monitoring, operating, and securing Distributed Energy Resource (DER) devices. From developed use cases, network slicing is implemented based on these requirements and resource allocations. This work then highlights examples of how slicing can help prevent standard existing attack methods such as a denial-of-service or similar attack which limits resource availability and network bandwidth to the service and thus limiting its ability to affect other services by misbehaving. The designed network architecture use case will be further tested on a local virtualized testbed to verify secure operation and availability of services. Using hardware-in-the-loop devices and systems on this local testbed, this fully segmented, secure network may be realized and evaluated. Finally, this paper presents the results of this testing.

5G↗
DOE OSTI2020

Sensors with Intelligent Measurement Platform for Monitoring and Control in Distribution Circuits

This paper presents a medium-voltage intelligent measurement platform that provides post-processing of raw measurements received from commercially-available voltage/current sensors to enhance accuracy and bandwidth of the monitoring system. Furthermore, this platform integrates into a Data Distribution Service (DDS) messaging bus for distributed control and interoperability. The authors present the design, specifications, and major components included in the platform, and argue for applications and use cases that most benefit from this new approach. A laboratory testbed has been created to demonstrate the functionality, for which test results are presented for selected test cases.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2020

A 1.2-V 6-GHz Dual-Path Charge-Pump PLL Frequency Synthesizer for Quantum Control and Readout in CMOS 65-nm Process

This paper presents a low jitter dual-path chargepump phase locked loop (PLL) synthesizer in a CMOS 65-nm process for quantum readout applications. The PLL incorporates a programmable dual chargepump and a loop filter with both proportional and integral paths that can be driven independently providing flexible control of the loop bandwidth to achieve low jitter performance. The design is implemented at 300 K and critical blocks like voltage-controlled oscillator (VCO) and chargepump (CP) are analyzed at 77 K based on the characterized results. The LC-VCO is realized with the class-C NMOS only architecture with 5-bit coarse control and quadrature signals are generated with poly phase filter. The VCO is designed with the tuning range of 1 GHz around the center frequency of 6 GHz with Phase Noise of -123 dBc/Hz and -132 dBc/Hz at 1MHz offset at 300 K and 77 K temperature. The simulated PLL rms jitter is 125 fs at 6 GHz with a power consumption of 8 mW at the 1.2 V power supply.

47 OTHER INSTRUMENTATION↗
DOE OSTI2021

Acoustic gas volume fraction measurement in a multiphase flowing liquid

Apparatus and methods for the measurement of gas volume fraction of produced oil are described. A first method measures the response of a pipe containing the produced oil excited by a source of vibration in the form of an acoustic frequency chirp containing a linearly varying range of frequencies in the tens of kilohertz range encompassing at least one resonant mode of the pipe. As the gas volume fraction increases, the location of the peak maximum of the measured frequency spectrum responsive to the excitation increases in frequency, and the height of the peak maximum increases, thereby permitting a linear calibration curve to be obtained. A second method measures the response of a pipe containing the produced oil to excitation by a continuous source of vibration having a chosen frequency above those which excite flexural vibrations in the pipe and simultaneously excite acoustic waves in the fluid contained in the pipe, known as the coincidence frequency. Gas present in the fluid will interrupt sound propagation or reverberation, thereby generating fluctuations in the amplitude of the measured vibrations of the pipe. The amplitude fluctuation level provides a measure of the gas volume present inside the pipe. A third method measures the response of a pipe containing the produced oil to excitation by a high-bandwidth, short pulse having a chosen center frequency above the coincidence frequency. Gas present in the fluid will interrupt pulse propagation, thereby generating fluctuations in the amplitude of the measured vibrations of the pipe.

Sinha, Dipen N.↗
DOE OSTI2021

Revisiting Huffman Coding: Toward Extreme Performance on Modern GPU Architectures

Today's high-performance computing (HPC) applications are producing vast volumes of data, which are challenging to store and transfer efficiently during the execution, such that data compression is becoming a critical technique to mitigate the storage burden and data movement cost. Huffman coding is arguably the most efficient Entropy coding algorithm in information theory, such that it could be found as a fundamental step in many modern compression algorithms such as DEFLATE. On the other hand, today's HPC applications are more and more relying on the accelerators such as GPU on supercomputers, while Huffman encoding suffers from low throughput on GPUs, resulting in a significant bottleneck in the entire data processing. In this paper, we propose and implement an efficient Huffman encoding approach based on modern GPU architectures, which addresses two key challenges: (1) how to parallelize the entire Huffman encoding algorithm, including codebook construction, and (2) how to fully utilize the high memory-bandwidth feature of modern GPU architectures. The detailed contribution is fourfold. (1) We develop an efficient parallel codebook construction on GPUs that scales effectively with the number of input symbols. (2) We propose a novel reduction based encoding scheme that can efficiently merge the codewords on GPUs. (3) We optimize the overall GPU performance by leveraging the state-of-the-art CUDA APIs such as Cooperative Groups. (4) We evaluate our Huffman encoder thoroughly using six real-world application datasets on two advanced GPUs and compare with our implemented multithreaded Huffman encoder. Experiments show that our solution can improve the encoding throughput by up to 5.0× and 6.8× on NVIDIA RTX 5000 and V100, respectively, over the state-of-the-art GPU Huffman encoder, and by up to 3.3× over the multithread encoder on two 28-core Xeon Platinum 8280 CPUs.

Tian, Jiannan↗
DOE OSTI2021

Accelerating Multigrid-based Hierarchical Scientific Data Refactoring on GPUs

Rapid growth in scientific data and a widening gap between computational speed and I/O bandwidth make it increasingly infeasible to store and share all data produced by scientific simulations. Instead, we need methods for reducing data volumes: ideally, methods that can scale data volumes adaptively so as to enable negotiation of performance and fidelity tradeoffs in different situations. Multigrid-based hierarchical data representations hold promise as a solution to this problem, allowing for flexible conversion between different fidelities so that, for example, data can be created at high fidelity and then transferred or stored at lower fidelity via logically simple and mathematically sound operations. However, the effective use of such representations has been hindered until now by the relatively high costs of creating, accessing, reducing, and otherwise operating on such representations. We describe here highly optimized data refactoring kernels for GPU accelerators that enable efficient creation and manipulation of data in multigrid-based hierarchical forms. We demonstrate that our optimized design can achieve up to 250 TB/s aggregated data refactoring throughput—83% of theoretical peak—on 1024 nodes of the Summit supercomputer. We showcase our optimized design by applying it to a large-scale scientific visualization workflow and the MGARD lossy compression software.

Chen, Jieyang↗
DOE OSTI2021

Low-latency NuMI Trigger for the CHIPS-5 Neutrino Detector

The CHIPS R&D project aims to develop affordable water Cherenkov detectors for large-scale underwater installations. In 2019, a 5kt prototype detector CHIPS-5 was deployed in northern Minnesota to study neutrinos generated by the nearby NuMI beam. This contribution presents a dedicated low-latency time distribution system for CHIPS-5 that delivers timing signals from the Fermilab accelerator to the detector with sub-nanosecond precision. Exploiting existing NOvA infrastructure, the time distribution system achieves this only with open-source software and conventional network elements. In a time-of-flight study, the presented system has reliably offered a time budget of $610 \pm 330\text{ ms}$ for on-site triggering. This permits advanced analysis in real-time as well as a novel hardware-assisted active triggering mode, which reduces DAQ computing load and network bandwidth outside triggered time windows.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2021

Balanced light detector

A system and method with AC coupling that reserves photodiode bandwidth in a biased configuration, allows optimal transimpedance amplifier performance, retains DC signal measurement capability, and does not introduce noise into the balanced detection signal.

Williams, Brian P.↗
DOE OSTI2020

A 20 Gbps Data Transmitting ASIC with PAM4 for Particle Physics Experiments

We present the design principle and test results of a data transmitting ASIC, GBS20, for particle physics experiments. The goal of GBS20 will be an ASIC that employs two serializers each from the 10.24 Gbps lpGBT SerDes, sharing the PLL also from lpGBT. A PAM4 encoder plus a VCSEL driver will be implemented in the same die to use the same clock system, eliminating the need of CDRs in the PAM4 encoder. This way the transmitter module, GBT20, developed using the GBS20 ASIC, will have the exact lpGBT data interface and transmission protocol, with an output up to 20.48 Gbps over one fiber. With PAM4 embedded FPGAs at the receiving end, GBT20 will halve the fibers needed in a system and better use the input bandwidth of the FPGA. A prototype, GBS20v0 is fabricated using a commercial 65 nm CMOS technology. This prototype has two serializers and a PAM4 encoder sharing the lpGBT PLL, but no user data input. An internal PRBS generator provides data to the serializers. GBS20v0 is tested barely up to 20.48 Gbps. With lessons learned from this prototype, we are designing the second prototype, GBS20v1, that will have 16 user data input channels each at 1.28 Gbps. We present the design concept of the GBS20 ASIC and the GBT20 module, the preliminary test results, and lessons learned from GBS20v0 and the design of GBS20v1 which will be not only a test chip but also a user chip with 16 input data channels.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2022

Advanced Power-Hardware-in-the-Loop Evaluation of Inverter-Based Resources (IBRs)

Power-hardware-in-the-loop evaluation of IBRs has become more and more important as it provides reliable testing results to investigate the real responses of inverters with interconnected systems. A successful laboratory PHIL testing gives confidence of the hardware system to be deployed and de-risk technology integration prior to field deployment. So far, there are two important applications for PHIL evaluation: (1) test stability and functionality of large utility inverters into the system when it interconnects to the distribution systems/microgrids; and (2) test the collective grid service that inverters can provide to the grid. For the first application, the PHIL evaluation has high requirements for the stability and accuracy of the PHIL interface as the close-loop in digital real time simulator (DRTS) should replicate the actual current and voltage dynamics in the inverter. This is challenging because of the delays, sensing errors, nonlinearities of inverters, and hardware bandwidth limitations of the elements in the HIL loop. For the second application, multiple inverters will be tested resulting in multiple PCCs, which naturally causes competing dynamics and oscillations among hardware inverters if traditional PHIL interface is used. Therefore, new PHIL interface should be developed to compromise between stability and accuracy and represent the dispatched grid services for the hardware inverters. In this presentation, we will share our latest work in developing PHIL interface in these two applications to address the two key challenges.

DERMS↗