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At least 991 records · Page 55
All sourcesNASA NTRSDOE OSTI
DOE OSTI2024

A Modular 512-Channel Neural Signal Acquisition ASIC for High-Density 4096 Channel Electrophysiology

The complexity of information processing in the brain requires the development of technologies that can provide spatial and temporal resolution by means of dense electrode arrays paired with high-channel-count signal acquisition electronics. In this work, we present an ultra-low noise modular 512-channel neural recording circuit that is scalable to up to 4096 simultaneously recording channels. The neural readout application-specific integrated circuit (ASIC) uses a dense 8.2 mm × 6.8 mm 2D layout to enable high-channel count, creating an ultra-light 350 mg flexible module. The module can be deployed on headstages for small animals like rodents and songbirds, and it can be integrated with a variety of electrode arrays. The chip was fabricated in a TSMC 0.18 µm 1.8 V CMOS technology and dissipates a total of 125 mW. Each DC-coupled channel features a gain and bandwidth programmable analog front-end along with 14 b analog-to-digital conversion at speeds up to 30 kS/s. Additionally, each front-end includes programmable electrode plating and electrode impedance measurement capability. We present both standalone and in vivo measurements results, demonstrating the readout of spikes and field potentials that are modulated by a sensory input.

47 OTHER INSTRUMENTATION↗
NASA NTRS1967

Electrocardiogram preprocessing unit.

Analog circuit for presenting fixed pulse output corresponding to each cardiac cycle of given electrocardiogram and highly unresponsive to noise interference

ELECTROCARDIOGRAM↗
NASA NTRS1985

Crossover Concept for Optical Printed Circuits

It is possible to reduce crosstalk between optical signals in intersecting optical conductors by taking two steps: Minimize amount of light diffracted into wrong conductor by selecting optimum conductor width, and place light traps in each conductor. How well techniques work depends in part on quality of optical conductors (partically surface smoothness) and on how closely optical-signal mode of propagation approaches ideal. Nature of signals also important: With digital signals, less crosstalk attenuation required than for analog signals.

Jamieson, R. S.↗
NASA NTRS2007

Programmable Thermostats for MPLM Shell Heater Control ULF1: Thermal Performances - 1

The Multi-Purpose Logistics Module (MPLM) is the primary carrier for "pressurized" logistics to and from the International Space Station (ISS). The MPLM is transported in the payload bay of the Space Shuttle and is docked to the ISS for unloading, and reloading, of contents within the ISS shirt sleeve environment. Foil heaters, controlled originally with bi-metallic thermostats, are distributed across the outside of the MPLM structure and are utilized to provide energy to the structure to avoid exposure to cold temperatures and prevent condensation. The existing bi-metallic, fixed temperature set point thermostats have been replaced with Programmable Thermostats Modules (PTMs) in the Passive Thermal Control Subsystem (PTCS) 28Vdc shell heater circuits. The goal of using the PTM thermostat is to improve operational efficiency of the MPLM on-orbit shell heaters by providing better shell temperature control via feedback control capability. Each heater circuit contains a programmable thermostat connected to an external temperature sensor, a Resistive Temperature Device (RTD), which is used to provide continuous temperature monitoring capability. Each thermostat has programmable temperature set points and control spans. The data acquisition system uses a standard RS-485 serial interface communications cable to provide digital control capability. The PTM system was designed by MSFC, relying upon ALTEC support for their integration within the MPLM system design, while KSC performed the installation and ground checkout testing of the thermostat and RS-485 communication cable on the MPLM FM1 flight module. The PTMs were used for the first time during the STS-121/ULF1.1 mission. This paper will describe the design, development and verification of the PTM system, as well as the PTM flight performance and comparisons with SINDA thermal model predictions.

Glasgow, Shaun↗
DOE OSTI2023

In-pixel AI for lossy data compression at source for X-ray detectors

Integrating neural networks for data compression directly in the Read-Out Integrated Circuits (ROICs), i.e. the pixelated front-end, would result in a significant reduction in off-chip data transfer, overcoming the I/O bottleneck. Our ROIC test chip (AI-In-Pixel-65) is designed in a 65 nm Low Power CMOS process for the readout of pixelated X-ray detectors. Each pixel consists of an analog front-end for signal processing and a 10b analog-to-digital converter operating at 100KSPS. Here, we compare two non-reconfigurable techniques, Principal Component Analysis (PCA) and an AutoEncoder (AE) as lossy data compression engines implemented within the pixelated area. The PCA algorithm achieves 50$×$ compression, adds one clock cycle latency, and results in a 21% increase in the pixel area. The AE achieves 70$×$ compression, adds 30 clock cycle latency, and results in a similar area increase.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
NASA NTRS2008

Controller for Driving a Piezoelectric Actuator at Resonance

A digital control system based partly on an extremum-seeking control algorithm tracks the changing resonance frequency of a piezoelectric actuator or an electrically similar electromechanical device that is driven by a sinusoidal excitation signal and is required to be maintained at or near resonance in the presence of uncertain, changing external loads and disturbances. Somewhat more specifically, on the basis of measurements of the performance of the actuator, this system repeatedly estimates the resonance frequency and alters the excitation frequency as needed to keep it at or near the resonance frequency. In the original application for which this controller was developed, the piezoelectric actuator is part of an ultrasonic/sonic drill/corer. Going beyond this application, the underlying principles of design and operation are generally applicable to tracking changing resonance frequencies of heavily perturbed harmonic oscillators. Resonance-frequency-tracking analog electronic circuits are commercially available, but are not adequate for the present purpose for several reasons: The input/output characteristics of analog circuits tend to drift, often necessitating recalibration, especially whenever the same controller is used in driving a different resonator. In the case of an actuator in a system that has multiple modes characterized by different resonance frequencies, an analog controller can tune erroneously to one of the higher-frequency modes. The lack of programmability of analog controllers is problematic when faults occur, and is especially problematic for preventing tuning to a higher-frequency mode. In contrast, a digital controller can be programmed to restrict itself to a specified frequency range and to maintain stability even when the affected resonator is driven at high power and subjected to uncertain disturbances and variable loads. The present digital control system (see figure) is implemented by means of an algorithm that comprises three main subalgorithms: a hill-climbing control algorithm, an estimation-based extremum-seeking control (ESC) algorithm, and a supervisory algorithm. The hill-climbing algorithm is useful for coarse tracking to find and remain within the vicinity of the resonance. The ESC algorithm is not capable of coarse resonance tracking, but is capable of fine resonance tracking once the estimates of parameters generated by the hill-climbing algorithm have converged sufficiently. On the basis of the parameter-estimation errors, the supervisory algorithm switches operation to whichever of the other two algorithms performs best at a given time.

Aldrich, Jack↗
NASA NTRS1979

Nuclear Science Symposium, 25th, and Symposium on Nuclear Power Systems, 10th, Washington, D.C., October 18-20, 1978, Proceedings

Detectors of various types are discussed, taking into account drift chambers, calorimetry, multiwire proportional chambers, signal processing, the use of semiconductors, and photo/optical applications. Circuits are considered along with instrumentation for space, nuclear medicine instrumentation, data acquisition and systems, environmental instrumentation, reactor instrumentation, and nuclear power systems. Attention is given to a new approach to high accuracy gaseous detectors, the current status of electron mobility and free-ion yield in high mobility liquids, a digital drift chamber digitizer system, the stability of oxides in high purity germanium, the quadrant photomultiplier, and the theory of imaging with a very limited number of projections.

Source record↗
NASA NTRS1994

Development of a Power Electronics Unit for the Space Station Plasma Contactor

A hollow cathode plasma contactor has been baselined as a charge control device for the Space Station (SS) to prevent deleterious interactions of coated structural components with the ambient plasma. NASA LeRC Work Package 4 initiated the development of a plasma contactor system comprised of a Power Electronics Unit (PEU), an Expellant Management Unit (EMU), a command and data interface, and a Plasma Contactor Unit (PCU). A breadboard PEU was designed and fabricated. The breadboard PEU contains a cathode heater and discharge power supply, which were required to operate the PCU, a control and auxiliary power converter, an EMU interface, a command and telemetry interface, and a controller. The cathode heater and discharge supplies utilized a push-pull topology with a switching frequency of 20 kHz and pulse-width-modulated (PWM) control. A pulse ignition circuit derived from that used in arcjet power processors was incorporated in the discharge supply for discharge ignition. An 8088 based microcontroller was utilized in the breadboard model to provide a flexible platform for controller development with a simple command/data interface incorporating a direct connection to SS Mulitplexer/Demultiplexer (MDM) analog and digital I/O cards. Incorporating this in the flight model would eliminate the hardware and software overhead associated with a 1553 serial interface. The PEU autonomously operated the plasma contactor based on command inputs and was successfully integrated with a prototype plasma contactor unit demonstrating reliable ignition of the discharge and steady-state operation.

Hamley, John A.↗
NASA NTRS1995

Simplified Digital Down-Converters

Design of digital frequency down-converters simplified by eliminating need for both high-speed number-controlled oscillators (NCOs) and mixer-multipliers, and implementing functions via multiplication coefficients of finite-impulse-response (FIR) filters. Simplification depends on particular choices of operating frequencies. Simplified designs implemented with commercial FIR integrated circuits.

Sigman, Elliott H.↗
DOE OSTI2023

Digital fabrication of a small diameter polymer optical waveguide

A novel polymer optical waveguide and method of manufacturing is presented herein. A digitally manufactured process is described which utilizes a micro-dispensed UV optical adhesive as the contour guiding cladding, a fused deposition modeling technology for creating a core, and a subtractive laser process to finish the two ends of the optical interconnect. The optical waveguide can be printed directly on a circuit board in some embodiments. Alternatively, using a slightly modified process including a step to bond the optical fiber to the substrate, the optical interconnect can be manufactured on a flexible substrate.

Bhethanabotla, Venkat Rama↗
DOE OSTI2024

Scattering wave packets of hadrons in gauge theories: Preparation on a quantum computer

Quantum simulation holds promise of enabling a complete description of high-energy scattering processes rooted in gauge theories of the Standard Model. A first step in such simulations is preparation of interacting hadronic wave packets. To create the wave packets, one typically resorts to adiabatic evolution to bridge between wave packets in the free theory and those in the interacting theory, rendering the simulation resource intensive. In this work, we construct a wave-packet creation operator directly in the interacting theory to circumvent adiabatic evolution, taking advantage of resource-efficient schemes for ground-state preparation, such as variational quantum eigensolvers. By means of an ansatz for bound mesonic excitations in confining gauge theories, which is subsequently optimized using classical or quantum methods, we show that interacting mesonic wave packets can be created efficiently and accurately using digital quantum algorithms that we develop. Specifically, we obtain high-fidelity mesonic wave packets in the Z 2 and U(1) lattice gauge theories coupled to fermionic matter in 1+1 dimensions. Our method is applicable to both perturbative and non-perturbative regimes of couplings. The wave-packet creation circuit for the case of the Z 2 lattice gauge theory is built and implemented on the Quantinuum H1-1 trapped-ion quantum computer using 13 qubits and up to 308 entangling gates. The fidelities agree well with classical benchmark calculations after employing a simple symmetry-based noise-mitigation technique. This work serves as a step toward quantum computing scattering processes in quantum chromodynamics.

97 MATHEMATICS AND COMPUTING↗
NASA NTRS1972

Auxiliary engine digital interface unit (DIU)

This auxiliary propulsion engine digital unit controls both the valving of the fuel and oxidizer to the engine combustion chamber and the ignition spark required for timely and efficient engine burns. In addition to this basic function, the unit is designed to manage it's own redundancy such that it is still operational after two hard circuit failures. It communicates to the data bus system several selected information points relating to the operational status of the electronics as well as the engine fuel and burning processes.

Source record↗
NASA NTRS2010

Flexible Peripheral Component Interconnect Input/Output Card

The Flexible Peripheral Component Interconnect (PCI) Input/Output (I/O) Card is an innovative circuit board that provides functionality to interface between a variety of devices. It supports user-defined interrupts for interface synchronization, tracks system faults and failures, and includes checksum and parity evaluation of interface data. The card supports up to 16 channels of high-speed, half-duplex, low-voltage digital signaling (LVDS) serial data, and can interface combinations of serial and parallel devices. Placement of a processor within the field programmable gate array (FPGA) controls an embedded application with links to host memory over its PCI bus. The FPGA also provides protocol stacking and quick digital signal processor (DSP) functions to improve host performance. Hardware timers, counters, state machines, and other glue logic support interface communications. The Flexible PCI I/O Card provides an interface for a variety of dissimilar computer systems, featuring direct memory access functionality. The card has the following attributes: 8/16/32-bit, 33-MHz PCI r2.2 compliance, Configurable for universal 3.3V/5V interface slots, PCI interface based on PLX Technology's PCI9056 ASIC, General-use 512K 16 SDRAM memory, General-use 1M 16 Flash memory, FPGA with 3K to 56K logical cells with embedded 27K to 198K bits RAM, I/O interface: 32-channel LVDS differential transceivers configured in eight, 4-bit banks; signaling rates to 200 MHz per channel, Common SCSI-3, 68-pin interface connector.

Bigelow, Kirk K.↗
NASA NTRS1974

Error protection capability of space shuttle data bus designs

Error protection assurance in the reliability of digital data communications is discussed. The need for error protection on the space shuttle data bus system has been recognized and specified as a hardware requirement. The error protection techniques of particular concern are those designed into the Shuttle Main Engine Interface (MEI) and the Orbiter Multiplex Interface Adapter (MIA). The techniques and circuit design details proposed for these hardware are analyzed in this report to determine their error protection capability. The capability is calculated in terms of the probability of an undetected word error. Calculated results are reported for a noise environment that ranges from the nominal noise level stated in the hardware specifications to burst levels which may occur in extreme or anomalous conditions.

Proch, G. E.↗
NASA NTRS1975

Lightning effects on the NASA F-8 digital-fly-by-wire airplane

The effects of lightning on a Digital Fly-By-Wire (DFBW)aircraft control system were investigated. The aircraft was a NASA operated F-8 fitted with a modified Apollo guidance computer. Current pulses similar in waveshape to natural lightning, but lower in amplitude, were injected into the aircraft. Measurements were made of the voltages induced on the DFBW circuits, the total current induced on the bundles of wires, the magnetic field intensity inside the aircraft, and the current density on the skin of the aircraft. Voltage measurements were made in both the line-to-ground and line-to-line modes. Voltages measured at the non-destructive test level were then scaled upward to determine how much would be produced by actual lightning. A 200,000 ampere severe lightning flash would produce between 40 and 2000 volts in DFBW circuits. Some system components are expected to be vulnerable to these voltages.

Plumer, J. A.↗
NASA NTRS1975

Design of Energy Storage Reactors for Dc-To-Dc Converters

Two methodical approaches to the design of energy-storage reactors for a group of widely used dc-to-dc converters are presented. One of these approaches is based on a steady-state time-domain analysis of piecewise-linearized circuit models of the converters, while the other approach is based on an analysis of the same circuit models, but from an energy point of view. The design procedure developed from the first approach includes a search through a stored data file of magnetic core characteristics and results in a list of usable reactor designs which meet a particular converter's requirements. Because of the complexity of this procedure, a digital computer usually is used to implement the design algorithm. The second approach, based on a study of the storage and transfer of energy in the magnetic reactors, leads to a straightforward design procedure which can be implemented with hand calculations. An equation to determine the lower-bound volume of workable cores for given converter design specifications is derived. Using this computer lower-bound volume, a comparative evaluation of various converter configurations is presented.

Chen, D. Y.↗
NASA NTRS1995

ASIC For Complex Fixed-Point Arithmetic

Application-specific integrated circuit (ASIC) performs 24-bit, fixed-point arithmetic operations on arrays of complex-valued input data. High-performance, wide-band arithmetic logic unit (ALU) designed for use in computing fast Fourier transforms (FFTs) and for performing ditigal filtering functions. Other applications include general computations involved in analysis of spectra and digital signal processing.

Petilli, Stephen G.↗
NASA NTRS2007

Arrays of Miniature Microphones for Aeroacoustic Testing

A phased-array system comprised of custom-made and commercially available microelectromechanical system (MEMS) silicon microphones and custom ancillary hardware has been developed for use in aeroacoustic testing in hard-walled and acoustically treated wind tunnels. Recent advances in the areas of multi-channel signal processing and beam forming have driven the construction of phased arrays containing ever-greater numbers of microphones. Traditional obstacles to this trend have been posed by (1) the high costs of conventional condenser microphones, associated cabling, and support electronics and (2) the difficulty of mounting conventional microphones in the precise locations required for high-density arrays. The present development overcomes these obstacles. One of the hallmarks of the new system is a series of fabricated platforms on which multiple microphones can be mounted. These mounting platforms, consisting of flexible polyimide circuit-board material (see left side of figure), include all the necessary microphone power and signal interconnects. A single bus line connects all microphones to a common power supply, while the signal lines terminate in one or more data buses on the sides of the circuit board. To minimize cross talk between array channels, ground lines are interposed as shields between all the data bus signal lines. The MEMS microphones are electrically connected to the boards via solder pads that are built into the printed wiring. These flexible circuit boards share many characteristics with their traditional rigid counterparts, but can be manufactured much thinner, as small as 0.1 millimeter, and much lighter with boards weighing as much as 75 percent less than traditional rigid ones. For a typical hard-walled wind-tunnel installation, the flexible printed-circuit board is bonded to the tunnel wall and covered with a face sheet that contains precise cutouts for the microphones. Once the face sheet is mounted, a smooth surface is established over the entire array due to the flush mounting of all microphones (see right side of figure). The face sheet is made from a continuous glass-woven-fabric base impregnated with an epoxy resin binder. This material offers a combination of high mechanical strength and low dielectric loss, making it suitable for withstanding the harsh test section environment present in many wind tunnels, while at the same time protecting the underlying polyimide board. Customized signal-conditioning hardware consisting of line drivers and antialiasing filters are coupled with the array. The line drivers are constructed using low-supply-current, high-gain-bandwidth operational amplifiers designed to transmit the microphone signals several dozen feet from the array to external acquisition hardware. The anti-alias filters consist of individual Chebyshev low-pass filters (one for each microphone channel) housed on small printed-circuit boards mounted on one or more motherboards. The mother/daughter board design results in a modular system, which is easy to debug and service and which enables the filter characteristics to be changed by swapping daughter boards with ones containing different filter parameters. The filter outputs are passed to commercially- available acquisition hardware to digitize and store the conditioned microphone signals. Wind-tunnel testing of the new MEMS microphone polyimide mounting system shows that the array performance is comparable to that of traditional arrays, but with significantly less cost of construction.

Shams, Qamar A.↗