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At least 991 records · Page 55

Integrated On-Board Charger for Dual Motor Based Electric Vehicle Power Train

This paper presents an integrated on-board charger for dual motor based electric vehicle (EV) power train with silicon carbide semiconductor switch-based traction inverters. The proposed charger architecture reconfigures the traction inverters to be used in the battery charging mode, thereby eliminating several high frequency switches and their accessories. The motor windings are reused as line inductors for the power factor correction (PFC) rectifier stage in the charging mode thereby reducing the requirements of magnetic components. The architectures reduce the cost, weight, and volume of the EV power train. Simulation results are presented to demonstrate the working principle of the proposed architecture.

Mukherjee, Subho [ORNL] (ORCID:0009000672297925)↗

Parametric Design Study of a Power Electronics Package for Improving Solder Joint Reliability

The lifetime of a power electronics package is, to a large extent, determined by the reliability of its bonded interfaces under major loading conditions in an operational environment. Based on the application-level requirements of the package, bonded interface material is selected based on the results obtained from accelerated tests such as thermal cycling and power cycling. In addition to evaluating the reliability through accelerated tests, it is important to consider the impact of other component layers on the thermomechanical performance of the interface material, both from a material and geometric perspective. The co-efficient of thermal expansion (CTE) mismatch introduced by the use of different materials within a package and its structural design plays a critical role in determining the interface material reliability. In this paper, we present the results of a parametric modeling study of a power electronics package under thermal cycling in which the materials and geometric design of the different component layers were varied with respect to a baseline design to understand their impact on the reliability of the interface material. We chose the volume-averaged strain energy density per cycle computed at the corner region of the interface material as the metric for the reliability comparisons. Our results indicate that in addition to the CTE mismatch, the stiffness of individual component layers has a major impact on reliability. Among the different baseplates that we studied, aluminum silicon-carbide baseplates offered superior reliability over their copper and aluminum counterparts. We also found that the magnitude of the impact of stiffness variation—amongst the adjacent layers—on the reliability of the solder joint is dependent on the inherent CTE mismatch between the layers.

47 OTHER INSTRUMENTATION↗

Automated Design-for-Reliability of a Power Electronics Module

The design of a power electronics module is a multiphysics problem and involves electrical, thermal, and reliability targets and constraints. Although the electrical and thermal design consider multiple aspects such as materials, geometry, and energy losses, reliability design is often limited to the selection of the attachment materials and electrical interconnect types. In this paper, we incorporate reliability metrics in the design phase by investigating the impact of package geometry on the thermomechanical behavior of the die-attachment material. To this end, we conducted thermal and power cycling simulations of a commercial six-pack power module with silicon carbide devices to compute junction temperature and strain energy density per cycle, respectively. We performed multiple simulations with different geometric dimensions and established a correlation between input features and output variables using subspace-based dimension reduction. The machine learning-based dimension reduction method serves as a surrogate model, which can be employed to identify the optimal module design from a thermal and reliability standpoint.

design-for-reliability↗

A Generic Two-Vector Model Predictive Control for Hybrid Multilevel Converters

In this article, a generic two-vector model predictive control (TV-MPC) strategy is proposed for the hybrid multilevel converters (HMCs). The proposed method selects two optimal voltage vectors among all the vector candidates using a geometric positioning approach to reduce the computational burden, which is a common issue in the existing MPC methods for HMC. Then duty cycles of the two selected vectors are optimized to minimize the current tracking error, such that the current tracking performance can be enhanced compared with the conventional MPC. In addition, the voltages of the floating dc capacitors can be balanced by evaluating all switching sequences that belong to the optimal voltage vectors with optimal duty cycles. Here, the concept of the proposed TV-MPC is generic and applicable for any HMCs. A typical HMC based on active neutral-point-clamped topology is adopted as a case study in this work. Comprehensive simulation and experimental studies are performed on an all silicon-carbide HMC prototype to validate the effectiveness of the proposed control scheme.

42 ENGINEERING↗

A Phase-Disposition PWM Enabled Model Predictive Control for a Nine-Level Inner-Interleaved Hybrid Multilevel Converter

This article brings forward a phase-disposition pulse width modulation enabled model predictive control (PDPWM-MPC) for a nine-level inner-interleaved hybrid multilevel converter (9L-IHMC). Firstly, three layers of virtual space vector diagrams (VSVD) are established based on the sign patterns of the original and virtual reference vectors in the abcframe, respectively, to achieve the phase-disposition pulse width modulation (PD-PWM) in a non-independent three-phase way. Then, three adjacent virtual vectors in the third-layer VSVD, together with their optimized duty cycles, are applied to guarantee the optimal current tracking. Finally, through the use of the duty cycle alternation approach, dc-link and floating capacitors voltages are balanced and circulating currents are mitigated as well. The proposed PDPWM-MPC can not only enable the decoupling of the low-and high-frequency stages in the 9L-IHMC, but also reduce both output current ripples and computational burden. In addition, it can achieve a constant equivalent switching frequency and address the disproportion of power losses associated with the PD-PWM. Here, both simulations and experiments on a silicon carbide device-based prototype substantiate the effectiveness of the proposed control strategy.

42 ENGINEERING↗

SiC and GaN Devices With Cryogenic Cooling

This article presents the cryogenically cooled application for wide bandgap (WBG) semiconductor devices. Characteristics of silicon carbide (SiC) and gallium nitride (GaN) at cryogenic temperatures are illustrated. SiC MOSFETs exhibit increased on-state resistance and slower switching speed at cryogenic temperatures. However, cryogenic cooling provides low ambient temperature environment and thus enables the SiC converter to operate at lower junction temperature to achieve higher efficiency compared to room temperature cooling. A cryogenically cooled MW-level SiC inverter prototype is developed and demonstrated the feasibility of operating high-power SiC converter with cryogenic cooling. GaN HEMTs exhibit more than five times on-state resistance reduction and faster switching speed at cryogenic temperatures which makes GaN HEMTs an excellent candidate for cryogenic power electronics applications. The significantly reduced on-state resistance of GaN devices provides the possibility to operate them at a current level much higher than rated current at cryogenic temperatures. A GaN double pulse test (DPT) circuit is constructed and demonstrated that GaN HEMTs can operate at nearly four times of rated current at cryogenic temperatures. Challenges of utilizing WBG device with cryogenic cooling are discussed and summarized.

42 ENGINEERING↗

Real-time Implementation of a Dual-Active-Bridge Based Multi-Level Photovoltaic Converter

Silicon-carbide based, multi-level converters with dual-active-bridge (DAB) are getting attention for medium voltage, direct grid-connected, utility-scale photovoltaic (PV) applications due to their higher efficiency and power density. To de-risk complex control development for these high-voltage and high-power inverters, hardware-in-the-loop techniques are often required. Due to the high switching frequency and the large number of power electronic switches, off-the-shelf, real-time simulation tools are not yet fully developed for this application, even with FPGA-based simulators. To address this, a new co-simulation approach in FPGA is presented that utilizes Time-Stamped Bridge (TSB) for the higher frequency converters along with detailed fixed conductance based discrete device simulation of the rest of the circuit. A complex DAB-based PV converter with maximum switching frequency of 50 kHz is successfully simulated in real-time in the FPGA and the results are compared with offline simulation results. A controller hardware-in-the-loop (CHIL) platform is developed to demonstrate real-time, closed-loop test results for this DAB-based PV converter.

Dong, Zerui↗

Performance and Techno-Economic Evaluation of a Three-Phase, 50-kW SiC-Based PV Inverter

The technical capabilities and benefits of silicon carbide (SiC) compared to silicon (Si) based power electronics converters as well as the premium associated with using SiC instead of Si are well understood. This work proves that the benefits provided by SiC, such as increased efficiency, would result in a lower levelized cost of energy (LCOE) compared to both commercially available, state-of-the-art inverters and the benchmark commercial system cost calculated for the U.S. Department of Energy Solar Energy Technologies Office's SunShot program. The LCOE is calculated to be same as the commercial benchmark despite the installed system cost being 8% more than the benchmark. The LCOE calculation is based on both experiential values obtained from testing the SiC photovoltaic (PV) inverter and on the bottoms-up modeled volume cost for the same 50-kW SiC-based inverter. The PV system used for the LCOE model is also explained, and the system cost breakout is presented in this paper. Furthermore, multiple scenarios with variations in the PV system are presented to show their effect on the system LCOE.

14 SOLAR ENERGY↗

A New Configuration of Paralleled Modular ANPC Multilevel Converter Controlled by an Improved Modulation Method for 1 MHz, 1 MW EV Charger

In this work, a new configuration of the modular multilevel converter (MLC) based on the parallel connection of three-level active-neutral-point-clamped (3L-ANPC) cells as well as its improved modulation method is proposed for 1 MHz, 1 MW electric vehicle (EV) megacharger. In the proposed paralleled modular ANPC-MLC, only six high-frequency silicon carbide (SiC) power switches operating at 333 kHz are required to generate 1 MHz switching frequency spectrum. Moreover, the operating voltage of all power devices is halved, the magnitude of the first switching frequency harmonic cluster is decreased by the factor of five, and the load current is equally distributed between the 3L-ANPC legs by employing the proposed improved modulation method. Hence, the modularity, efficiency, and power density of the proposed converter are notably increased, whereas the value of passive components and the overall switching loss are remarkably decreased. In addition, an optimized design of the one 3L-ANPC cell of the proposed paralleled modular ANPC-MLC for 1 MHz, 1MW EV megacharger using Ansys SIwave, Icepak, and Q3D finite element method platforms is presented and analyzed in detail. The provided experimental results of the down-scaled setup verify the feasibility and viability of the proposed configuration as well as its improved switching pattern.

42 ENGINEERING↗

Multiscale Electrothermal Design of a Modular Multilevel Converter for Medium-Voltage Grid-Tied Applications

As a key feature of modular multilevel converters (MMCs), a large number of semiconductor devices are employed in the converter and distributed over a stack of submodules. Each submodule has a strict temperature limit that imposes constraints on the operating range of the converter. Different loading conditions/losses in the submodules lead to unavoidable temperature variations inside the MMC, which consequently affect the system-level performance and reliability. This paper is focused on the electrothermal analysis and design of a medium-voltage silicon carbide (SiC)-based MMC system, from submodule power semiconductors to the overall MMC system integration of multiple submodules, for grid-connected applications. Loss calculations are performed to estimate the cooling requirements and aid thermal design at different levels. The performance of a forced-air cooling approach is analyzed within a numerical modeling framework. Maximum temperature of the SiC power modules is predicted using numerical tools. Thermal design of the MMC cabinet with various arrangements of air inlet(s) and outlet(s) is investigated and compared from a cooling performance perspective. A fully resolved model of the arrangement that yields optimal results is developed to accurately predict the temperature profile of the essential components in the submodules.

computational fluid dynamics↗

A Generic Multivector Model Predictive Control With Symmetric Pulse Pattern for Hybrid Multilevel Converters

This article presents a generic multivector model predictive control (MV-MPC) method that has the potential to be applied to all hybrid multilevel converters (HMCs). It first locates the reference voltage vector in the 120° oblique coordinate to select the three adjacent voltage vectors to be applied over one control cycle. Then, the current tracking is guaranteed through duty cycle optimization and dc capacitor voltages are balanced by evaluating possible switching sequences that belong to the voltage vectors with optimal duty cycles. At last, the optimal switching sequence with a symmetric five- or seven-segment pulse pattern is generated using an external modulator. Here, the proposed generic MV-MPC can significantly improve the quality of the output current, while achieving a constant equivalent switching frequency at the same time. Experimental studies on an all silicon carbide HMC prototype, i.e., an active neutral point clamped converter with cascaded H-bridge, are presented to validate the effectiveness of the proposed MV-MPC strategy.

42 ENGINEERING↗

A Virtual Space Vector Model Predictive Control for a Seven-Level Hybrid Multilevel Converter

This paper proposes a virtual space vector (VSV) model predictive control (MPC) for a three-phase seven-level (7L) hybrid multilevel converter (HMC), where each phase consists of an active-neutral-point-clamped converter with a floating H-bridge. To achieve the best current tracking, which is the primary goal of the proposed algorithm, a novel geometrical positioning approach is proposed to select the optimal voltage vector among all the realspace vectors and VSVs. Then, all the possible switching sequences that belong to the optimal voltage vector are evaluated to realize the dc capacitor voltage balancing and common-mode voltage reduction. Through an external modulator, the optimal voltage vector can be synthesized by using either one-, three-, or seven-segment switching sequence. Compared with the conventional MPC, the proposed VSV-MPC can reduce not only the computational burden but also the current THD. Both simulation and experimental results obtained on silicon carbide based 7L-HMC prototype are presented to validate the feasibility and effectiveness of the proposed VSVMPC strategy.

42 ENGINEERING↗

Simplified Two-Stage Model Predictive Control for a Hybrid Multilevel Converter With Floating H-Bridge

This paper proposes a simplified two-stage model predictive control (ST-MPC) for a hybrid multilevel converter, which is an active-neutral-point-clamped converter with floating H-bridge (ANPC-H). The objective of the first stage is to select the voltage vector that has the optimal current tracking performance by using a novel geometrical positioning approach in the complex plane. The second stage selects the best switching state among all the available switching states that belong to the same voltage vector obtained in the first stage, to balance dc capacitor voltages and reduce the common mode voltage. The proposed ST-MPC can dramatically reduce the computational burden and ensure the best current tracking by the two-stage structure, such that the execution time is much shorter compared with the conventional MPC. In addition, the geometrical positioning approach in the first stage is generic and can be applicable for any multilevel converters with N-level output; thus, this ST-MPC can be applied for both sevenand nine-level operation of the hybrid ANPC-H converter under different dc voltage ratios. Both simulation results and experimental results obtained on a silicon carbide hybrid ANPC-H converter prototype validate the feasibility and effectiveness of the proposed ST-MPC strategy.

42 ENGINEERING↗

Single-Phase Dielectric Fluid Thermal Management for Power-Dense Automotive Power Electronics

This paper describes the design and performance of a dielectric fluid cooling concept for automotive power electronics. The concept combines a low-thermal-resistance package (which eliminates metalized ceramic substrates) with a high-performance convective cooling strategy (slot jets impinging on finned surfaces). Modeling was first used to design the cooling system to maximize thermal performance and minimize pumping power. Additionally, a prototype was then fabricated, and experiments were conducted to validate the model predictions using three fluids at various fluid flow rates (16.7 cm 3 /s [1 L/min] to 68.3 cm 3 /s [4.1 L/min]) and inlet temperatures (30C and 70C). The final design was compact (120-cm 3 total volume, including heat exchanger and conceptual power modules) and cooled 12 devices (e.g., silicon carbide). The validated model was then used to predict the junction-to-fluid thermal resistance and pumping power for various conditions, including 40C fluid temperature. The results predict thermal resistance values as low as 19 mm 2 K/W are possible using the dielectric fluid cooling approach. The dielectric fluid cooling system is predicted to provide thermal resistance and pumping power values that are approximately 56% and 90% lower, respectively, compared to an automotive power electronics cooling system.

30 DIRECT ENERGY CONVERSION↗

A PCB-Embedded 1.2 kV SiC MOSFET Half-Bridge Package for a 22 kW AC–DC Converter

This article presents the design and analysis of a double-side-cooled printed circuit board (PCB) embedded silicon carbide (SiC) MOSFET half-bridge package with low loop inductances and an integrated gate driver. The 1.2 kV SiC MOSFET dies used in the half-bridge package are embedded in the PCB using AT&S's patented technique. The dies are cooled and electrically connected to traces in the PCB through copper-filled microvias. The design methodology accounts for both electrical and thermal performance, limiting the power-loop inductance to 2.3 nH and the maximum package temperature to less than the 175 °C limit. The integration of the gate drive circuitry allows for a high power density and 2.2 nH gate-loop inductances. At 0.12 K/W, the measured junction-to-case thermal resistance with double-sided cooling is 57% lower than that of a TO-247 package. Under similar operating conditions, the PCB-embedded half-bridge package also achieves a 5.6 times lower voltage overshoot and a 0.5% higher peak efficiency than a TO-247-based half-bridge. This article reports the first demonstration of PCB-embedded 1.2 kV SiC MOSFET packages in buck, boost, and ac–dc converters. Furthermore, the prototype three-phase ac–dc converter for an electric vehicle on-board charger is composed of six PCB-embedded half-bridge packages and achieves an efficiency of 98.2% and a power density of 182 W/in 3 .

42 ENGINEERING↗

PCB-on-DBC GaN Power Module Design with High-Density Integration and Double-Sided Cooling

Lateral gallium nitride (GaN) high-electron-mobility transistors (HEMTs) present better electrical characteristics compared to silicon or silicon carbide devices such as high switching speed and low gate charge, but also present additional challenges on the module design. Here, this paper discusses a high-density GaN power module with double-sided cooling, low inductance, on-package decoupling capacitors, and integrated gate drivers. The GaN dies as well as the gate drive are sandwiched between the printed circuit board (PCB) and direct bonded copper (DBC) substrate to achieve compact loop and double-sided cooling effect. Design considerations and thermal performance are analyzed. A module assembly procedure is presented utilizing the layer-by-layer attachment process. Finally, a 2.7 cm x 1.8 cm half-bridge GaN power module is fabricated and tested, achieving a low power-loop inductance of 1.03 nH, and the overshoot voltage of the switching waveform is less than 5% under a 400-V/25-A double-pulse test. The thermal resistance is 0.32 K/W, verified by simulation and experimental results. The design and assembly process can be generalized and applied to high power applications to achieve high power density and high performance.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

Hardware Design of Medium Voltage SiC-Based Modular Multilevel Converters for Grid-Tied Applications

This paper presents a design of a 10 kV silicon carbide (SiC) MOSFET based modular multilevel converter (MMC). The MMC functions as the interconnection between a 24 kV dc bus and a 13. SkV distribution grid. This paper focuses on the hardware design of the MMC and its submodules. The gate driver, auxiliary power supply and bus bur in submodules are major components that need to meet high dv/dt immunity and high insulation voltage requirements. The gate driver achieves over 200 kV/us common mode transient immunity (CMTI). Its associated auxiliary power supply is based on an on-board transformer with over 30 kV insulation capability and 1.4 pF barrier capacitance. The busbar achieves less than 11 kV/cm electric field in the air to avoid partial discharges. Validation tests of the MMC submodule were performed by double pulse tests at 5 kV and buck converter tests at3 kV, 52A (peak). Reliable operations were achieved in validation tests.

auxiliary power supply↗

Porous Ti 3 AlC 2 MAX phase enables efficient synthesis of Ti 3 C 2 T x MXene

Abstract MXenes, a large family of two‐dimensional carbides and/or nitrides, are among the most studied materials worldwide due to their great diversity of structures and compositions. Their unique properties find use in several applications. Typically, they are manufactured by selective wet‐chemical etching of layered MAX phase ceramics, which are produced nowadays primarily for MXene synthesis. However, the synthesis of MAX phases has not been changed since the time of their use in structural and high‐temperature applications, and it has not been optimized for MXene manufacturing. The main purpose of this study is to develop a porous Ti 3 AlC 2 MAX phase that can be easily ground into individual grains without time‐consuming, harsh, and tedious crushing and milling steps. Moreover, we also demonstrate the synthesis of highly porous Ti 3 AlC 2 from an inexpensive titanium sponge instead of a highly pure titanium powder and explain the mechanisms of reaction sintering and formation of porous MAX phase. MXene obtained from this MAX phase, Ti 3 C 2 Tx, shows larger flake size and higher electrical conductivity in thin films, compared to the materials produced from the costly fine titanium powder. The proposed approach may apply to the synthesis of other MAX phases as well.

Materials Science↗