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At least 973 records · Page 54

Vertical GaN Superjunction Diode on Sapphire with Kilovolt Dynamic Breakdown Voltage

The development of superjunction structures for use in vertical wide bandgap power devices promise to break the 1-D material limits. Additionally, the possibility of utilizing heteroepitaxial GaN-on-Sapphire wafer for vertical devices can significantly trim the material and device cost. This work introduces a quasi-vertical GaN-on-Sapphire superjunction PN diode design utilizing sputtered p-NiO on the etched GaN fins for superjunction formation. DC breakdown voltage is shown to vary with superjunction charge imbalance and significantly exceed the expected 1-D planar limit of 350V given the epilayer design used. A maximum breakdown voltage of 840 V is extracted for near charge balance conditions limited by leakage current. Dynamic breakdown of the device is characterized as a function of reverse voltage slew rate. A maximum dynamic breakdown voltage of 1160 V under a reverse voltage slew rate of 2000 V/μs is found.

Porter, Matthew↗

Fabrication of Freestanding Metallic Ni-Mo-W Microcantilever Beams With High Dimensional Stability

Recent studies have elucidated a promising balance of physical and mechanical properties of sputter deposited nickel-molybdenum-tungsten (Ni-Mo-W) films that have a unique nanotwinned microstructure and promising potential for use in high temperature microelectromechanical systems (MEMS). Here, the current study was undertaken to establish the feasibility of making nanotwinned Ni-Mo-W microcantilevers with standard micro- fabrication processing, to assess their dimensional stability, and to demonstrate the possibility of using nanotwinned Ni-Mo-W in metal MEMS devices. Deposition of Ni-Mo-W films in commercial sputtering chambers revealed a wide processing window for the formation of the requisite nanotwinned microstructure. Conventional photolithography and etchants were employed to shape blanket Ni-Mo-W films into freestanding microcantilever beams. Monitoring microcantilever deflections via interferometry provided a direct measure of residual stresses and overall dimensional stability. Heat treatments of 200° C and 400° C were used to mimic wafer bonding temperatures. At 400°C, microcantilevers exhibited modest stress relaxation, yielding beam deflection profiles on the nanometer scale and portending dimensional stability and control for future metal MEMS devices.

36 MATERIALS SCIENCE↗

Laser Crystallization and Dopant Activation of a-Si:H Carrier-Selective Layer in TOPCon Si Solar Cells

Herein, we present a pulsed-laser processing method for crystallization and dopant activation of a highly n-doped amorphous silicon (a-Si:H) carrier-selective layer in a tunnel oxide passivated contact (TOPCon) Si solar cell structure. Here, the laser method provides enhanced conductivity and implied open circuit voltage while reducing emitter saturation current density and surface heating, as opposed to conventional high-temperature furnace annealing of the bulk Si wafer with a TOPCon structure. We identify an appropriate laser wavelength, fluence, and layer thickness using modeling and simulations. Raman and Hall effect measurements demonstrate increased crystallinity and dopant activation, whereas photoconductive decay shows enhanced surface and interface passivation quality. Additionally, we examine the role of subsequent SiNx deposition on further improving the passivation of laser-processed TOPCon layers to achieve a 5.9 kΩ/sq film sheet resistance, 2 ms effective carrier lifetime, 718 mV implied open-circuit voltage (iVOC), and 8.6 fA/cm 2 one-side recombination current density (J0) with the potential for further passivation improvement via laser process and a-Si layer thickness optimization.

14 SOLAR ENERGY↗

Influence of Tabula Rasa on Process- and Light-Induced Degradation of Solar Cells Fabricated From Czochralski Silicon

Monocrystalline Si solar cells are fabricated from Czochralski (Cz) Si, which contains 10 17 –10 18 cm -3 oxygen atoms. Cz Si undergoes degradation during high-temperature thermal processing steps, such as dopant diffusion to form the p - n junction. This degradation in the bulk minority carrier lifetime can be related to the formation of oxygen precipitates. We found that a high-temperature annealing process known as tabula rasa (TR) not only mitigates process-induced degradation via oxygen precipitate nuclei dissolution, but also modifies subsequent light-induced degradation. We report on the bulk carrier lifetime of n - and p -type Cz Si after TR, which homogenizes the interstitial oxygen in the bulk Si to its monoatomic form in either an N 2 or O 2 environment. A control sample, which was not subjected to a TR processing step, experienced severe process-induced degradation during a boron emitter thermal budget as oxygen precipitates were formed in the Si bulk. These precipitates could be imaged using photoluminescence. Additionally, samples that underwent a TR processing step prior to the boron emitter thermal budget show efficient gettering of metallic impurities compared to the control sample, which showed a decline in the implied open-circuit voltage after the gettering step. Furthermore, modification of the interstitial oxygen bonding by TR had a strong effect on the light-induced degradation kinetics. Instead of a typically observed monotonic decrease, minority carrier lifetime increases first, followed by a nonmonotonic decrease over a ~20 h period. Finally, we conclude that by modifying the interstitial oxygen bonding via TR pretreatment, p -type Cz Si wafers become substantially resistant to harsh solar cell processes and strongly modified light-induced degradation, which would open alternative ways to mitigate this degradation mechanism.

14 SOLAR ENERGY↗

(110)-Oriented GaAs Devices and Spalling as a Platform for Low-Cost III-V Photovoltaics

Here, we demonstrate the growth of GaAs solar cells by hydride vapor phase epitaxy (HVPE) on epi-ready and previously spalled (110) GaAs wafers as an advance towards a potentially low-cost (110)-based device platform. Controlled spalling offers a fracture-based path to substrate cost amortization, enabling device exfoliation and substrate reuse, but the faceted surface generated during the spalling of (100)-oriented GaAs presents hurdles to direct regrowth of subsequent devices. Spalling of (110) substrates instead eliminates faceting by aligning the substrate surface with the predominant crystal cleavage plane. III-V epitaxy of solar cells is significantly less developed on (110)-oriented substrates, however. Here, we develop (110)-based GaAs solar cells grown by HVPE on epi-ready substrates, demonstrating equal performance to devices grown on the more standard (100) orientation. We also characterize the surface of spalled, (110)-oriented substrates, revealing flat terraces separated by steps with sub-micron-scale height on average. Finally, we present an initial device grown on a previously spalled surface without additional surface re-preparation with nearly 16% efficiency under a simulated AM1.5G spectrum. Together, these results provide preliminary evidence of a potentially low-cost path to enable terrestrial III-V photovoltaics via the (110) substrate orientation.

14 SOLAR ENERGY↗

Wet-Etching of Acoustically Spalled GaAs for Substrate Reuse

Acoustic spalling is a promising technique for substrate reuse in the fabrication of gallium arsenide (GaAs) photovoltaic cells. However, the acoustic spalling process can leave the substrate with areas of rough surface morphology that can interfere with subsequent cell growth and processing. In this work, we investigate the use of wet etchants to smooth the surface of acoustically spalled GaAs substrates. We evaluated six different etchants. Of those tested, an 8:1:1 mixture of sulfuric acid, hydrogen peroxide, and water at 30 degrees C and a moderate stirring rate showed the greatest roughness reduction per mass loss while producing the desired morphology. This etchant was then applied to an acoustically spalled 2-inch GaAs wafer. A single-junction GaAs cell was then grown via metalorganic vapor-phase epitaxy on this substrate, an acoustic spalled substrate without a smoothing etch, and an epi-ready substrate. Use of the 8:1:1 H2SO4:H2O2:H2O etchant produced cells an average efficiency of 12.8% as compared to that of 2.0% grown on the unetched acoustically spalled substrate and 16.3% grown on the epi-ready substrate. The results of this work demonstrate that wet etching is a viable method for smoothing the surface of spalled GaAs substrates, paving the way for substrate reuse via acoustic spalling at efficiencies that approach growth on epi-ready substrates.

etching↗

High-Throughput In-Line Deposition of Silicon Oxide for Polycrystalline Silicon Passivating Contacts

Polycrystalline silicon passivating contacts rely on an ultrathin (1–2 nm) silicon oxide layer to minimize recombination at the wafer/oxide interface and regulate dopant diffusion. Traditionally formed by thermal or chemical oxidation, this oxide is herein replaced by silicon oxide deposited via aerosol impact-driven assembly (AIDA), enabling high wafer-per-hour throughput and precise thickness control. In this study, we show that AIDA coatings conformally cover planar or textured substrates and achieve a SiO x /poly-Si(n) structure with an implied open-circuit voltage (iV oc = 726 mV) and contact saturation current density (J 0 = 8.8 fA/cm 2 ). Furthermore, annealing AIDA SiO x films at elevated temperatures desorbs hydroxyl groups while the stoichiometry transitions toward SiO 2 , improving passivation quality. Together, these results highlight AIDA’s potential for scalable, high-throughput manufacturing of advanced passivating contacts, offering a cost-effective alternative to conventional low-pressure chemical vapor deposition and plasma-enhanced chemical vapor deposition-based silicon and oxide processes.

TOPcon↗

Low Threshold, Long Wavelength Interband Cascade Lasers With High Voltage Efficiencies

Here, we report on the substantial advancement of long wavelength InAs-based interband cascade lasers (ICLs) utilizing advanced waveguides formed from hybrid cladding layers and targeting the 10-12 µm wavelength region. Modifications in the hole injector have improved carrier transport in these ICLs, resulting in significantly reduced threshold voltages (V th ) as low as 3.62 V at 80 K. Consequently, much higher voltage efficiencies were observed, peaking at about 73% at 10.3 µm and allowing for large output powers of more than 100 mW/facet. Also, low threshold current densities (J th ) of 8.8 A/cm 2 in cw mode and 7.6 A/cm 2 in pulsed mode near 10 µm were observed; a result of adjustments in the GaInSb hole well composition intended to reduce the overall strain accumulation in the ICL. Furthermore, an ICL from the second wafer operating at a longer wavelength achieved a peak voltage efficiency of 57% at 11.7 µm, with a peak output power of more than 27 mW/facet. This ICL went on to lase beyond 12 µm in both cw and pulsed modes, representing a new milestone in long wavelength coverage for ICLs with the standard W-QW active region.

47 OTHER INSTRUMENTATION↗

Micromachined Piezoresistive-sensed Diaphragms for Infrasonic Monitoring

Micromachined, piezoresistive-sensed diaphragms are designed and fabricated specifically for infrasound sensing applications. Relatively large diaphragms, up to 6 mm × 6 mm, are fabricated to meet the high sensitivity requirements of infrasonic monitoring. A double-stack SOI wafer process is used, resulting in a streamlined two-mask process without the need for doping or ion-implantation. Pressure-sensitivities of diaphragms are studied using a custom static calibration set-up. Here, the piezoresistance of longitudinal and transverse resistors are studied over a large pressure range of ±5,500 Pa so that the linear and nonlinear response regions of diaphragms are observed. Measurements are compared against a nonlinear finite element simulation—shown to accurately predict the sensor’s behavior over a large response range.

47 OTHER INSTRUMENTATION↗

A Multichannel Silicon Package for Large-Scale Skipper-CCD Experiments

The next generation of experiments for light-dark-matter and neutrino searches based on skipper charge-coupled devices (skipper-CCDs) introduces new challenges for the sensor packaging and readout architecture. Scaling the active mass while simultaneously reducing the experimental backgrounds in orders of magnitude requires a novel high-density silicon-based package that must be massively produced and tested. In this work, we present a silicon multichip module design capable of hosting up to 16 skipper-CCDs, along with the fabrication process for the first prototypes. We thoroughly tested and characterized the assembled prototypes to build an empirical model for the video output signal of skipper-CCDs integrated into the silicon package. We then used this model in simulations to optimize the fabrication process and achieve the robust performance required for the full-scale array, which we validated through a new round of prototype fabrication. We outline the specifications selected for the ongoing production of 1500 silicon wafers that will ultimately add up to a 10-kg skipper-CCD array with 24000 readout channels.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Robust Avalanche (1.5 kV, 2 kA/cm²) in Vertical GaN Diodes on Patterned Sapphire Substrate

The lack of avalanche capability is a key limitation of current lateral GaN devices. Despite the report of avalanche in vertical GaN-on-GaN devices, the high wafer cost hinders device commercialization. Here, in this work, we demonstrate a circuit-level avalanche in vertical GaN diodes on low-cost patterned sapphire substrate (PSS), with the avalanche voltage (1.57 kV) and avalanche current density (>2 kA/cm 2 ) both being the highest reported in GaN devices on foreign substrates. The PSS enables a lower dislocation density than conventional sapphire substrate and is employed in high-voltage GaN devices for the first time. The avalanche voltage in the circuit test reaches 98% of the parallel-plane limit, further affirming that near-ideal avalanche breakdown can be realized on GaN devices on foreign substrates. These results show the promise of the GaN-on-PSS platform for low-cost, robust power devices.

42 ENGINEERING↗

Inserting a Low-Refractive-Index Dielectric Rear Reflector into PERC Cells: Challenges and Opportunities

One of the simplest and most effective ways to reduce the operating temperature of photovoltaic systems in the field is to reflect unusable, 'sub-bandgap' light with energies below the cell absorber's bandgap energy. In this work, low-refractive index SiO2 nanoparticle films inserted between c-Si wafers and metal electrodes significantly increase the reflectance of sub-bandgap light in fabricated test structures. These films are then integrated into the standard PERC fabrication sequence, revealing that the reflection benefits remains after some processing steps but are lost in certain conditions. The SiO2 nanoparticle films are easily ablated during laser contact opening, but are undesirably etched during post-laser cleaning. After Al metallization, the fully fabricated devices show enhanced sub-bandgap reflection when annealed at moderate temperatures, but energy-dispersive X-ray spectroscopy shows that high-temperature firing causes unwanted Al penetration into the SiO2 nanoparticle film, compromising reflection.

14 SOLAR ENERGY↗

A Simple Physical Model for Three-Terminal Tandem Cell Operation

We present a simple physical model that explains the device operation of a three-terminal (3T) IBC Si bottom cell platform that enables an efficient 3T tandem. If the IBC cell has two p-n junctions and one high-low junction (bipolar transistor), the two p-n junctions strongly interact via minority carrier diffusion in the base. In a two-BSF junction and one p-n junction IBC platform (single emitter), the BSF terminals interact via ohmic majority carrier current in the base. This interaction creates wide 'generating' power islands in the 2D current J 1 J 2 plane. The area and shape of these islands are determined by dissipative losses in the wafer base and in the cell contacts. Both positive and negative terminal currents are allowed for 3T operation, thus enabling both the top and bottom cells to operate at their full light currents. This opens new possibilities for 3T use in modules.

14 SOLAR ENERGY↗

Pinhole Formation in Poly-Si/SiOx Passivating Contacts on Si(111)-Oriented Textures

Poly-Si/SiOx passivating contacts were grown on inverted pyramid and random pyramid textured wafers to investigate the hypothesis that pinhole formation is most susceptible at the valleys and edges of a textured surface. Tetramethylammonium hydroxide (TMAH) etching and electron beam induced current (EBIC) were used to assess pinhole formation and charge-carrier transport. Scanning electron microscopy revealed that TMAH etching can expose pinhole locations on textured surfaces. We show that pinholes may preferentially form at the vertices of inverted pyramids. Our TMAH and EBIC analyses on random pyramids show no preferential oxide breakup at the pyramid valleys.

41 EE - Solar Energy Technologies Office (EE-4S)↗

Improving Performance of III-V Solar Cells Grown on Spalled Germanium with Ex Situ Substrate Planarization

Controlled spalling allows removal of devices and provides an opportunity for cost reduction through substrate reuse. However, the fracture-based process can leave behind morphological surface features, notably river lines, that can disrupt epitaxial growth and degrade device performance. We investigate the viability of various wet etch chemistries to planarize river lines to ensure high-quality device growth and performance without mechanical repolishing, and so maintain a route towards cost-effective reuse. Etching in a HF: HNO 3 :CH 3 COOH solution effectively planarizes river lines and produces a surface that yields devices with equivalent performance to those grown on epi-ready Ge wafer surfaces. Further studies will focus on optimizing etch composition, temperature, and time to minimize material removal while maintaining a suitable surface for high-quality epitaxy.

germanium↗

Recovery of Glass and Silicon Solar Cells from Si-Modules Through Laser Processing

This study demonstrates an innovative and environmentally friendly laser-based approach for the efficient recovery of glass and silicon solar cells, allowing the recycling of photovoltaic modules. The methodology involves the use of a high-power pulsed laser beam focusing at various interfaces within the modules. Specifically, the delivery of ultra-short pulse laser energy at the interfaces of glass and polymeric encapsulants, as well as at the encapsulants and silicon solar cells, facilitates the debonding of polymers from both glass and silicon cell surfaces. The debonding occurs through photothermal, ablation, chemical modification, and localized heat generation. The research successfully demonstrates the recovery of glass from commercial mini solar modules of size 11.5 x 6.8 cm 2 and a silicon wafer of size 3.0x1.6 cm 2 . Ongoing efforts aim to extend the effectiveness of this laser-based methodology to comprehensively recycle larger-size components. This innovative approach holds promise for addressing environmental concerns associated with the disposal of solar modules, contributing to sustainable practices in the renewable energy sector.

glass↗

Irradiation-induced Degradation of Surface Acoustic Wave Devices Fabricated on Bulk AlN

Here, recent work to evaluate the prospects for surface acoustic wave (SAW) devices fabricated on bulk aluminum nitride (AlN) for elevated temperature and radiation environments is reported and discussed. The design and fabrication of an array of SAW devices using commercial wafers is described, including the non-standard fabrication approach taken to overcome the stress-induced warpage of the 50 mm diameter AlN substrates. Radio frequency performance characterization of the SAW devices, with resonance frequencies ranging from 0.5 GHz to 1.5 GHz, is described. The linear temperature coefficient of frequency (TCF) near room temperature was measured and is compared to theoretical results from other investigators. Further, the effects of 8 MeV Al ion irradiation at 300°C and 500°C to damage levels of 0.01, 0.1 and 1 displacements per atom (dpa), as a proxy for neutron irradiation, was investigated. The ion irradiation damage was observed to decrease the SAW resonant frequency, and this effect is characterized and discussed. Significant degradation in the conductivity of the Ti/Al electrodes of the SAW devices was also observed and characterized. These experimental results provide a basis for further investigation of the prospects for development of SAW sensor devices in bulk AlN material for application in elevated temperature and radiation environments.

36 MATERIALS SCIENCE↗

Evaluation of Fe-βGa 2 O 3 for Photoconductive Semiconductor Switching

We present iron-doped beta gallium oxide (Fe- β Ga2O3) as a candidate for photoconductive semiconductor switches (PCSSs) with sub-bandgap light. From a commercially available Fe- β Ga2O3 wafer, we first did material characterization. This included measurements of absorption coefficient and dopant composition, carrier activation energy up to 200 °C, break down field of planar electrodes (limited from material passivation), and free carrier recombination lifetime, and thermal effects up to 203 °C on photocurrent with a 447 nm light emitting diode (LED) source. Here, we then demonstrated pulsed operation of a Fe- β Ga2O3 PCSS under different sub-bandgap wavelengths (355, 532, and 1064 nm) and sub-ns pulses. Fe- β Ga2O3 is a candidate for high temperature PCSS with 355 nm responsivity of 7×10 -7 A-cm/W-kV at room temperature and up to 5.5×10 -4 A-cm/W-kV at 200 °C. From these investigations, we discuss a simple trap model to describe the illumination process of the PCSS. Fe- β Ga2O3 has a high breakdown field and has moderate responsivity characteristics, but the dark current at high temperature leads to low photo-to-dark current ratio (PDCR). Regardless, we verify its potential as a PCSS material for harsh environment applications.

42 ENGINEERING↗