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At least 973 records · Page 54
All sourcesNASA NTRSDOE OSTI
DOE OSTI2024

Hemorrhage management system

An embodiment includes a wound dressing comprising: a shape memory polymer (SMP) foam, including open cells, having first and second states; and a hydrogel (HG) included within the cells; wherein (a) in a first position a composite, including the SMP foam and the HG, is configured to be located proximate a hemorrhagic tissue with the SMP foam in the first state; (b) in a second position the composite is configured to be expanded to the second state against the hemorrhagic tissue when the SMP foam is plasticized at 37° C. depressing a glass transition temperature (Tg) of the SMP foam to below 25° C. Other embodiments are described herein.

Maitland, Duncan J.↗
NASA NTRS2014

SpaceCube v2.0 Space Flight Hybrid Reconfigurable Data Processing System

This paper details the design architecture, design methodology, and the advantages of the SpaceCube v2.0 high performance data processing system for space applications. The purpose in building the SpaceCube v2.0 system is to create a superior high performance, reconfigurable, hybrid data processing system that can be used in a multitude of applications including those that require a radiation hardened and reliable solution. The SpaceCube v2.0 system leverages seven years of board design, avionics systems design, and space flight application experiences. This paper shows how SpaceCube v2.0 solves the increasing computing demands of space data processing applications that cannot be attained with a standalone processor approach.The main objective during the design stage is to find a good system balance between power, size, reliability, cost, and data processing capability. These design variables directly impact each other, and it is important to understand how to achieve a suitable balance. This paper will detail how these critical design factors were managed including the construction of an Engineering Model for an experiment on the International Space Station to test out design concepts. We will describe the designs for the processor card, power card, backplane, and a mission unique interface card. The mechanical design for the box will also be detailed since it is critical in meeting the stringent thermal and structural requirements imposed by the processing system. In addition, the mechanical design uses advanced thermal conduction techniques to solve the internal thermal challenges.The SpaceCube v2.0 processing system is based on an extended version of the 3U cPCI standard form factor where each card is 190mm x 100mm in size The typical power draw of the processor card is 8 to 10W and scales with application complexity. The SpaceCube v2.0 data processing card features two Xilinx Virtex-5 QV Field Programmable Gate Arrays (FPGA), eight memory modules, a monitor FPGA with analog monitoring, Ethernet, configurable interconnect to the Xilinx FPGAs including gigabit transceivers, and the necessary voltage regulation. The processor board uses a back-to-back design methodology for common parts that maximizes the board real estate available. This paper will show how to meet the IPC 6012B Class 3A standard with a 22-layer board that has two column grid array devices with 1.0mm pitch. All layout trades such as stack-up options, via selection, and FPGA signal breakout will be discussed with feature size results. The overall board design process will be discussed including parts selection, circuit design, proper signal termination, layout placement and route planning, signal integrity design and verification, and power integrity results. The radiation mitigation techniques will also be detailed including configuration scrubbing options, Xilinx circuit mitigation and FPGA functional monitoring, and memory protection.Finally, this paper will describe how this system is being used to solve the extreme challenges of a robotic satellite servicing mission where typical space-rated processors are not sufficient enough to meet the intensive data processing requirements. The SpaceCube v2.0 is the main payload control computer and is required to control critical subsystems such as autonomous rendezvous and docking using a suite of vision sensors and object avoidance when controlling two robotic arms.

Xilinx FPGA↗
DOE OSTI2026

Protonic nickelate device networks for spatiotemporal neuromorphic computing

Computation in biological neural circuits arises from the interplay of nonlinear temporal responses and spatially distributed dynamic network interactions. Replicating this richness in hardware has remained challenging, as most neuromorphic devices emulate only isolated neuron- or synapse-like functions. Here we introduce an integrated neuromorphic computing platform in which both nonlinear spatiotemporal processing and programmable memory are realized within a single perovskite nickelate material system. By engineering symmetric and asymmetric hydrogenated NdNiO 3 junction devices on the same wafer, we combine ultrafast, proton-mediated transient dynamics with stable multilevel resistance states. Networks of symmetric NdNiO 3 junctions exhibit emergent spatial interactions mediated by proton redistribution, while each node simultaneously provides short-term temporal memory, enabling nanosecond-scale operation with an energy cost of ~0.2 nJ per input. When interfaced with asymmetric output units serving as reconfigurable long-term weights, these networks allow both feature transformation and linear classification in the same material system. Leveraging these emergent interactions, the platform enables real-time pattern recognition and achieves high accuracy in spoken digit classification and early seizure detection, outperforming temporal-only or uncoupled architectures. These results position protonic nickelates as a compact, energy-efficient, CMOS-compatible platform that integrates processing and memory for scalable intelligent hardware.

Electrical and electronic engineering↗
DOE OSTI2026

Memory-efficient nonsmooth dynamic optimization using adaptive randomized compression

Dynamic optimization problems arise in many applications including flow control, full waveform inversion, and medical imaging. These problems are plagued by significant computational challenges. One such challenge — and the focus of this work — is the memory limitation induced by the size of the underlying dynamical system. In particular, the entire dynamic trajectory is required for derivative computation and therefore must be stored or recomputed using, e.g., checkpointing. Although recent work demonstrated the use of adaptive randomized sketching to overcome the memory challenge, that work only applies to smooth unconstrained problems, prohibiting its use for nonsmooth regularized and constrained problems. The inclusion of nonsmooth regularizers and constraints is critical as they often arise in an attempt to preserve certain physical properties or to promote sparsity. To solve these problems, we introduce a trust-region algorithm for minimizing the sum of a smooth nonconvex function and a nonsmooth convex function that leverages randomized sketching to compress the dynamical system trajectories and adaptively adjust the sketch rank to satisfy a gradient inexactness condition. We prove convergence of this algorithm and demonstrate that it achieves substantial memory reduction on three discretized PDE-constrained optimization applications.

97 MATHEMATICS AND COMPUTING↗
NASA NTRS1990

Integrating Commercial Off-The-Shelf (COTS) graphics and extended memory packages with CLIPS

This paper addresses the question of how to mix CLIPS with graphics and how to overcome PC's memory limitations by using the extended memory available in the computer. By adding graphics and extended memory capabilities, CLIPS can be converted into a complete and powerful system development tool, on the other most economical and popular computer platform. New models of PCs have amazing processing capabilities and graphic resolutions that cannot be ignored and should be used to the fullest of their resources. CLIPS is a powerful expert system development tool, but it cannot be complete without the support of a graphics package needed to create user interfaces and general purpose graphics, or without enough memory to handle large knowledge bases. Now, a well known limitation on the PC's is the usage of real memory which limits CLIPS to use only 640 Kb of real memory, but now that problem can be solved by developing a version of CLIPS that uses extended memory. The user has access of up to 16 MB of memory on 80286 based computers and, practically, all the available memory (4 GB) on computers that use the 80386 processor. So if we give CLIPS a self-configuring graphics package that will automatically detect the graphics hardware and pointing device present in the computer, and we add the availability of the extended memory that exists in the computer (with no special hardware needed), the user will be able to create more powerful systems at a fraction of the cost and on the most popular, portable, and economic platform available such as the PC platform.

Callegari, Andres C.↗
NASA NTRS1995

Exploring the use of I/O nodes for computation in a MIMD multiprocessor

As parallel systems move into the production scientific-computing world, the emphasis will be on cost-effective solutions that provide high throughput for a mix of applications. Cost effective solutions demand that a system make effective use of all of its resources. Many MIMD multiprocessors today, however, distinguish between 'compute' and 'I/O' nodes, the latter having attached disks and being dedicated to running the file-system server. This static division of responsibilities simplifies system management but does not necessarily lead to the best performance in workloads that need a different balance of computation and I/O. Of course, computational processes sharing a node with a file-system service may receive less CPU time, network bandwidth, and memory bandwidth than they would on a computation-only node. In this paper we begin to examine this issue experimentally. We found that high performance I/O does not necessarily require substantial CPU time, leaving plenty of time for application computation. There were some complex file-system requests, however, which left little CPU time available to the application. (The impact on network and memory bandwidth still needs to be determined.) For applications (or users) that cannot tolerate an occasional interruption, we recommend that they continue to use only compute nodes. For tolerant applications needing more cycles than those provided by the compute nodes, we recommend that they take full advantage of both compute and I/O nodes for computation, and that operating systems should make this possible.

Kotz, David↗
NASA NTRS1980

Eight microprocessor-based instrument data systems in the Galileo Orbiter spacecraft

Instrument data systems consist of a microprocessor, 3K bytes of Read Only Memory and 3K bytes of Random Access Memory. It interfaces with the spacecraft data bus through an isolated user interface with a direct memory access bus adaptor, and/or parallel data from instrument devices such as registers, buffers, analog to digital converters, multiplexers, and solid state sensors. These data systems support the spacecraft hardware and software communication protocol, decode and process instrument commands, generate continuous instrument operating modes, control the instrument mechanisms, acquire, process, format, and output instrument science data.

Barry, R. C.↗
DOE OSTI2022

Milestone Report: Co-Scheduling Applications on Current and Future Architectures

This report evaluates the viability and performance of co-scheduling scientific applications and workloads between CPUs and GPUs on current and future hardware architectures. This study was performed by collecting hardware independent and memory performance characteristics of 6 ECP mini-applications through Byfl and NSight Systems, by measuring the applications’ co-scheduled performance on current node architectures, and by gathering memory bandwidth utilization data with Intel Advisor and nvprof to begin reasoning about the feasibility of co-scheduling applications on future APU architectures.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2020

Observation of single-defect memristor in an MoS2 atomic sheet

Non-volatile resistive switching, also known as memristor effect, where an electric field switches the resistance states of a two-terminal device, has emerged as an important concept in the development of high-density information storage, computing and reconfigurable systems. The past decade has witnessed substantial advances in non-volatile resistive switching materials such as metal oxides and solid electrolytes. It was long believed that leakage currents would prevent the observation of this phenomenon for nanometre-thin insulating layers. However, the recent discovery of non-volatile resistive switching in two-dimensional monolayers of transition metal dichalcogenide and hexagonal boron nitride sandwich structures (also known as atomristors) has refuted this belief and added a new materials dimension owing to the benefits of size scaling. Here we elucidate the origin of the switching mechanism in atomic sheets using monolayer MoS 2 as a model system. Atomistic imaging and spectroscopy reveal that metal substitution into a sulfur vacancy results in a non-volatile change in the resistance, which is corroborated by computational studies of defect structures and electronic states. These findings provide an atomistic understanding of non-volatile switching and open a new direction in precision defect engineering, down to a single defect, towards achieving the smallest memristor for applications in ultra-dense memory, neuromorphic computing and radio-frequency communication systems.

77 NANOSCIENCE AND NANOTECHNOLOGY↗
NASA NTRS1972

Apollo guidance, navigation and control: Guidance system operations plans for manned LM earth orbital and lunar missions using Program COLOSSUS 3. Section 7: Erasable memory programs

Erasable-memory programs (EMPs) designed for the guidance computers used in the command (CMC) and lunar modules (LGC) are described. CMC programs are designated COLOSSUS 3, and the associated EMPs are identified by a three-digit number beginning with 5. LGC programs are designated LUMINARY 1E, and the associated EMPs are identified, with one exception, by a three-digit number beginning with 1. The exception is EMP 99. The EMPs vary in complexity from a simple flagbit setting to a long and intricate logical structure. They all, however, cause the computer to behave in a way not intended in the original design of the programs; they accomplish this off-nominal behavior by some alteration of erasable memory to interface with existing fixed-memory programs to effect a desired result.

Hamilton, M. H.↗
NASA NTRS2002

High-Rate Communications Outage Recorder Operations for Optimal Payload and Science Telemetry Management Onboard the International Space Station

All International Space Station (ISS) Ku-band telemetry transmits through the High-Rate Communications Outage Recorder (HCOR). The HCOR provides the recording and playback capability for all payload, science, and International Partner data streams transmitting through NASA's Ku-band antenna system. The HCOR is a solid-state memory recorder that provides recording capability to record all eight ISS high-rate data during ISS Loss-of-Signal periods. NASA payloads in the Destiny module are prime users of the HCOR; however, NASDA and ESA will also utilize the HCOR for data capture and playback of their high data rate links from the Kibo and Columbus modules. Marshall Space Flight Center's Payload Operations Integration Center manages the HCOR for nominal functions, including system configurations and playback operations. The purpose of this paper is to present the nominal operations plan for the HCOR and the plans for handling contingency operations affecting payload operations. In addition, the paper will address HCOR operation limitations and the expected effects on payload operations. The HCOR is manifested for ISS delivery on flight 9A with the HCOR backup manifested on flight 11A. The HCOR replaces the Medium-Rate Communications Outage Recorder (MCOR), which has supported payloads since flight 5A.1.

Shell, Michael T.↗
NASA NTRS2001

Updated Electronic Testbed System

As we continue to advance in exploring space frontiers, technology must also advance. The need for faster data recovery and data processing is crucial. In this, the less equipment used, and lighter that equipment is, the better. Because integrated circuits become more sensitive in high altitude, experimental verification and quantification is required. The Center for Applied Radiation Research (CARR) at Prairie View A&M University was awarded a grant by NASA to participate in the NASA ER-2 Flight Program, the APEX balloon flight program, and the Student Launch Program. These programs are to test anomalous errors in integrated circuits due to single event effects (SEE). CARR had already begun experiments characterizing the SEE behavior of high speed and high density SRAM's. The research center built a error testing system using a PC-104 computer unit, an Iomega Zip drive for storage, a test board with the components under test, and a latchup detection and reset unit. A test program was written to continuously monitor a stored data pattern in the SRAM chip and record errors. The devices under test were eight 4Mbit memory chips totaling 4Mbytes of memory. CARR was successful at obtaining data using the Electronic TestBed System (EBS) in various NASA ER-2 test flights. These series of high altitude flights of up to 70,000 feet, were effective at yielding the conditions which single event effects usually occur. However, the data received from the series of flights indicated one error per twenty-four hours. Because flight test time is very expensive, the initial design proved not to be cost effective. The need for orders of magnitude with more memory became essential. Therefore, a project which could test more memory within a given time was created. The goal of this project was not only to test more memory within a given time, but also to have a system with a faster processing speed, and which used less peripherals. This paper will describe procedures used to build an updated Electronic Testbed System.

Brewer, Kevin L.↗
NASA NTRSDate not supplied

The System Complexity Metric (SCM) Explains Systems Design and is Correlated with Cost and Failure Rate

The human short term memory span and working capacity is limited to three to five items, especially if they are organized complex “chunks” of information. The impression of complexity occurs when a system is simply difficult to understand, where there is no apparent pattern to predict its behavior. Hierarchical systems design can reduce perceived complexity and increase the amount of information that can be managed. The SCM was developed to measure complexity and help compare proposed overall system architectures before detailed design information is available. The SCM is defined as the sum of the number of major nodes, N, in the system block diagram plus the number of one-way interactions, I, between the nodes. SCM = N + I. SCM’s are easily determined by direct inspection of high-level block diagrams of life support systems. Axiomatic design develops a hierarchy of subsystem requirements and designs together in a top-down, back-and-forth process. A coupling matrix is used to control the relationships between the subsystem functions and design concepts. Axiomatic design can improve system design by decoupling requirements and designs. Axiomatic design was applied to the planning of a closed life support system, similar to that used on the International Space Station. A materially open as opposed to a closed system design was created by removing the interconnections required to close the system. The open system had the same number of designed subsystems as the closed system, but it had many fewer interconnections and its SCM was lower by about half. The costs were estimated and the MTBF (Mean Time Before Failure) tabulated for open and closed space life support systems. The estimated costs were linearly proportional to SCM for the wide variations of SCM in life support, but small differences may not be significant. The flight and preflight MTBF’s both declined exponentially with increasing MTBF, faster than MTBF-2, even though the preflight estimated MTBF’s were about ten times higher than the flight MTBF’s.

System Complexity Metric (SCM)↗
NASA NTRS1983

Space flight experience with the Shuttle Orbiter control system

Experience gained through the Shuttle Orbital Flight Test program has matured the engineering understanding of the Shuttle on-orbit control system. The geneology of the control systems (called digital autopilots, or DAPs, and used by the Shuttle for on-orbit operations) is reviewed, the flight experience gained during the flight test program is examined within the context of preflight analysis and test results, and issues for the operational phase of the Shuttle, including constraints upon both operations and analysis still required to increase confidence in the Shuttle's ability to handle capabilities not experienced during the flight test program are addressed. Two orbital autopilots have resulted from computer memory and time constraints on a flight control system, with many different, flight phase unique requirements. The transition DAP, used for insertion and deorbit, has more active sensors and redundancy but a less complex data processing scheme excluding state estimation with fewer choices of operational mode.

Cox, K. J.↗
NASA NTRS1997

Computational Models of Human Performance: Validation of Memory and Procedural Representation in Advanced Air/Ground Simulation

The Man-Machine Interaction Design and Analysis System (MIDAS) under joint U.S. Army and NASA cooperative is intended to assist designers of complex human/automation systems in successfully incorporating human performance capabilities and limitations into decision and action support systems. MIDAS is a computational representation of multiple human operators, selected perceptual, cognitive, and physical functions of those operators, and the physical/functional representation of the equipment with which they operate. MIDAS has been used as an integrated predictive framework for the investigation of human/machine systems, particularly in situations with high demands on the operators. We have extended the human performance models to include representation of both human operators and intelligent aiding systems in flight management, and air traffic service. The focus of this development is to predict human performance in response to aiding system developed to identify aircraft conflict and to assist in the shared authority for resolution. The demands of this application requires representation of many intelligent agents sharing world-models, coordinating action/intention, and cooperative scheduling of goals and action in an somewhat unpredictable world of operations. In recent applications to airborne systems development, MIDAS has demonstrated an ability to predict flight crew decision-making and procedural behavior when interacting with automated flight management systems and Air Traffic Control. In this paper, we describe two enhancements to MIDAS. The first involves the addition of working memory in the form of an articulatory buffer for verbal communication protocols and a visuo-spatial buffer for communications via digital datalink. The second enhancement is a representation of multiple operators working as a team. This enhanced model was used to predict the performance of human flight crews and their level of compliance with commercial aviation communication procedures. We show how the data produced by MIDAS compares with flight crew performance data from full mission simulations. Finally, we discuss the use of these features to study communication issues connected with aircraft-based separation assurance.

Corker, Kevin M.↗