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At least 955 records · Page 53

All sources NASA NTRS DOE OSTI

DOE OSTI2020

Memory page access counts based on page refresh

A processing system tracks counts of accesses to memory pages using a set of counters located at the memory module that stores the pages, wherein the counts are adjusted at least in part based on refreshes of the memory pages. This approach allows a processing system to efficiently maintain the counts with relatively small counters and with relatively low overhead. Furthermore, the rate at which the counters are adjusted, relative to the page refreshes, is adjustable, so that the access counts are useful for a wide variety of application types.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2021

Athena: High-Performance Sparse Tensor Contraction Sequence on Heterogeneous Memory

Sparse tensor contraction sequence has been widely employed in many fields, such as chemistry and physics. However, how to efficiently implement the sequence faces multiple challenges, such as redundant computations and memory operations, massive memory consumption, and inefficient utilization of hardware. To address the above challenges, we introduce Athena, a high-performance framework for SpTC sequences. Athena introduces new data structures, leverages emerging Optane-based heterogeneous memory (HM) architecture, and stage parallelism. In particular, Athena introduces shared hash table-represented sparse accumulator to eliminate unnecessary input processing and data migration; Athena uses a novel data-semantic guided dynamic migration solution to make the best use of the Optane-based HM for high performance; Athena also co-runs execution phases with different characteristics to enable high hardware utilization. Evaluating with 12 datasets, we show that Athena brings 327-7362× speedup over the state-of-the-art SpTC algorithm. With the dynamic data placement guided by data semantics, Athena brings performance improvement on Optane-based HM over a state-of-the-art software-based data management solution, a hardware-based data management solution, and PMM-only by 1.58×, 1.82×, and 2.34× respectively.

Liu, Jiawen↗

DOE OSTI2021

Flexible optimized data handling in systems with multiple memories

Methods and systems for optimizing an application for a computing system having multiple distinct memory locations that are interconnected by one or more communication channels include determining one or more data handling properties for a data region in an application. One or more data handling policies for the data region are determined based on the one or more data handling properties. Data setup costs are determined for a scope in the application that uses the data region in different memory locations based on the one or more data handling properties. The application is optimized in accordance with the one or more data handling policies and the data setup costs for the different memory locations.

Chen, Tong↗

DOE OSTI2021

Speculative instruction wakeup to tolerate draining delay of memory ordering violation check buffers

A technique for speculatively executing load-dependent instructions includes detecting that a memory ordering consistency queue is full for a completed load instruction. The technique also includes storing data loaded by the completed load instruction into a storage location for storing data when the memory ordering consistency queue is full. The technique further includes speculatively executing instructions that are dependent on the completed load instruction. The technique also includes in response to a slot becoming available in the memory ordering consistency queue, replaying the load instruction. The technique further includes in response to receiving loaded data for the replayed load instruction, testing for a data mis-speculation by comparing the loaded data for the replayed load instruction with the data loaded by the completed load instruction that is stored in the storage location.

Kalamatianos, John↗

DOE OSTI2021

Comparing LLC-Memory Traffic between CPU and GPU Architectures

The cache hierarchy in modern CPUs and GPUs is becoming increasingly complex, which makes understanding the handshake between the memory access patterns and the cache hierarchy difficult. Moreover, the details of different cache policies are not publicly available. Therefore, the research community relies on observation to understand the relationship between memory access patterns and cache hierarchy. Our previous studies delved into the different microarchitectures of Intel CPUs. In this study, GPUs from NVIDIA and AMD are considered. Even though the execution models in CPUs and GPUs are distinct, this study attempts to correlate the behavior of the cache hierarchy of CPUs and GPUs. Using the knowledge gathered from studying Intel CPUs, the similarities and dissimilarities between CPUs and GPUs are identified. Through model evaluation, this study provides a proof of concept that traffic between last-level cache and memory can be predicted for sequential streaming and strided access patterns on GPUs.

Monil, M. A. H.↗

DOE OSTI2022

Antiferromagnetic memory storage devices from magnetic transition metal dichalcogenides

Switchable antiferromagnetic (AFM) memory devices are provided based on magnetically intercalated transition metal dichalcogenides (TMDs) of the form AxMC2, where A is a magnetic element of stoichiometry x between 0 and 1, M is a transition metal of stoichiometry 1, and C is a chalcogen of stoichiometry 2. Memory storage is achieved by fabricating these materials into crosses of two or more bars and driving DC current pulses along the bars to rotate the AFM order to a fixed angle with respect to the current pulse. Application of current pulses along different bars can switch the AFM order between multiple directions. Standard resistance measurements can detect the orientation of the AFM order as high or low resistance states. The state of the device can be set by the input current pulses, and read-out by the resistance measurement, forming a non-volatile, AFM memory storage bit.

Analytis, James G.↗

DOE OSTI2022

Shape memory polymer foams for endovascular therapies

A system for occluding a physical anomaly. One embodiment comprises a shape memory material body wherein the shape memory material body fits within the physical anomaly occluding the physical anomaly. The shape memory material body has a primary shape for occluding the physical anomaly and a secondary shape for being positioned in the physical anomaly.

59 BASIC BIOLOGICAL SCIENCES↗

DOE OSTI2023

Flexible optimized data handling in systems with multiple memories

Chen, Tong↗

DOE OSTI2021

High-Speed Ionic Synaptic Memory Based on 2D Titanium Carbide MXene

Synaptic devices with linear high-speed switching can accelerate learning in artificial neural networks (ANNs) embodied in hardware. Conventional resistive memories however suffer from high write noise and asymmetric conductance tuning, preventing parallel programming of ANN arrays. Electrochemical random-access memories (ECRAMs), where resistive switching occurs by ion insertion into a redox-active channel, aim to address these challenges due to their linear switching and low noise. ECRAMs using 2D materials and metal oxides however suffer from slow ion kinetics, whereas organic ECRAMs enable high-speed operation but face challenges toward on-chip integration due to poor temperature stability of polymers. Here, ECRAMs using 2D titanium carbide (Ti 3 C 2 T x ) MXene that combine the high speed of organics and the integration compatibility of inorganic materials in a single high-performance device are demonstrated. These ECRAMs combine the speed, linearity, write noise, switching energy, and endurance metrics essential for parallel acceleration of ANNs, and importantly, they are stable after heat treatment needed for back-end-of-line integration with Si electronics. The high speed and performance of these ECRAMs introduces MXenes, a large family of 2D carbides and nitrides with more than 30 stoichiometric compositions synthesized to date, as promising candidates for devices operating at the nexus of electrochemistry and electronics.

2D materials↗

DOE OSTI2023

Distributed Quantum Computing with Photons and Atomic Memories

The promise of universal quantum computing requires scalable single- and inter-qubit control interactions. Currently, three of the leading candidate platforms for quantum computing are based on superconducting circuits, trapped ions, and neutral atom arrays. However, these systems have strong interaction with environmental and control noises that introduce decoherence of qubit states and gate operations. Alternatively, photons are well decoupled from the environment and have advantages of speed and timing for quantum computing. Photonic systems have already demonstrated capability for solving specific intractable problems like Boson sampling, but face challenges for practically scalable universal quantum computing solutions because it is extremely difficult for a single photon to “talk” to another deterministically. Here, a universal distributed quantum computing scheme based on photons and atomic-ensemble-based quantum memories is proposed. Taking the established photonic advantages, two-qubit nonlinear interaction is mediated by converting photonic qubits into quantum memory states and employing Rydberg blockade for the controlled gate operation. Spatial and temporal scalability of this scheme is demonstrated further. Furthermore, these results show photon-atom network hybrid approach can be a potential solution to universal distributed quantum computing.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

DOE OSTI2015

Thermomechanical behavior and microstructural evolution of a Ni(Pd)-rich Ni 24.3 Ti 49.7 Pd 26 high temperature shape memory alloy

We investigated the effect of thermomechanical cycling on a slightly Ni(Pd)-rich Ni 24.3 Ti 49.7 Pd 26 (near stochiometric Ni–Ti basis with Pd replacing Ni) high temperature shape memory alloy. Furthermore, aged tensile specimens (400 °C/24 h/furnace cooled) were subjected to constant-stress thermal cycling in conjunction with microstructural assessment via in situ neutron diffraction and transmission electron microscopy (TEM), before and after testing. It was shown that in spite of the slightly Ni(Pd)-rich composition and heat treatment used to precipitation harden the alloy, the material exhibited dimensional instabilities with residual strain accumulation reaching 1.5% over 10 thermomechanical cycles. This was attributed to insufficient strengthening of the material (insufficient volume fraction of precipitate phase) to prevent plasticity from occurring concomitant with the martensitic transformation. In situ neutron diffraction revealed the presence of retained martensite while cycling under 300 MPa stress, which was also confirmed by transmission electron microscopy of post-cycled samples. Neutron diffraction analysis of the post-thermally-cycled samples under no-load revealed residual lattice strains in the martensite and austenite phases, remnant texture in the martensite phase, and peak broadening of the austenite phase. The texture we developed in the martensite phase was composed mainly of those martensitic tensile variants observed during thermomechanical cycling. Presence of a high density of dislocations, deformation twins, and retained martensite was revealed in the austenite state via in-situ TEM in the post-cycled material, providing an explanation for the observed peak broadening in the neutron diffraction spectra. Despite the dimensional instabilities, this alloy exhibited a biased transformation strain on the order of 3% and a two-way shape memory effect (TWSME) strain of ~2%, at relatively high actuation temperatures.

36 MATERIALS SCIENCE↗

DOE OSTI2022

Progress toward picosecond on-chip magnetic memory

Here, we offer a perspective on the prospects of ultrafast spintronics and opto-magnetism as a pathway to high-performance, energy-efficient, and non-volatile embedded memory in digital integrated circuit applications. Conventional spintronic devices, such as spin-transfer-torque magnetic-resistive random-access memory (STT-MRAM) and spin–orbit torque MRAM, are promising due to their non-volatility, energy-efficiency, and high endurance. STT-MRAMs are now entering into the commercial market; however, they are limited in write speed to the nanosecond timescale. Improvement in the write speed of spintronic devices can significantly increase their usefulness as viable alternatives to the existing CMOS-based devices. In this article, we discuss recent studies that advance the field of ultrafast spintronics and opto-magnetism. An optimized ferromagnet–ferrimagnet exchange-coupled magnetic stack, which can serve as the free layer of a magnetic tunnel junction (MTJ), can be optically switched in as fast as ~3 ps. Integration of ultrafast magnetic switching of a similar stack into an MTJ device has enabled electrical readout of the switched state using a relatively larger tunneling magnetoresistance ratio. Purely electronic ultrafast spin–orbit torque induced switching of a ferromagnet has been demonstrated using ~6 ps long charge current pulses. We conclude our Perspective by discussing some of the challenges that remain to be addressed to accelerate ultrafast spintronics technologies toward practical implementation in high-performance digital information processing systems.

42 ENGINEERING↗

DOE OSTI2015

In-Memory Data Rearrangement for Irregular, Data-Intensive Computing

The data rearrangement engine (DRE) performs in-memory data restructuring to accelerate irregular, data-intensive applications. An emulation on a field-programmable gate array demonstrates how the DRE could improve speedup, memory bandwidth, and energy consumption on three representative benchmarks.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2022

An Accurate, Error-Tolerant, and Energy-Efficient Neural Network Inference Engine Based on SONOS Analog Memory

In this work, we demonstrate SONOS (silicon-oxide-nitrideoxide- silicon) analog memory arrays that are optimized for neural network inference. The devices are fabricated in a 40nm process and operated in the subthreshold regime for in-memory matrix multiplication. Subthreshold operation enables low conductances to be implemented with low error, which matches the typical weight distribution of neural networks, which is heavily skewed toward near-zero values. This leads to high accuracy in the presence of programming errors and process variations. We simulate the end-to-end neural network inference accuracy, accounting for the measured programming error, read noise, and retention loss in a fabricated SONOS array. Evaluated on the ImageNet dataset using ResNet50, the accuracy using a SONOS system is within 2.16% of floating-point accuracy without any retraining. The unique error properties and high On/Off ratio of the SONOS device allow scaling to large arrays without bit slicing, and enable an inference architecture that achieves 20 TOPS/W on ResNet50, a >10× gain in energy efficiency over state-of-the-art digital and analog inference accelerators.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2019

A Themodynamically Consistent Fractional Visco-Elasto-Plastic Model with Memory-Dependent Damage for Anomalous Materials

We develop a thermodynamically consistent, fractional visco-elastoplastic model coupled with damage for anomalous materials. The model utilizes Scott-Blair rheological elements for both visco- elastic/plastic parts. The constitutive equations are obtained through Helmholtz free-energy potentials for Scott-Blair elements, together with a memory-dependent fractional yield function and dissipation inequalities. A memory-dependent Lemaitre-type damage is introduced through fractional damage energy release rates. For time-fractional integration of the resulting nonlinear system of equations, we develop a first-order semi-implicit fractional return-mapping algorithm. We also develop a finite-difference discretization for the fractional damage energy release rate, which results into Hankel-type matrix-vector operations for each time-step, allowing us to reduce the computational complexity from O(N 3 ) to O(N 2 ) through the use of Fast Fourier Transforms. Our numerical results demonstrate that the fractional orders for visco-elasto-plasticity play a crucial role in damage evolution, due to the competition between the anomalous plastic slip and bulk damage energy release rates.

36 MATERIALS SCIENCE↗

NASA NTRS2018

One Time Programmable Antifuse Memory Based on Bulk Junctionless Transistor

One time programmable (OTP) antifuse base memory is demonstrated based on a bulk junctionless gate-all-around (GAA) nanowire transistor technology. The presented memory consists of a single transistor (1T) footprint without any process modification. The source/drain (S/D) and gate respectively become bit line and word line where the antifuse is formed by oxide breakdown across the gate and the channel. The channel is connected directly to the bit line due to junctionless S/D and inherently isolated from the neighboring cell by the GAA channel. Therefore, an array of 1T antifuse OTP can be a candidate for the sub-5-nanometer technology node.

Antifuse↗

DOE OSTI2023

Suppressing Structural Relaxation in Nanoscale Antimony to Enable Ultralow‐Drift Phase‐Change Memory Applications

Abstract Phase‐change random‐access memory (PCRAM) devices suffer from pronounced resistance drift originating from considerable structural relaxation of phase‐change materials (PCMs), which hinders current developments of high‐capacity memory and high‐parallelism computing that both need reliable multibit programming. This work realizes that compositional simplification and geometrical miniaturization of traditional GeSbTe‐like PCMs are feasible routes to suppress relaxation. While to date, the aging mechanisms of the simplest PCM, Sb, at nanoscale, have not yet been unveiled. Here, this work demonstrates that in an optimal thickness of only 4 nm, the thin Sb film can enable a precise multilevel programming with ultralow resistance drift coefficients, in a regime of ≈10 −4 –10 −3 . This advancement is mainly owed to the slightly changed Peierls distortion in Sb and the less‐distorted octahedral‐like atomic configurations across the Sb/SiO 2 interfaces. This work highlights a new indispensable approach, interfacial regulation of nanoscale PCMs, for pursuing ultimately reliable resistance control in aggressively‐miniaturized PCRAM devices, to boost the storage and computing efficiencies substantially.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

DOE OSTI2017

Multiferroic and Related Hysteretic Behavior in Ferromagnetic Shape Memory Alloys

In this work, we combine a Ginzburg–Landau model for a ferroelastic transition with the theory of micromagnetism to study the magnetostructural behavior leading to multicaloric effects in ferromagnetic shape memory alloys. We analyze the ferroelastic transition under different conditions of temperature, stress and magnetic field and establish the corresponding phase diagram. On the one hand, our results show that the proper combination of both fields may be used to reduce the transition hysteresis and thus improve the reversibility of the related elastocaloric effects, superelasticity and stress-mediated magnetocaloric effects. On the other hand, the stress-free magnetic field-driven and thermally driven magnetostructural evolution provides physical insight into the low-temperature field-induced domain reorientation, from which we derive strategies to modify the operational temperature ranges and thus the corresponding (magnetic) shape-memory effect.

36 MATERIALS SCIENCE↗