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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 955 records · Page 53
All sourcesNASA NTRSDOE OSTI
NASA NTRS2019

ISSI IS46DR16640B-25DBA25 DDR2 SDRAM Total Ionizing Dose Characterization Test Report

The purpose of this testing is to characterize the ISSI IS46DR16640B-25DBA25 parameter degradation for total dose response. This test’s purpose is to evaluate and compare lot date codes for sensitivity. In the test, the device is exposed to both low dose and high dose rate (HDR) irradiations using gamma radiation. Device parameters such as leakage currents, quantity of upset bits or addresses, and overall chip and die health are investigated to determine which lot is more robust. These parameters directly affect the functionality of the memory within a system and may determine thresholds necessary to mitigate failure.

Total Ionizing Dose (TID)↗
DOE OSTI2020

Continuous Test and Transition Infrastructure for Quantum Networking for Science Complex

We propose a network architecture with a separate quantum dataplane and a conventional control plane: (a) Quantum Data Plane: The Quantum Data plane consists of links of dark fibers connecting quantum switches and repeaters, which in turn, connect to quantum computers, memory and sensors. Since the current reach is limited to local areas, it will begin as a collection of site networks at laboratories, (b) Conventional Control Plane: The Control plane provides management access to quantum devices for configuration and provisioning via control nodes with firewall and encryption capabilities. Continuous Test and Transition Infrastructure: We propose an infrastructure with a control plane connecting multiple sites via encrypted tunnels over conventional networks consisting of the following: (a) Site Quantum Networks: Individual site networks supported by their fiber plants connect laboratories that house and connect to their quantum devices for testing and interoperability.(b) Site Control Planes: Sites are connected over individual control planes with control hosts with Software Defined Networking capabilities, which can be peered with other networks via ESnet.(c) Progressive Expansion: Initially, sites will develop individual data planes with their specific quantum devices and fiber connections, and mechanisms to interface with conventional networks. They progressively expand and interconnect, under a wide-area ecosystem of peered control planes for device testing, interoperability development and roll off into production environments.

Rao, Nageswara S.↗
NASA NTRS2014

SpaceCube v2.0 Space Flight Hybrid Reconfigurable Data Processing System

This paper details the design architecture, design methodology, and the advantages of the SpaceCube v2.0 high performance data processing system for space applications. The purpose in building the SpaceCube v2.0 system is to create a superior high performance, reconfigurable, hybrid data processing system that can be used in a multitude of applications including those that require a radiation hardened and reliable solution. The SpaceCube v2.0 system leverages seven years of board design, avionics systems design, and space flight application experiences. This paper shows how SpaceCube v2.0 solves the increasing computing demands of space data processing applications that cannot be attained with a standalone processor approach.The main objective during the design stage is to find a good system balance between power, size, reliability, cost, and data processing capability. These design variables directly impact each other, and it is important to understand how to achieve a suitable balance. This paper will detail how these critical design factors were managed including the construction of an Engineering Model for an experiment on the International Space Station to test out design concepts. We will describe the designs for the processor card, power card, backplane, and a mission unique interface card. The mechanical design for the box will also be detailed since it is critical in meeting the stringent thermal and structural requirements imposed by the processing system. In addition, the mechanical design uses advanced thermal conduction techniques to solve the internal thermal challenges.The SpaceCube v2.0 processing system is based on an extended version of the 3U cPCI standard form factor where each card is 190mm x 100mm in size The typical power draw of the processor card is 8 to 10W and scales with application complexity. The SpaceCube v2.0 data processing card features two Xilinx Virtex-5 QV Field Programmable Gate Arrays (FPGA), eight memory modules, a monitor FPGA with analog monitoring, Ethernet, configurable interconnect to the Xilinx FPGAs including gigabit transceivers, and the necessary voltage regulation. The processor board uses a back-to-back design methodology for common parts that maximizes the board real estate available. This paper will show how to meet the IPC 6012B Class 3A standard with a 22-layer board that has two column grid array devices with 1.0mm pitch. All layout trades such as stack-up options, via selection, and FPGA signal breakout will be discussed with feature size results. The overall board design process will be discussed including parts selection, circuit design, proper signal termination, layout placement and route planning, signal integrity design and verification, and power integrity results. The radiation mitigation techniques will also be detailed including configuration scrubbing options, Xilinx circuit mitigation and FPGA functional monitoring, and memory protection.Finally, this paper will describe how this system is being used to solve the extreme challenges of a robotic satellite servicing mission where typical space-rated processors are not sufficient enough to meet the intensive data processing requirements. The SpaceCube v2.0 is the main payload control computer and is required to control critical subsystems such as autonomous rendezvous and docking using a suite of vision sensors and object avoidance when controlling two robotic arms.

Xilinx FPGA↗
NASA NTRS1999

Adaptive Mesh Refinement for Microelectronic Device Design

Finite element and finite volume methods are used in a variety of design simulations when it is necessary to compute fields throughout regions that contain varying materials or geometry. Convergence of the simulation can be assessed by uniformly increasing the mesh density until an observable quantity stabilizes. Depending on the electrical size of the problem, uniform refinement of the mesh may be computationally infeasible due to memory limitations. Similarly, depending on the geometric complexity of the object being modeled, uniform refinement can be inefficient since regions that do not need refinement add to the computational expense. In either case, convergence to the correct (measured) solution is not guaranteed. Adaptive mesh refinement methods attempt to selectively refine the region of the mesh that is estimated to contain proportionally higher solution errors. The refinement may be obtained by decreasing the element size (h-refinement), by increasing the order of the element (p-refinement) or by a combination of the two (h-p refinement). A successful adaptive strategy refines the mesh to produce an accurate solution measured against the correct fields without undue computational expense. This is accomplished by the use of a) reliable a posteriori error estimates, b) hierarchal elements, and c) automatic adaptive mesh generation. Adaptive methods are also useful when problems with multi-scale field variations are encountered. These occur in active electronic devices that have thin doped layers and also when mixed physics is used in the calculation. The mesh needs to be fine at and near the thin layer to capture rapid field or charge variations, but can coarsen away from these layers where field variations smoothen and charge densities are uniform. This poster will present an adaptive mesh refinement package that runs on parallel computers and is applied to specific microelectronic device simulations. Passive sensors that operate in the infrared portion of the spectrum as well as active device simulations that model charge transport and Maxwell's equations will be presented.

Cwik, Tom↗
DOE OSTI2025

Manipulating Ferroelectric Topological Polar Structures with Twisted Light

Abstract The dynamic control of non‐equilibrium states represents a central challenge in condensed matter physics. While intense terahertz fields drive metal‐insulator transitions and ferroelectricity via soft phonon modes, recent theory suggests that twisted light with orbital angular momentum (OAM) offers a distinct route to manipulate ferroelectric order and stabilize topological excitations including skyrmions, vortices, and Hopfions. Control of ferroelectric polarization in quasi‐2D CsBiNb 2 O 7 (CBNO) is demonstrated using non‐resonant twisted ultra‐violet (UV) light (375 nm, 800 THz). Combining in situ X‐ray Bragg coherent diffractive imaging (BCDI), twisted optical Raman spectroscopy, and density functional theory (DFT), three‐dimensional (3D) ionic displacements, strain fields, and polarization changes are resolved in single crystals. Operando measurements reveal light‐induced strain hysteresis under twisted light–a hallmark of nonlinear, history‐dependent ferroelastic switching driven by OAM. Discrete, irreversible domain transitions emerge as the topological charge ℓ is cycled, stabilizing non‐trivial domain textures including vortex‐antivortex pairs, Bloch/anti‐Bloch points, and merons. These persist after OAM removal, indicating a memory effect. Competing mechanisms are discussed, including multiphoton absorption, strain‐mediated polarization switching, and defect‐wall interactions. The findings establish structured light as a tool for deterministic, reversible control of ferroic states, enabling optically reconfigurable non‐volatile devices.

Chemistry↗
DOE OSTI2023

Multi-Source Data Aggregation and Real-Time Anomaly Classification and Localization in Power Distribution Systems

This paper proposes a real-time anomaly location and classification framework for power distribution systems to simultaneously determine the type of anomaly (i.e., short-circuit fault, cyber attack, DER switching) and its location. The proposed framework employs the data aggregation module to collect the measurement data from multiple field devices operating at different sampling rates, such as protection relays and D-PMUs. The output of the data aggregation is then fed into a multi-task learning-based long-based short-term memory (MTL-LSTM) to classify the type of anomaly and the location in two separate tasks. The proposed MTL-LSTM approach can be utilized in real-time operation in order to distinguish between normal and several anomalous operations and locate the anomaly. The proposed framework is tested on a modified IEEE 33-bus test feeder benchmark that integrates solar generation and energy storage. Furthermore, the results show that the proposed framework can locate and classify anomalies for several operation conditions with more than 96% accuracy. Further experiments highlight the impact of aggregating multiple sources of data on the performance of the proposed model.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2025

A Study on the Impact of Temperature-Dependent Ferroelectric Switching Behavior in 3D Memory Architecture

The flourishing development of neural networks that require exponentially growing amounts of data has presented an elevated demand for memory footprint. To address this, researchers have been exploring hardware accelerators with innovative memory architectures like 3D memory. These 3D memory architectures offer enhanced storage capacity and processing capabilities, at a cost of rising on-chip temperature during operation. Hafnium Zirconium Oxide (HZO) based Ferroelectric Random Access Memory (FeRAM) is a promising nonvolatile memory candidate in neural network hardware accelerators for its outstanding write performance and reliability. However, its implementation in the architecture regarding the temperature-dependent ferroelectric switching behavior has not been well studied. In this work, we study the thermal impacts on polarization switching through experimental devices and simulation results. We conduct the circuit and architecture-level simulations to showcase that one can exploit this temperature rise to reduce FeRAM's write voltage and write energy due to its unique temperature-activated polarization switching mechanisms. As the on-chip temperature increases to 351K (ambient temperature at 300K) due to neural network workloads, the access energy per bit can be reduced by 27.6% when a dynamic write voltage is applied.

36 MATERIALS SCIENCE↗
DOE OSTI2021

Operando characterization of conductive filaments during resistive switching in Mott VO 2

Significance To perform hardware-based neuromorphic computing, novel materials exhibiting a wide variety of electronic properties are currently being explored. VO 2 is well known to exhibit an insulator-to-metal transition as well as volatile resistive switching. Many questions regarding the basic mechanism of the nonvolatile switching in this material are unanswered. In this work, the formation and relaxation of conductive filaments through nonvolatile resistive switching in VO 2 devices have been realized. The V 5 O 9 Magnéli phase conductive filament has been identified. Our results demonstrate that both resistive switching behaviors can be achieved in a single material, crucial for future technology like resistive switching memories or neuromorphic logic.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2023

Polarity effects on wake–up behavior of Al 0.94 B 0.06 N ferroelectrics

Wurtzite ferroelectric materials are promising candidates for energy-efficient memory technologies, particularly for applications requiring high operating temperatures. Asymmetric wake-up behaviors, in which the polarization reversal depends both on polarity and cycle number for the first few dozen cycles, must be better understood for reliable device operation. Here, the detailed analysis of the asymmetric wake-up behavior of thin film Al 0.94 B 0.06 N was performed combining time-resolved switching measurements with Rayleigh analysis, piezoelectric measurements, and etching experiments of progressively switched samples. Furthermore, the analysis shows that the gradual opening of the polarization hysteresis loops associated with wake-up is driven by a gradual increase in the domain-wall density and/or domain-wall mobility with electric field cycle to the polarity opposite to the growth polarity. The insights of this discovery will help to guide interface and polarity design in the eventual deployment of reliable devices based on these materials.

36 MATERIALS SCIENCE↗
NASA NTRS1987

The utilization of parallel processing in solving the inviscid form of the average-passage equation system for multistage turbomachinery

A procedure is outlined which utilizes parallel processing to solve the inviscid form of the average-passage equation system for multistage turbomachinery along with a description of its implementation in a FORTRAN computer code, MSTAGE. A scheme to reduce the central memory requirements of the program is also detailed. Both the multitasking and I/O routines referred to in this paper are specific to the Cray X-MP line of computers and its associated SSD (Solid-state Storage Device). Results are presented for a simulation of a two-stage rocket engine fuel pump turbine.

Mulac, Richard A.↗
NASA NTRS1986

Patient ECG recording control for an automatic implantable defibrillator

An implantable automatic defibrillator includes sensors which are placed on or near the patient's heart to detect electrical signals indicative of the physiology of the heart. The signals are digitally converted and stored into a FIFO region of a RAM by operation of a direct memory access (DMA) controller. The DMA controller operates transparently with respect to the microprocessor which is part of the defibrillator. The implantable defibrillator includes a telemetry communications circuit for sending data outbound from the defibrillator to an external device (either a patient controller or a physician's console or other) and a receiver for sensing at least an externally generated patient ECG recording command signal. The patient recording command signal is generated by the hand held patient controller. Upon detection of the patient ECG recording command, DMA copies the contents of the FIFO into a specific region of the RAM.

Fountain, Glen H.↗
NASA NTRS2018

SpaceWire as a Cube-Sat Instrument Interface

SpaceWire is used in the control and data interface for an instrument on a pair of small satellites, one of which was launched in summer 2017. The instrument SpaceWire interface is implemented in a Field Programmable Gate Array as an instantiated core controlled by a LEON3FT CPU, which is also implemented as an instantiated core. The UT699 processor in the flight computer provides the spacecraft side’s SpaceWire interface. A simple message based protocol consisting of four message types was defined, based on existing SpaceWire standards. One was for passing commands to and responses from the instrument in the form of text strings similar to those from a system console where each line of text is passed in a SpaceWire message. Another was for passing spacecraft time to the instrument. The third was for transferring files using a subset of the Remote Memory Access Protocol (RMAP). The fourth was for retrieving science data from the instrument. A set of user application programming interface (API) routines provided an abstracted interface to both the serial console (used during debug) and the SpaceWire device interface. Early instrument development and testing was done with a set of utilities that controlled a Star-Dundee USB-SpaceWire brick providing a user interface similar to a serial console terminal emulator with the addition of file and data transfers. Later in the integration and test process, these utilities were integrated with the COSMOS ground systems software used for spacecraft control, providing a seamless transition from standalone instrument tests to benchtop flat-sat test and full spacecraft level tests.

Lux, James P.↗
NASA NTRSDate not supplied

Overview of Aeroacoustic Testing of the High-Lift Common Research Model

This paper presents an overview of the experimental data obtained in a 2020/2021 aeroacoustic test of the high-lift variant of the common research model. The breadth of the aerodynamic and acoustic measurements is highlighted along with some key results. Aerodynamic data were observed to be consistent with previous observations, and the acoustic measurements were repeatable once some background noise and shear layer issues were resolved. The primary purpose of the test was to evaluate the noise reduction potential of slat noise reduction devices, and a slat-gap filler was found to produce substantial noise reduction over a broad frequency range. The gap filler was designed to meet practical implementation considerations at full scale and constructed out of shape-memory alloys that would allow the slat to be articulated. However, additional structural testing will be required to demonstrate the performance of the gap filler during slat deployment and retraction. Over 3,500 test points were collected during the test, and only a small fraction of the experimental data has been processed in a preliminary manner. Nonetheless, the results presented demonstrate the quality of the dataset and reveal some insights about slat noise.

Aeroacoustics↗
DOE OSTI2020

On the elastocaloric effect in CuAlBe shape memory alloys: A quantitative phase-field modeling approach

We report the reversible stress-induced phase transformation in shape memory alloys (SMAs) is a dissipative process during which heat is absorbed or released. The inherent temperature variations inside the material has an elastocaloric effect (eCE) with appealing applications in solid-state cooling technology such as compact and efficient on-board refrigeration system for eletronic devices. In this manuscript, we conduct the first study of eCE of CuAlBe SMAs utilizing phase-field modeling. For an applied stress of 500 MPa, the results for polycrystalline Cu-Al11-2Be (at. %) show a minimum adiabatic unloading temperature change of -10 K over a pseudoelastic window of 40 K. In the absence of plastic deformation, the material demonstrates good reproducibility of the eCE over a few loading–unloading cycles. The presence of plastic deformation is found to cause functional fatigue that deteriorates the cooling capacity; however, the coefficient of performance only decreases from 9.04 to 8.03, which is still a very good value. These results place CuAlBe as a frontrunner SMA for solid-state cooling compared to the expensive NiTi.

36 MATERIALS SCIENCE↗
NASA NTRS2004

Gesture-controlled interfaces for self-service machines and other applications

A gesture recognition interface for use in controlling self-service machines and other devices is disclosed. A gesture is defined as motions and kinematic poses generated by humans, animals, or machines. Specific body features are tracked, and static and motion gestures are interpreted. Motion gestures are defined as a family of parametrically delimited oscillatory motions, modeled as a linear-in-parameters dynamic system with added geometric constraints to allow for real-time recognition using a small amount of memory and processing time. A linear least squares method is preferably used to determine the parameters which represent each gesture. Feature position measure is used in conjunction with a bank of predictor bins seeded with the gesture parameters, and the system determines which bin best fits the observed motion. Recognizing static pose gestures is preferably performed by localizing the body/object from the rest of the image, describing that object, and identifying that description. The disclosure details methods for gesture recognition, as well as the overall architecture for using gesture recognition to control of devices, including self-service machines.

Cohen, Charles J.↗
DOE OSTI2020

Large-scale integration of artificial atoms in hybrid photonic circuits

A central challenge in developing quantum computers and long-range quantum networks is the distribution of entanglement across many individually controllable qubits. Colour centres in diamond have emerged as leading solid-state ‘artificial atom’ qubits because they enable on-demand remote entanglement, coherent control of over ten ancillae qubits with minute-long coherence times and memory-enhanced quantum communication. A critical next step is to integrate large numbers of artificial atoms with photonic architectures to enable large-scale quantum information processing systems. So far, these efforts have been stymied by qubit inhomogeneities, low device yield and complex device requirements. Here we introduce a process for the high-yield heterogeneous integration of ‘quantum microchiplets’—diamond waveguide arrays containing highly coherent colour centres—on a photonic integrated circuit (PIC). We use this process to realize a 128-channel, defect-free array of germanium-vacancy and silicon-vacancy colour centres in an aluminium nitride PIC. Photoluminescence spectroscopy reveals long-term, stable and narrow average optical linewidths of 54 megahertz (146 megahertz) for germanium-vacancy (silicon-vacancy) emitters, close to the lifetime-limited linewidth of 32 megahertz (93 megahertz). We show that inhomogeneities of individual colour centre optical transitions can be compensated in situ by integrated tuning over 50 gigahertz without linewidth degradation. The ability to assemble large numbers of nearly indistinguishable and tunable artificial atoms into phase-stable PICs marks a key step towards multiplexed quantum repeaters and general-purpose quantum processors

36 MATERIALS SCIENCE↗
DOE OSTI2025

SlimIO: Lightweight I/O Path Design for Write Isolation in FDP-backed In-Memory Databases

In-Memory Databases (IMDBs) are widely used with HPC applications to manage transient data, often using snapshot-based persistence for backups. Redis, a representative IMDB, employs both snapshot and Write-Ahead Log (WAL) mechanisms, storing data on persistent devices via the traditional kernel I/O path. This method incurs syscall overhead, I/O contention between processes, and SSD garbage collection (GC) delays. To address these issues, we propose SlimIO, which adopts I/O passthru to minimize syscall overhead and inter-process I/O interference. Additionally, it leverages Flexible Data Placement (FDP) SSDs as backup storage to avoid performance degradation from SSD GC. Experimental results show that SlimIO reduces snapshot time by up to 25%, increases query throughput by up to 30% during non-snapshot periods, and lowers 99.9%-ile latency by up to 50%. Furthermore, it achieves a write amplification factor (WAF) of 1.00, indicating no redundant internal writes, thus extending SSD lifespan.

Lee, Sangyun [Sogang University]↗
DOE OSTI2021

Nanosecond Gated CMOS Camera (NSGCC) ICD (Rev. 2.1)

The Ultra-Fast X-ray Imager (UXI) program is an ongoing effort at Sandia National Laboratories to create high speed, multi-frame, time-gated Read Out Integrated Circuits (ROICs), and a corresponding suite of photodetectors to image a wide variety of High Energy Density (HED) physics experiments on both Sandia’s Z-Machine and LLNL’s National Ignition Facility (NIF). Several cameras have been designed over the length of the program; one of the most recent is the Icarus, which is an improvement on past imagers (Furi and Hippogriff). A second sensor that can be connected is the Daedalus sensor. The Icarus is a 1024 × 512-pixel array with either 25 μm or 8 µm spatial resolution containing four frames of storage per pixel and has improved timing generation and distribution components while achieved 2 ns time gating. The Daedalus sensor is also a 1024 x 512-pixel array with 25 µm special resolution containing three frames of storage per pixel and has an increased set of features for a wider variety of applications from interlacing of rows in each frame to configurability of all shutters. See Section 14 for details regarding the Icarus implementation of the firmware and Section 15 for details regarding the Daedalus implementation. Due to the unique test environments UXI sensors are targeted for, full custom hardware was required to physically mount an Icarus or Daedalus sensor, manage its various functions, and read out pixel data for transfer to a host computer. Beyond experimental functionality, the hardware also needed to accommodate sensor characterization requirements. Lawrence Livermore National Laboratory’s ‘Version 4.0 Board’ was the result of these efforts. It mounts all the components required to fully utilize the Icarus and Daedalus sensors including analog to digital converters to convert pixel data and various system voltages to digital form for readout and analysis, DAC channels for remote configuration of critical bias voltages, static random-access memories to buffer pixel data, RS422 and Gigabit Ethernet communications for remote access, and an FPGA to tie these components together. This document describes the FPGA electrical interfaces in detail to allow the reader a greater understanding of the device, and to facilitate implementation of custom software to control and manage it. The Version 4.0 Board is a continuation of the Nano-second Gated CMOS hardware design that retains much of the functionality of the Version 1.0 Board while adding features including a DAC instead of digital potentiometers, as well as sensors for pressure and radiation. The Version 4.0 board is intended for applications requiring tight form-factor enclosures. It is composed of two stacking boards; one holds the FPGA and regulators to power the various components of the board while the other contains the mating connector to the sensor, image-readoff ADCs, the DAC, and other components.

42 ENGINEERING↗