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At least 955 records · Page 53

Modeling and Validation of Offset Cancellation for Hybrid Photonic-Electronic Transimpedance Amplifier Using All-Electronic Circuits

Hybrid photonic-electronic circuits involving crossdomain feedback signals are difficult to validate and troubleshoot. This paper describes an approach to model and validate an offset-cancellation loop for a hybrid transimpedance amplifier (TIA) using all-electronic circuits. An equivalent electrical model is developed for the tunable interferometer attenuators used for offset trimming, and it includes test features to extract the system performance. The stability analysis of the system shows 75 ◦ of phase margin and 102 dB of gain margin. Measurement results demonstrate good agreement with analysis and successful TIA offset cancellation.

Marchant, Jared↗

Visual Analytics of Performance of Quantum Computing Systems and Circuit Optimization

Driven by potential exponential speedups in business, security, and scientific scenarios, interest in quantum computing is surging. This interest feeds the development of quantum computing hardware, but several challenges arise in optimizing application performance for hardware metrics (e.g., qubit coherence and gate fidelity). In this work, we describe a visual analytics approach for analyzing the performance properties of quantum devices and quantum circuit optimization. Our approach allows users to explore spatial and temporal patterns in quantum device performance data and it computes similarities and variances in key performance metrics. Detailed analysis of the error properties characterizing individual qubits is also supported. We also describe a method for visualizing the optimization of quantum circuits. The resulting visualization tool allows researchers to design more efficient quantum algorithms and applications by increasing the interpretability of quantum computations.

Chae, Junghoon↗

A Novel Model of Thyristor in Reverse Recovery Process for Current Interruption Test of HVDC Circuit Breakers

The high voltage thyristor is widely used in high voltage DC (HVDC) grids due to its large current capability. Recently, the high voltage thyristor is implemented to produce a high current in the HVDC circuit breaker (CB) testing process. Unfortunately, the reverse recovery process (RRP) of a thyristor could induce significant turn-off overvoltage and power losses, jeopardizing the safety of the devices. The existing models of a thyristor cannot describe such hard-switching transient accurately. Therefore, this paper divides this process into four stages based on the physical mechanism and proposes a novel cosine exponential (CE), simulating the voltage and current of the thyristor with analytical equations, which are derived from the equivalent circuit. Moreover, the extraction procedure of the proposed model is illustrated in this paper. Finally, we develop an HVDC CB test platform to validate the proposed model. Experimental results show that the proposed CE model can accurately predict the overvoltage with a relative error of less than 8% at various current varying rates.

Dongye, Zhonghao↗

Precursor Reaction Method With High Ga Cu(In,Ga)(S,Se)$_{2}$ to Achieve Increased Open-Circuit Voltage

The precursor reaction process for the fabrication of Cu(In,Ga)Se 2 solar cells potentially allows for low-cost fabrication and scalable processing for manufacturing. Additionally, this process has yielded record efficiencies in lab-scale experiments. Thus far, research on the precursor reaction method has been restricted to relatively low Ga compositions with Ga/(In+Ga) ≈ 25%. By increasing the ratio of Ga, it is possible to increase the bandgap, and thus, increase the open-circuit voltage. This work develops and characterizes the precursor reaction process for use with Ga/(In+Ga) ≈ 50%, with the goal of improving the open-circuit voltage and efficiency. It is shown that with an increased Ga ratio, increased V ∞ is achieved, but the rate of conversion from the precursor to absorber phases is decreased. Additionally, increased Ga improves the film adhesion at increased selenization temperatures as well as improving the film morphology.

14 SOLAR ENERGY↗

A Twin Circuit Theory-Based Framework for Oscillation Event Analysis in Inverter-Dominated Power Systems With Case Study for Kaua‘i System

Here, this paper proposes a real-world oscillation event analysis framework for power systems that include inverter-based resources together with synchronous generators. Specifically, the proposed framework combines both measurement-and model-based techniques to readily identify potential oscillation sources, replay the oscillation event with numerical simulation, unveil the underlying oscillation mechanism, and suggest mitigation methods for a wide range of oscillation events. To strengthen the theoretical foundation of our analysis framework, this paper proposes a twin circuit theory that provides theoretical support for one key utilized but not well-proven measurement-based oscillation source identification method-Dissipating Energy Flow. Our twin circuit theory also shows that adopting well-tuned grid-forming inverters can be a potential mitigation method for oscillation events. Finally, the effectiveness of our proposed oscillation event analysis framework is demonstrated by addressing a real-world 18-20 Hz oscillation event in Kaua‘i's power system on November 21, 2021.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Reduced-Order Parameterized Short-Circuit Current Model of Inverter-Interfaced Distributed Generators

The short-circuit response of inverter-interfaced distributed generators (IIDGs) is not adequately represented in many conventional protection studies. This paper presents an in-depth analysis of IIDG behavior during grid faults and proposes a more accurate reduced-order parameterized short-circuit current (RPSC) model of inverters. Typical inverter components are thoroughly investigated to identify those that play dominant roles during faults. The paper shows that the current limiter is the dominant factor for the steady-state fault-current of inverter; while the inverter filter along with the severity of the voltage disturbance largely determine the initial transient spike of inverter fault current. The proposed model is low-order and can be used in large scale simulations. The parameters of the proposed RPSC model can be extracted from laboratory experiments without requiring proprietary manufacturer information. The proposed fault-current model is analogous to the well-known synchronous machine model that segregates the inverter fault current into subtransient, transient, and steady-state fault currents. Finally, experimental and simulation tests are presented to validate the model.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Simultaneous Implementation of NiSWAP and NSWAP Gates Using N + 1 Qubits in a Cavity or Coupled to a Circuit

We propose an effective method to realize NiSWAP and NSWAP gates in a cavity or coupled to a circuit driven by a strong microwave field. The scheme is insensitive to the initial state of the resonator mode, and the operation time is independent of the number of qubits involved in the gates operations. These logic gates can be realized in a time much shorter than the radiative time and the lifetime of the cavity photon, and can be realized in a time (nanosecond-scale) much smaller than the decoherence time and the dephasing time (microsecond-scale) in circuit QED. Numerical simulation under the influence of the gates operations shows that the scheme can be implemented with high fidelity. We also propose a detailed procedure and experimentally analyze its feasibility. Moreover, the scheme might be experimentally achieved efficiently within current state-of-the-art technology.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Study of the interrelation between the electrotechnical parameters of the plasma focus discharge circuit and the plasma compression dynamics on the PF-3 and PF-1000 facilities

The main stages of the plasma current sheath (PCS) dynamics on two plasma focus (PF) facilities with different geometries of the electrode system, PF-3 (Filippov type) and PF-1000 (Mather type), were studied by analyzing the results of the current and voltage measurements. Some dynamic characteristics, such as the PCS velocity in the acceleration phase in the Mather-type facility (PF-1000), the moment at which the PCS reaches the anode end, and the plasma velocity in the radial stage of plasma compression in the PF-3 Filippov-type facility, were determined from the time dependence of the inductance of the discharge circuit with a dynamic plasma load. The energy characteristics of the discharge circuit of the compressing PCS were studied for different working gases (deuterium, argon, and neon) at initial pressures of 1.5–3 Torr in discharges with energies of 0.3–0.6 MJ. In experiments with deuterium, correlation between the neutron yield and the electromagnetic energy deposited directly in the compressed PCS was investigated.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY↗

Correlation of the neutron yield from the plasma focus upon variations in the magnetic field energy of the discharge circuit

The relation between neutron yield Y and magnetic field energy variations ΔW in the discharge circuit has been studied for a Mather-type plasma-focus camera. The activation technique (activation of silver isotopes) has been used to measure the integral yield of DD neutrons from the source. The time dependence of the neutron yield has been recorded by scintillation detectors. For the device used in the investigations, the neutron yield exhibits a linear dependence on variations in the magnetic field energy ΔW in the discharge circuit at the instant of neutron generation. It is also found that this dependence is related to the initial deuteron pressure in the discharge chamber.

73 NUCLEAR PHYSICS AND RADIATION PHYSICS↗

Evaluating online-learning in memristive neuromorphic circuits

In this work we present an implementation of spike-timing-dependent plasticity (STDP) in both a high level simulation and at a circuit level. It is verified that the high level simulation captures the behavior of the circuit implementation. We use the simulation to assess the effectiveness of STDP for online-learning, and find that STDP enables networks to improve performance online after training.

Wyer, Austin↗

Automating NISQ Application Design with Meta Quantum Circuits with Constraints (MQCC)

Near-term intermediate scale quantum (NISQ) computers are likely to have very restricted hardware resources, where precisely controllable qubits are expensive, error-prone, and scarce. Programmers of such computers must therefore balance trade-offs among a large number of (potentially heterogeneous) factors specific to the targeted application and quantum hardware. To assist them, we propose Meta Quantum Circuits with Constraints (MQCC), a meta-programming framework for quantum programs. Programmers express their application as a succinct collection of normal quantum circuits stitched together by a set of (manually or automatically) added meta-level choice variables, whose values are constrained according to a programmable set of quantitative optimization criteria. MQCC’s compiler generates the appropriate constraints and solves them via an SMT solver, producing an optimized, runnable program. We showcase a few MQCC’s applications for its generality including an automatic generation of efficient error syndrome extraction schemes for fault-tolerant quantum error correction with heterogeneous qubits and an approach to writing approximate quantum Fourier transformation and quantum phase estimation that smoothly trades off accuracy and resource use. We also illustrate that MQCC can easily encode prior one-off NISQ application designs-–multi-programming (MP), crosstalk mitigation (CM)—as well as a combination of their optimization goals (i.e., a combined MP-CM).

97 MATHEMATICS AND COMPUTING↗

Additive manufacturing of hybrid circuits

There is a rising interest in developing functional electronics using additively manufactured components. Considerations in materials selection and pathways to forming hybrid circuits and devices must demonstrate useful electronic function; must enable integration; and must complement the complex shape, low cost, high volume, and high functionality of structural but generally electronically passive additively manufactured components. This article reviews several emerging technologies being used in industry and research/development to provide integration advantages of fabricating multilayer hybrid circuits or devices. First, we review a maskless, noncontact, direct write (DW) technology that excels in the deposition of metallic colloid inks for electrical interconnects. Second, we review a complementary technology, aerosol deposition (AD), which excels in the deposition of metallic and ceramic powder as consolidated, thick conformal coatings and is additionally patternable through masking. As a result, we show examples of hybrid circuits/devices integrated beyond 2-D planes, using combinations of DW or AD processes and conventional, established processes.

36 MATERIALS SCIENCE↗

PyTorch Circuit-Aware Bit-Cell Modeling

SAND2024-08549O PyTorch Circuit-Aware Bit-Cell Modeling, a Python library, demonstrates circuit-aware training for analog machine learning accelerators. Built upon PyTorch, this software provides hardware-aware versions of common neural network layers to mitigate non-ideal behavior from novel hardware. The software provides accurate forward and backward pass estimates for hardware-mapped neural networks that are implemented in crossbars (arrays) that contain a non-linear transistor selector device. Sandia National Laboratories is a multimission laboratory managed and operated by National Technology & Engineering Solutions of Sandia, LLC, a wholly owned subsidiary of Honeywell International Inc., for the U.S. Department of Energy’s National Nuclear Security Administration under contract DE-NA0003525.

Bennett, Christopher↗

Code Generators for Floating-Point Unit Design in Integrated Circuits (OpenFloat) v1.0

This IP provides a comprehensive set of code generators for various floating-point units (FPUs) essential for integrated circuit design and integration, targeting a broad spectrum of applications, including machine learning and scientific computing. The suite includes FP adders, multipliers, subtractors, dividers, reciprocals, exponentials, square roots, trigonometric functions (sine, cosine, arctangent), and more. It supports customizable hardware design parameters, such as precision (16, 32, 64, and 128 bits) and pipeline depths, offering users enhanced flexibility and productivity. The generated code is in an industry-standard hardware description language, ensuring compatibility with standard design flows, including simulation, verification, synthesis, and implementation on both field-programmable gate arrays (FPGAs) and application-specific integrated circuits (ASICs).

Shalf, JohnM. [Lawrence Berkeley National Laborato↗

Accelerated deep self-supervised ptycho-laminography for three-dimensional nanoscale imaging of integrated circuits

Three-dimensional inspection of nanostructures such as integrated circuits is important for security and reliability assurance. Two scanning operations are required: ptychographic to recover the complex transmissivity of the specimen, and rotation of the specimen to acquire multiple projections covering the 3D spatial frequency domain. Two types of rotational scanning are possible: tomographic and laminographic. For flat, extended samples, for which the full 180° coverage is not possible, the latter is preferable because it provides better coverage of the 3D spatial frequency domain compared to limited-angle tomography. It is also because the amount of attenuation through the sample is approximately the same for all projections. However, both techniques are time consuming because of extensive acquisition and computation time. Here, we demonstrate the acceleration of ptycho-laminographic reconstruction of integrated circuits with 16 times fewer angular samples and 4.67 times faster computation by using a physics-regularized deep self-supervised learning architecture. We check the fidelity of our reconstruction against a densely sampled reconstruction that uses full scanning and no learning. As already reported elsewhere [ Opt. Express 28 , 12872 ( 2020 ) OPEXFF 1094-4087 10.1364/OE.379200 ], we observe improvement of reconstruction quality even over the densely sampled reconstruction, due to the ability of the self-supervised learning kernel to fill the missing cone.

47 OTHER INSTRUMENTATION↗

Learning to Optimize Variational Quantum Circuits to Solve Combinatorial Problems

Quantum computing is a computational paradigm with the potential to outperform classical methods for a variety of problems. Proposed recently, the Quantum Approximate Optimization Algorithm (QAOA) is considered as one of the leading candidates for demonstrating quantum advantage in the near term. QAOA is a variational hybrid quantum-classical algorithm for approximately solving combinatorial optimization problems. The quality of the solution obtained by QAOA for a given problem instance depends on the performance of the classical optimizer used to optimize the variational parameters. In this paper, we formulate the problem of finding optimal QAOA parameters as a learning task in which the knowledge gained from solving training instances can be leveraged to find high-quality solutions for unseen test instances. To this end, we develop two machine-learning-based approaches. Our first approach adopts a reinforcement learning (RL) framework to learn a policy network to optimize QAOA circuits. Our second approach adopts a kernel density estimation (KDE) technique to learn a generative model of optimal QAOA parameters. In both approaches, the training procedure is performed on small-sized problem instances that can be simulated on a classical computer; yet the learned RL policy and the generative model can be used to efficiently solve larger problems. Furthermore, extensive simulations using the IBM Qiskit Aer quantum circuit simulator demonstrate that our proposed RL- and KDE-based approaches reduce the optimality gap by factors up to 30.15 when compared with other commonly used off-the-shelf optimizers.

97 MATHEMATICS AND COMPUTING↗

Theory and Circuit Model for Lossy Coaxial Transmission Line

The theory of signal propagation in lossy coaxial transmission lines is revisited and new approximate analytic formulas for the line impedance and attenuation are derived. The accuracy of these formulas from DC to 100 GHz is demonstrated by comparison to numerical solutions of the exact field equations. Based on this analysis, a new circuit model is described which accurately reproduces the line response over the entire frequency range. Circuit model calculations are in excellent agreement with the numerical and analytic results, and with finite-difference-time-domain simulations which resolve the skindepths of the conducting walls.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Case Study: Laboratory and Field Evaluation of Circuit-Level Electrical Submetering with Wireless Current Transformers

Laboratory and field demonstration of circuit-level electrical submetering technology that utilizes wireless current transformers to monitor circuits within the panel. Report provides a background of the technology and how it works, outlines the testing methodology and presents results on measurement accuracy and ability of the technology to be rapidly integrated into both electrical panels/infrastructure and into an analytics platform. Cost effectiveness results are discussed for the specific field demonstration site.

29 ENERGY PLANNING, POLICY, AND ECONOMY↗