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At least 937 records · Page 52

A four-element end-fire microphone array for acoustic measurements in wind tunnels

A prototype four-element end-fire microphone array was designed and built for evaluation as a directional acoustic receiver for use in large wind tunnels. The microphone signals were digitized, time delayed, summed, and reconverted to analog form in such a way as to create a directional response with the main lobe along the array axis. The measured array directivity agrees with theoretical predictions confirming the circuit design of the electronic control module. The array with 0.15 m (0.5 ft) microphone spacing rejected reverberations and background noise in the Ames 40- by 80-foot wind tunnel by 5 to 12 db for frequencies above 400 Hz.

Soderman, P. T.↗

Computing motion using resistive networks

Recent developments in the theory of early vision are described which lead from the formulation of the motion problem as an ill-posed one to its solution by minimizing certain 'cost' functions. These cost or energy functions can be mapped onto simple analog and digital resistive networks. It is shown how the optical flow can be computed by injecting currents into resistive networks and recording the resulting stationary voltage distribution at each node. These networks can be implemented in cMOS VLSI circuits and represent plausible candidates for biological vision systems.

Koch, Christof↗

Transient Voltage Recorder

A voltage transient recorder can detect lightning induced transient voltages. The recorder detects a lightning induced transient voltage and adjusts input amplifiers to accurately record transient voltage magnitudes. The recorder stores voltage data from numerous monitored channels, or devices. The data is time stamped and can be output in real time, or stored for later retrieval. The transient recorder, in one embodiment, includes an analog-to-digital converter and a voltage threshold detector. When an input voltage exceeds a pre-determined voltage threshold, the recorder stores the incoming voltage magnitude and time of arrival. The recorder also determines if its input amplifier circuits clip the incoming signal or if the incoming signal is too low. If the input data is clipped or too low, the recorder adjusts the gain of the amplifier circuits to accurately acquire subsequent components of the lightning induced transients.

Pedro J Medelius↗

Digital Parallel Processor Array for Optimum Path Planning

The invention computes the optimum path across a terrain or topology represented by an array of parallel processor cells interconnected between neighboring cells by links extending along different directions to the neighboring cells. Such an array is preferably implemented as a high-speed integrated circuit. The computation of the optimum path is accomplished by, in each cell, receiving stimulus signals from neighboring cells along corresponding directions, determining and storing the identity of a direction along which the first stimulus signal is received, broadcasting a subsequent stimulus signal to the neighboring cells after a predetermined delay time, whereby stimulus signals propagate throughout the array from a starting one of the cells. After propagation of the stimulus signal throughout the array, a master processor traces back from a selected destination cell to the starting cell along an optimum path of the cells in accordance with the identity of the directions stored in each of the cells.

Kremeny, Sabrina E.↗

Multiplexed Readout for an Experiment with a Large Number of Channels Using Single-Electron Sensitivity Skipper-CCDs

This paper presents the implementation of a multiplexed analog readout electronics system that can achieve single-electron counting using Skipper-CCDs with non-destructive readout. The proposed system allows the best performance of the sensors to be maintained, with sub-electron noise-level operation, while maintaining low-bandwidth data transfer, a minimum number of analog-to-digital converters (ADC) and low disk storage requirement with zero added multiplexing time, even for the simultaneous operation of thousands of channels. These features are possible with a combination of analog charge pile-up, sample and hold circuits and analog multiplexing. The implementation also aims to use the minimum number of components in circuits to keep compatibility with high-channel-density experiments using Skipper-CCDs for low-threshold particle detection applications. Performance details and experimental results using a sensor with 16 output stages are presented along with a review of the circuit design considerations.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Analytical design and performance studies of the nuclear light bulb engine

Analytical studies were conducted to investigate in detail the heat balance characteristics of the nuclear light bulb engine. Distributions of energy deposition to all engine components from the fission process, conduction and convection, and thermal radiation were considered. Where uncertainties in basic data or heat transfer characteristics were encountered, ranges of heat loads were calculated and reference values were selected. The influence of these heat loads on engine performance, space radiator requirements, and cooling sequence and cooling circuit designs was determined. The analyses resulted in revisions to the previously reported reference engine characteristics, principally in the heat loads to some engine components and in the cooling sequence. These revisions were incorporated in the engine dynamics digital computer simulation program. No significant changes occurred in the dynamic response of the engine to perturbations in fuel injection rate, reactivity or exhaust nozzle area.

Rodgers, R. J.↗

High fidelity, radiation tolerant analog-to-digital converters

Techniques for an analog-to-digital converter (ADC) using pipeline architecture includes a linearization technique for a spurious-free dynamic range (SFDR) over 80 deciBels. In some embodiments, sampling rates exceed a megahertz. According to a second approach, a switched-capacitor circuit is configured for correct operation in a high radiation environment. In one embodiment, the combination yields high fidelity ADC (>88 deciBel SFDR) while sampling at 5 megahertz sampling rates and consuming <60 milliWatts. Furthermore, even though it is manufactured in a commercial 0.25-.mu.m CMOS technology (1 .mu.m=12.sup.-6 meters), it maintains this performance in harsh radiation environments. Specifically, the stated performance is sustained through a highest tested 2 megarad(Si) total dose, and the ADC displays no latchup up to a highest tested linear energy transfer of 63 million electron Volts square centimeters per milligram at elevated temperature (131 degrees C.) and supply (2.7 Volts, versus 2.5 Volts nominal).

Wang, Charles Chang-I↗

Space Station Freedom power supply commonality via modular design

At mature operations, Space Station Freedom will need more than 2000 power supplies to feed housekeeping and user loads. Advanced technology power supplies from 20 to 250 W have been hybridized for terrestrial, aerospace, and industry applications in compact, efficient, reliable, lightweight packages compatible with electromagnetic interference requirements. The use of these hybridized packages as modules, either singly or in parallel, to satisfy the wide range of user power supply needs for all elements of the station is proposed. Proposed characteristics for the power supplies include common mechanical packaging, digital control, self-protection, high efficiency at full and partial loads, synchronization capability to reduce electromagnetic interference, redundancy, and soft-start capability. The inherent reliability is improved compared with conventional discrete component power supplies because the hybrid circuits use high-reliability components such as ceramic capacitors. Reliability is further improved over conventional supplies because the hybrid packages, which may be treated as a single part, reduce the parts count in the power supply.

Krauthamer, S.↗

On-board processing architectures for satellite B-ISDN services

Onboard baseband processing architectures for future satellite broadband integrated services digital networks (B-ISDN's) are addressed. To assess the feasibility of implementing satellite B-ISDN services, critical design issues, such as B-ISDN traffic characteristics, transmission link design, and a trade-off between onboard circuit and fast packet switching, are analyzed. Examples of the two types of switching mechanisms and potential onboard network control functions are presented. A sample network architecture is also included to illustrate a potential onboard processing system.

Inukai, Thomas↗

On-board processing satellite network architectures for broadband ISDN

Onboard baseband processing architectures for future satellite broadband integrated services digital networks (B-ISDN's) are addressed. To assess the feasibility of implementing satellite B-ISDN services, critical design issues, such as B-ISDN traffic characteristics, transmission link design, and a trade-off between onboard circuit and fast packet switching, are analyzed. Examples of the two types of switching mechanisms and potential onboard network control functions are presented. A sample network architecture is also included to illustrate a potential onboard processing system.

Inukai, Thomas↗

Multi-axis transient vibration testing of space objects: Test philosophy, test facility, and control strategy

IABG has been using various servohydraulic test facilities for many years for the reproduction of service loads and environmental loads on all kinds of test objects. For more than 15 years, a multi-axis vibration test facility has been under service, originally designed for earthquake simulation but being upgraded to the demands of space testing. First tests with the DFS/STM showed good reproduction accuracy and demonstrated the feasibility of transient vibration testing of space objects on a multi-axis hydraulic shaker. An approach to structural qualification is possible by using this test philosophy. It will be outlined and its obvious advantages over the state-of-the-art single-axis test will be demonstrated by example results. The new test technique has some special requirements to the test facility exceeding those of earthquake testing. Most important is the high reproduction accuracy demanded for a sophisticated control system. The state-of-the-art approach of analog closed-loop control circuits for each actuator combined with a static decoupling network and an off-line iterative waveform control is not able to meet all the demands. Therefore, the future over-all control system is implemented as hierarchical full digital closed-loop system on a highly parallel transputer network. The innermost layer is the digital actuator controller, the second one is the MDOF-control of the table movement. The outermost layer would be the off-line iterative waveform control, which is dedicated only to deal with the interaction of test table and test object or non-linear effects. The outline of the system will be presented.

Lachenmayr, Georg↗

Ultra low power CMOS technology

This paper discusses the motivation, opportunities, and problems associated with implementing digital logic at very low voltages, including the challenge of making use of the available real estate in 3D multichip modules, energy requirements of very large neural networks, energy optimization metrics and their impact on system design, modeling problems, circuit design constraints, possible fabrication process modifications to improve performance, and barriers to practical implementation.

Burr, J.↗

Resonant Tunneling Analog-To-Digital Converter

As sampling rates continue to increase, current analog-to-digital converter (ADC) device technologies will soon reach a practical resolution limit. This limit will most profoundly effect satellite and military systems used, for example, for electronic countermeasures, electronic and signal intelligence, and phased array radar. New device and circuit concepts will be essential for continued progress. We describe a novel, folded architecture ADC which could enable a technological discontinuity in ADC performance. The converter technology is based on the integration of multiple resonant tunneling diodes (RTD) and hetero-junction transistors on an indium phosphide substrate. The RTD consists of a layered semiconductor hetero-structure AlAs/InGaAs/AlAs(2/4/2 nm) clad on either side by heavily doped InGaAs contact layers. Compact quantizers based around the RTD offer a reduction in the number of components and a reduction in the input capacitance Because the component count and capacitance scale with the number of bits N, rather than by 2 (exp n) as in the flash ADC, speed can be significantly increased, A 4-bit 2-GSps quantizer circuit is under development to evaluate the performance potential. Circuit designs for ADC conversion with a resolution of 6-bits at 25GSps may be enabled by the resonant tunneling approach.

Broekaert, T. P. E.↗

A parallel VLSI architecture for a digital filter using a number theoretic transform

The advantages of a very large scalee integration (VLSI) architecture for implementing a digital filter using fermat number transforms (FNT) are the following: It requires no multiplication. Only additions and bit rotations are needed. It alleviates the usual dynamic range limitation for long sequence FNT's. It utilizes the FNT and inverse FNT circuits 100% of the time. The lengths of the input data and filter sequences can be arbitraty and different. It is regular, simple, and expandable, and as a consequence suitable for VLSI implementation.

Truong, T. K.↗

Optical Pseudocolor Encoding Of Gray-Scale Image

Optical encoding much faster than digital electronic encoding. In optical pseudocolor-encoding apparatus brightness modulation in image from television camera transformed into polarization modulation in LCTV, and then into pseudocolor modulation in image on projection screen. Advantageous for such purposes as thermography, inspection of circuit boards, mammography, and mapping.

Chao, Tien-Hsin↗

Generic characterization of electrical test benches for AC- and HVDC-connected wind power plants

The electrical test and assessment of wind turbines go hand in hand with standards and network connection requirements. In this paper, the generic structure of advanced electrical test benches, including grid emulator or controllable grid interface, wind torque emulator, and device under test, is proposed to harmonize state-of-the-art test sites. On the other hand, modern wind turbines are under development towards new features, concerning grid-forming, black-start, and frequency support capabilities as well as harmonic stability and control interaction considerations, to secure the robustness and stability of renewable-energy-based power systems. Therefore, it is necessary to develop new and revised test standards and methodologies to address the new features of wind turbines. This paper proposes a generic test structure within two main groups, including open-loop and closed-loop tests. The open-loop tests include the IEC 61400-21-1 standard tests as well as the additional proposed test options for the new capabilities of wind turbines, which replicate grid connection compliance tests using open-loop references for the grid emulator. In addition, the closed-loop tests evaluate the device under test as part of a virtual wind power plant and perform real-time simulations considering the grid dynamics. The closed-loop tests concern grid connection topologies consisting of AC and HVDC, as well as different electrical characteristics, including impedance, short-circuit ratio, inertia, and background harmonics. The proposed tests can be implemented using available advanced test benches by adjusting their control systems. The characteristics of a real power system can be emulated by a grid emulator coupled with real-time digital simulator systems through a high-bandwidth power-hardware-in-the-loop interface.

17 WIND ENERGY↗

Measuring Critical Charges For Single-Event Upsets

Concept for determining susceptibility of integrated circuits to single-event upsets (SEU's) based on direct measurement of critical charge causing upset. Test circuit is modified version of standard complementary metal-oxide/semiconductor static cell. Contains six transistors, connected to form latch that retains state of cell set by input pulses. Makes possible to evaluate vulnerability to SEU during design and development of digital equipment.

Buehler, Martin G.↗

Detector For FM Voice Or Digital Signals

Frequency-modulation (FM) detector operates with either analog audio (usually voice) signals or digital signals sent by differential minimum-shift keying (DMSK). Performance expected similar to conventional limiter/discriminator FM detectors. Detector operates at baseband, obviating need for band-pass filtering at intermediate frequency. Baseband version made in very-large-scale integrated circuit. New detector useful in mobile communications, where trend is toward integrated voice and data service.

Davarian, Faramaz↗