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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 919 records · Page 51

Development of a computational aero/fluids analysis system

The Computational Aero/Fluids Analysis System (AFAS) provides the analytical capability to perform state-of-the-art computational analyses in two difficult fluid dynamics disciplines associated with the Space Shuttle program. This system provides the analysis tools and techniques for rapidly and efficiently accessing, analyzing, and reformulating the large and expanding external aerodynamic data base while also providing tools for complex fluid flow analyses of the SSME engine components. Both of these fluid flow disciplines, external aerodynamics and internal gasdynamics, required this capability to ensure that MSFC can respond in a timely manner as problems are encountered and operational changes are made in the Space Shuttle.

Kelley, P. B.↗

TUNE: Compiler-Directed Automatic Performance Tuning

This project has developed compiler-directed performance tuning technology targeting the Cray XT4 Jaguar system at Oak Ridge, which has multi-core Opteron nodes with SSE-3 SIMD extensions, and the Cray XE6 Hopper system at NERSC. To achieve this goal, we combined compiler technology for model-guided empirical optimization for memory hierarchies with SIMD code generation, which have been developed by the PIs over the past several years. We examined DOE Office of Science applications to identify performance bottlenecks and apply our system to computational kernels that operate on dense arrays. Our goal for this performance-tuning technology has been to yield hand-tuned levels of performance on DOE Office of Science computational kernels, while allowing application programmers to specify their computations at a high level without requiring manual optimization. Overall, we aim to make our technology for SIMD code generation and memory hierarchy optimization a crucial component of high-productivity Petaflops computing through a close collaboration with the scientists in national laboratories.

97 MATHEMATICS AND COMPUTING↗

Evaluating the potential of disaggregated memory systems for HPC applications

Summary Disaggregated memory is a promising approach that addresses the limitations of traditional memory architectures by enabling memory to be decoupled from compute nodes and shared across a data center. Cloud platforms have deployed such systems to improve overall system memory utilization, but performance can vary across workloads. High‐performance computing (HPC) is crucial in scientific and engineering applications, where HPC machines also face the issue of underutilized memory. As a result, improving system memory utilization while understanding workload performance is essential for HPC operators. Therefore, learning the potential of a disaggregated memory system before deployment is a critical step. This paper proposes a methodology for exploring the design space of a disaggregated memory system. It incorporates key metrics that affect performance on disaggregated memory systems: memory capacity, local and remote memory access ratio, injection bandwidth, and bisection bandwidth, providing an intuitive approach to guide machine configurations based on technology trends and workload characteristics. We apply our methodology to analyze thirteen diverse workloads, including AI training, data analysis, genomics, protein, fusion, atomic nuclei, and traditional HPC bookends. Our methodology demonstrates the ability to comprehend the potential and pitfalls of a disaggregated memory system and provides motivation for machine configurations. Our results show that eleven of our thirteen applications can leverage injection bandwidth disaggregated memory without affecting performance, while one pays a rack bisection bandwidth penalty and two pay the system‐wide bisection bandwidth penalty. In addition, we also show that intra‐rack memory disaggregation would meet the application's memory requirement and provide enough remote memory bandwidth.

Ding, Nan↗

Launch Processing System

This paper presents a functional description of the Launch Processing System, which provides automatic ground checkout and control of the Space Shuttle launch site and airborne systems, with emphasis placed on the Checkout, Control, and Monitor Subsystem. Hardware and software modular design concepts for the distributed computer system are reviewed relative to performing system tests, launch operations control, and status monitoring during ground operations. The communication network design, which uses a Common Data Buffer interface to all computers to allow computer-to-computer communication, is discussed in detail.

Byrne, F.↗

High-performance mass storage system for workstations

Reduced Instruction Set Computer (RISC) workstations and Personnel Computers (PC) are very popular tools for office automation, command and control, scientific analysis, database management, and many other applications. However, when using Input/Output (I/O) intensive applications, the RISC workstations and PC's are often overburdened with the tasks of collecting, staging, storing, and distributing data. Also, by using standard high-performance peripherals and storage devices, the I/O function can still be a common bottleneck process. Therefore, the high-performance mass storage system, developed by Loral AeroSys' Independent Research and Development (IR&D) engineers, can offload a RISC workstation of I/O related functions and provide high-performance I/O functions and external interfaces. The high-performance mass storage system has the capabilities to ingest high-speed real-time data, perform signal or image processing, and stage, archive, and distribute the data. This mass storage system uses a hierarchical storage structure, thus reducing the total data storage cost, while maintaining high-I/O performance. The high-performance mass storage system is a network of low-cost parallel processors and storage devices. The nodes in the network have special I/O functions such as: SCSI controller, Ethernet controller, gateway controller, RS232 controller, IEEE488 controller, and digital/analog converter. The nodes are interconnected through high-speed direct memory access links to form a network. The topology of the network is easily reconfigurable to maximize system throughput for various applications. This high-performance mass storage system takes advantage of a 'busless' architecture for maximum expandability. The mass storage system consists of magnetic disks, a WORM optical disk jukebox, and an 8mm helical scan tape to form a hierarchical storage structure. Commonly used files are kept in the magnetic disk for fast retrieval. The optical disks are used as archive media, and the tapes are used as backup media. The storage system is managed by the IEEE mass storage reference model-based UniTree software package. UniTree software will keep track of all files in the system, will automatically migrate the lesser used files to archive media, and will stage the files when needed by the system. The user can access the files without knowledge of their physical location. The high-performance mass storage system developed by Loral AeroSys will significantly boost the system I/O performance and reduce the overall data storage cost. This storage system provides a highly flexible and cost-effective architecture for a variety of applications (e.g., realtime data acquisition with a signal and image processing requirement, long-term data archiving and distribution, and image analysis and enhancement).

Chiang, T.↗

Scheduling Operations for Massive Heterogeneous Clusters

High-performance computing (HPC) programming has become increasingly difficult with the advent of hybrid supercomputers consisting of multicore CPUs and accelerator boards such as the GPU. Manual tuning of software to achieve high performance on this type of machine has been performed by programmers. This is needlessly difficult and prone to being invalidated by new hardware, new software, or changes in the underlying code. A system was developed for task-based representation of programs, which when coupled with a scheduler and runtime system, allows for many benefits, including higher performance and utilization of computational resources, easier programming and porting, and adaptations of code during runtime. The system consists of a method of representing computer algorithms as a series of data-dependent tasks. The series forms a graph, which can be scheduled for execution on many nodes of a supercomputer efficiently by a computer algorithm. The schedule is executed by a dispatch component, which is tailored to understand all of the hardware types that may be available within the system. The scheduler is informed by a cluster mapping tool, which generates a topology of available resources and their strengths and communication costs. Software is decoupled from its hardware, which aids in porting to future architectures. A computer algorithm schedules all operations, which for systems of high complexity (i.e., most NASA codes), cannot be performed optimally by a human. The system aids in reducing repetitive code, such as communication code, and aids in the reduction of redundant code across projects. It adds new features to code automatically, such as recovering from a lost node or the ability to modify the code while running. In this project, the innovators at the time of this reporting intend to develop two distinct technologies that build upon each other and both of which serve as building blocks for more efficient HPC usage. First is the scheduling and dynamic execution framework, and the second is scalable linear algebra libraries that are built directly on the former.

Humphrey, John↗

High Performance Computing Facility Operational Assessment 2016 - Oak Ridge Leadership Computing Facility

Oak Ridge National Laboratory’s (ORNL’s) Leadership Computing Facility (OLCF) continues to surpass its operational target goals: supporting users; delivering fast, reliable systems; creating innovative solutions for high-performance computing (HPC) needs; and managing risks, safety, and security associated with operating one of the most powerful computers in the world. The results can be seen in the cutting-edge science delivered by users and the praise from the research community. Calendar year (CY) 2016 was filled with outstanding operational results and accomplishments: a very high rating from users on overall satisfaction for the third year in a row; the greatest number of core hours delivered to research projects; the largest number of research publications for the life of Titan; and success in delivering on the allocation of 60%, 30%, and 10% of core hours offered for the Innovative and Novel Computational Impact on Theory and Experiment (INCITE), Advanced Scientific Computing Research Leadership Computing Challenge (ALCC), and Director’s Discretionary (DD) programs, respectively. These accomplishments, coupled with the extremely high utilization rate, represent the fulfillment of the promise of Titan: maximum use by maximum-size simulations.

97 MATHEMATICS AND COMPUTING↗

VLSI-Chip Tester

Compact test set integrated in computer-aided design system. Test set performs functional tests on very-large-scale integrated (VLSI) circuits. Makes tests from points within VLSI chip as well as at input and output pins. Used for quality control and design; in latter capacity, checks internal logic functions on chip and feed results directly to computer-aided design system for correction. Also simulates operation of chip design before chip is made. VLSI Tester contains three power supplies, control logic, and standard multibus circuit board in aluminum chassis. Chassis fits under platform of microprobe station. Multibus board links tester to interactive terminals and to host computer.

Deutsch, Leslie J.↗

Performance of a Natural Gas Solid Oxide Fuel Cell System With and Without Carbon Capture

The fuel cell program at the United States Department of Energy (DOE) National Energy Technology Laboratory (NETL) is focused on the development of low-cost, highly efficient, and reliable fossil-fuel-based solid oxide fuel cell (SOFC) power systems that can generate environmentally-friendly electric power with at least 90 percent carbon capture. NETL’s SOFC technology development roadmap is aligned with near-term market opportunities in the distributed generation sector to validate and advance the technology while paving the way for utility-scale natural gas (NG)- and coal-derived synthesis gas-fueled applications via progressively larger system demonstrations. The present study represents a part of a series of system evaluations being carried out at NETL to aid in prioritizing technological advances along research pathways to the realization of utility-scale SOFC systems, a transformational goal of the fuel cell program. In particular, the system performance of utility-scale NG fuel cell (NGFC) systems with and without carbon dioxide (CO2) capture is presented. The NGFC system analyzed features an external auto-thermal reformer (ATR) feeding the fuel to the SOFC system consisting of planar anode-supported SOFC with separated anode and cathode off-gas streams. In systems with CO2 capture, an air separation unit (ASU) is used to provide the oxygen for the ATR and for the combustion of unutilized fuel in the SOFC anode exhaust along with a CO2 purification unit to provide a nearly pure CO2 stream suitable for transport for usage in enhanced oil recovery operations or for storage in underground saline formations. Remaining thermal energy in the exhaust gases is recovered in a bottoming steam Rankine cycle while supplying any process heat requirements. A reduced order model (ROM) developed at the Pacific Northwest National Laboratory (PNNL) is used to predict the SOFC performance. The ROM, while being computationally effective for system studies, provides other detailed information about the state of the stack, such as the internal temperature gradient, generally not available from simple performance models often used to represent the SOFC. Such additional information can be important in system optimization studies to preclude operation under off-design conditions that can adversely impact overall system reliability. The NGFC system performance was analyzed by varying salient system parameters, including the percent of internal (to the SOFC module) NG reformation—ranging from 0 to 100 percent—fuel utilization, and current density. The impact of advances in underlying SOFC technology on electrical performance was also explored.

solid oxide fuel cell (SOFC), natural gas fuel cel↗

Performance results for a hybrid coding system.

Results of computer simulation studies of the hybrid pull-up bootstrap decoding algorithm, using a constraint length 24, nonsystematic, rate 1/2 convolutional code for the symmetric channel with both binary and eight-level quantized outputs. Computational performance was used to measure the effect of several decoder parameters and determine practical operating constraints. Results reveal that the track length may be reduced to 500 information bits with small degradation in performance. The optimum number of tracks per block was found to be in the range from 7 to 11. An effective technique was devised to efficiently allocate computational effort and identify reliably decoded data sections. Long simulations indicate that a practical bootstrap decoding configuration has a computational performance about 1.0 dB better than sequential decoding and an output bit error rate about .0000025 near the R sub comp point.

Hoffman, L. B.↗

Quantifying Scheduling Challenges for Exascale System Software

The move towards high-performance computing (HPC) ap- plications comprised of coupled codes and the need to dra- matically reduce data movement is leading to a reexami- nation of time-sharing vs. space-sharing in HPC systems. In this paper, we discuss and begin to quantify the perfor- mance impact of a move away from strict space-sharing of nodes for HPC applications. Specifically, we examine the po- tential performance cost of time-sharing nodes between ap- plication components, we determine whether a simple coor- dinated scheduling mechanism can address these problems, and we research how suitable simple constraint-based opti- mization techniques are for solving scheduling challenges in this regime. Our results demonstrate that current general- purpose HPC system software scheduling and resource al- location systems are subject to significant performance de- ciencies which we quantify for six representative applica- tions. Based on these results, we discuss areas in which ad- ditional research is needed to meet the scheduling challenges of next-generation HPC systems.

C.1.2 [Multiprocessors]: Parallel Processors↗

A practical approach to reconciling availability, performance, and capacity in provisioning extreme-scale storage systems

The increasing data demands from high-performance computing applications significantly accelerate the capacity, capability and reliability requirements of storage systems. As systems scale, component failures and repair times increase, significantly impacting data availability. A wide array of decision points must be balanced in designing such systems. We propose a systematic approach that balances and optimizes both initial and continuous spare provisioning based on a detailed investigation of the anatomy and field failure data analysis of extreme-scale storage systems. We consider the component failure characteristics and its cost and impact at the system level simultaneously. We build a tool to evaluate different provisioning schemes, and the results demonstrate that our optimized provisioning can reduce the duration of data unavailability by as much as 52% under a fixed budget. We also observe that non-disk components have much higher failure rates than disks, and warrant careful considerations in the overall provisioning process.

Computer Science↗

Large-Scale Data Analytics and Its Relationship to Simulation

Large-Scale Data Analytics (LSDA) problems require finding meaningful patterns in data sets that are so large as to require leading-edge processing and storage capability. LSDA problems are increasingly important for government mission work, industrial application, and scientific discovery. Effective solution of some important LSDA problems requires a computational workload that is substantially different from that associated with traditional High Performance Computing (HPC) simulations intended to help understand physical phenomena or to conduct engineering. While traditional HPC application codes exploit structural regularity and data locality to improve performance, many analytics problems lead more naturally to very fine-grained communication between unpredictable sets of processors, resulting in less regular communication patterns that do not map efficiently on to typical HPC systems. In both simulation and analytics domains, however, data movement increasingly dominates the performance, energy usage, and price of computing systems. It is therefore plausible that we could find a more synergistic technology path forward. Even though future machines may continue to be configured differently for the two domains, a more common technological roadmap between them in the form of a degree of convergence in the underlying componentry and design principles to address these common technical challenges could have substantial technical and economic benefits.

97 MATHEMATICS AND COMPUTING↗

A Survey of Architectural Techniques for Near-Threshold Computing

Energy efficiency has now become the primary obstacle in scaling the performance of all classes of computing systems. In low-voltage computing and specifically, near-threshold voltage computing (NTC), which involves operating the transistor very close to and yet above its threshold voltage, holds the promise of providing many-fold improvement in energy efficiency. However, use of NTC also presents several challenges such as increased parametric variation, failure rate and performance loss etc. Our paper surveys several re- cent techniques which aim to offset these challenges for fully leveraging the potential of NTC. By classifying these techniques along several dimensions, we also highlight their similarities and differences. Ultimately, we hope that this paper will provide insights into state-of-art NTC techniques to researchers and system-designers and inspire further research in this field.

97 MATHEMATICS AND COMPUTING↗

2021 Q1 Project Report: Optimized Bifacial PV Systems (Q1 FY2021 Project Report)

This project has four main technical objectives: 1) Develop and improve bifacial performance models by adding the capability to evaluate electrical behavior and performance of bifacial modules and arrays under realistic field conditions including irradiance variability caused by racking, module frame, and position in the array. 2) Instrument and monitor performance of fielded bifacial systems to validate performance models and to measure, analyze and publish on bifacial energy gain. These should include both research and commercial bifacial systems and cover a variety of deployment applications. 3) Evaluate optimal bifacial system designs using simulations leveraging high-performance computing, and also using full sized and miniaturized experimental field deployments. 4) Establish and contribute to international test standards for bifacial system performance, testing, and safety, and work with the community to establish installation and siting best practices.

42 ENGINEERING↗

A Software Rejuvenation Framework for Distributed Computing

A performability-oriented conceptual framework for software rejuvenation has been constructed as a means of increasing levels of reliability and performance in distributed stateful computing. As used here, performability-oriented signifies that the construction of the framework is guided by the concept of analyzing the ability of a given computing system to deliver services with gracefully degradable performance. The framework is especially intended to support applications that involve stateful replicas of server computers.

Chau, Savio↗

Distributed metadata in a high performance computing environment

A computer-executable method, system, and computer program product for managing meta-data in a distributed storage system, wherein the distributed storage system includes one or more burst buffers enabled to operate with a distributed key-value store, the co computer-executable method, system, and computer program product comprising receiving a request for meta-data associated with a block of data stored in a first burst buffer of the one or more burst buffers in the distributed storage system, wherein the meta data is associated with a key-value, determining which of the one or more burst buffers stores the requested metadata, and upon determination that a first burst buffer of the one or more burst buffers stores the requested metadata, locating the key-value in a portion of the distributed key-value store accessible from the first burst buffer.

97 MATHEMATICS AND COMPUTING↗