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At least 919 records · Page 51

Using EIGER for Antenna Design and Analysis

EIGER (Electromagnetic Interactions GenERalized) is a frequency-domain electromagnetics software package that is built upon a flexible framework, designed using object-oriented techniques. The analysis methods used include moment method solutions of integral equations, finite element solutions of partial differential equations, and combinations thereof. The framework design permits new analysis techniques (boundary conditions, Green#s functions, etc.) to be added to the software suite with a sensible effort. The code has been designed to execute (in serial or parallel) on a wide variety of platforms from Intel-based PCs and Unix-based workstations. Recently, new potential integration scheme s that avoid singularity extraction techniques have been added for integral equation analysis. These new integration schemes are required for facilitating the use of higher-order elements and basis functions. Higher-order elements are better able to model geometrical curvature using fewer elements than when using linear elements. Higher-order basis functions are beneficial for simulating structures with rapidly varying fields or currents. Results presented here will demonstrate curren t and future capabilities of EIGER with respect to analysis of installed antenna system performance in support of NASA#s mission of exploration. Examples include antenna coupling within an enclosed environment and antenna analysis on electrically large manned space vehicles.

Champagne, Nathan J.↗

Designing High Speed Printed Circuit Boards Using DxDesigner and Expedition

Mentor's DxDesigner and Expedition schematic capture and printed circuit board tools were chosen to implement a custom high speed signal processing board containing many high pin count Field Programmable Gate Arrays and many high speed serial connections with data rates over 2 Gigasamples/sec. The methodology used to place the parts and route the board involved the interaction of both the DxDesigner and Expedition tools. The basic design philosophy was to specify as much as possible through design constraints at the schematic level. This paper will explore implementing that philosophy in both tools to facilitate part placement and trace routing.

printed circuit boards↗

Parallel integrated frame synchronizer chip

A parallel integrated frame synchronizer which implements a sequential pipeline process wherein serial data in the form of telemetry data or weather satellite data enters the synchronizer by means of a front-end subsystem and passes to a parallel correlator subsystem or a weather satellite data processing subsystem. When in a CCSDS mode, data from the parallel correlator subsystem passes through a window subsystem, then to a data alignment subsystem and then to a bit transition density (BTD)/cyclical redundancy check (CRC) decoding subsystem. Data from the BTD/CRC decoding subsystem or data from the weather satellite data processing subsystem is then fed to an output subsystem where it is output from a data output port.

Ghuman, Parminder Singh↗

Rotary machine having back to back turbines

A rotary machine having a pair of back to back turbines in serial flow relationship is disclosed. Various construction details are developed which permit for a compact design. In one detailed embodiment the turbine has a housing having an inlet manifold and an exit manifold which are disposed between the outlet manifold for an associated turbopump.

Burgy, N. Frank↗

Hybrid concatenated codes and iterative decoding

Several improved turbo code apparatuses and methods. The invention encompasses several classes: (1) A data source is applied to two or more encoders with an interleaver between the source and each of the second and subsequent encoders. Each encoder outputs a code element which may be transmitted or stored. A parallel decoder provides the ability to decode the code elements to derive the original source information d without use of a received data signal corresponding to d. The output may be coupled to a multilevel trellis-coded modulator (TCM). (2) A data source d is applied to two or more encoders with an interleaver between the source and each of the second and subsequent encoders. Each of the encoders outputs a code element. In addition, the original data source d is output from the encoder. All of the output elements are coupled to a TCM. (3) At least two data sources are applied to two or more encoders with an interleaver between each source and each of the second and subsequent encoders. The output may be coupled to a TCM. (4) At least two data sources are applied to two or more encoders with at least two interleavers between each source and each of the second and subsequent encoders. (5) At least one data source is applied to one or more serially linked encoders through at least one interleaver. The output may be coupled to a TCM. The invention includes a novel way of terminating a turbo coder.

Divsalar, Dariush↗

In situ testing of a satellite or other object prior to development

A method and system for testing a test object, such as a satellite, is disclosed. High energy acoustic testing is performed on the object by assembling an acoustical system about the test object rather than transporting the test object to a specially configured acoustic chamber. The acoustic system of the present invention preferably provides and directs acoustic energy directly to the surfaces of the test object rather than providing the test object in a high energy acoustic environment where a substantial amount of the acoustic energy is randomly directed within a chamber having the test object. Additionally, the present invention further provides for mechanical vibration tests concurrently or serially with acoustic testing, wherein the object is not required to be transported.

Eagen, James H.↗

Turbofan engine with a low pressure turbine driven supercharger in a bypass duct operated by a fuel rich combustor and an afterburner

A multiple bypass turbofan engine includes a core Brayton Cycle gas generator with a fuel rich burning combustor and is provided with a variable supercharged bypass duct around the gas generator with a supercharging means in the supercharged bypass duct powered by a turbine not mechanically connected to the gas generator. The engine further includes a low pressure turbine driven forward fan upstream and forward of an aft fan and drivingly connected to a low pressure turbine by a low pressure shaft, the low pressure turbine being aft of and in serial flow communication with the core gas generator. A fan bypass duct is disposed radially outward of the core engine assembly and has first and second inlets disposed between the forward and aft fans. An inlet duct having an annular duct wall is disposed radially inward of the bypass duct and connects the second inlet to the bypass duct. A supercharger means for compressing air is drivingly connected to the low pressure turbine and is disposed in the inlet duct. A secondary combustor or augmentor is disposed in an exhaust duct downstream of and in fluid flow communication with the bypass duct and the gas generator.

Bartos, James W.↗

Stand-alone digital data storage control system including user control interface

A storage control system includes an apparatus and method for user control of a storage interface to operate a storage medium to store data obtained by a real-time data acquisition system. Digital data received in serial format from the data acquisition system is first converted to a parallel format and then provided to the storage interface. The operation of the storage interface is controlled in accordance with instructions based on user control input from a user. Also, a user status output is displayed in accordance with storage data obtained from the storage interface. By allowing the user to control and monitor the operation of the storage interface, a stand-alone, user-controllable data storage system is provided for storing the digital data obtained by a real-time data acquisition system.

Wright, Kenneth D.↗

Method for implementation of recursive hierarchical segmentation on parallel computers

A method, computer readable storage, and apparatus for implementing a recursive hierarchical segmentation algorithm on a parallel computing platform. The method includes setting a bottom level of recursion that defines where a recursive division of an image into sections stops dividing, and setting an intermediate level of recursion where the recursive division changes from a parallel implementation into a serial implementation. The segmentation algorithm is implemented according to the set levels. The method can also include setting a convergence check level of recursion with which the first level of recursion communicates with when performing a convergence check.

Tilton, James C.↗

Process and apparatus for analyzing specimens for the presence of microorganisms therein

Microorganisms in a specimen are detected, identified, and enumerated by introducing the specimen into a sampling cartridge and diluting the specimen with a known volume of water within the cartridge. The cartridge has a manifold and several cassettes attached to the manifold. Each cassette contains a serpentine flow channel having a series of filters therein and a detection cell located downstream from each filter. The flow channel in each cassette also contains a culture medium which is freeze dried and is highly selective in the sense that it promotes the growth of one type of microorganism, but not others. The mixture of the specimen and water flows from the manifold into the flow channel of each cassette where it rehydrates the culture medium therein and further flows through the filters. Each filter removes a known proportion of the microorganisms from the mixture of specimen, water and medium, thereby effecting a serial dilution. After the cassettes are heated to incubate the microoganisms, the detection cells are observed for growth of the microorganisms therein which is manifested in a change in the light transmitting characteristics of the mixtures within the cells.

Aldridge, Jr., Clifton↗

Single chip camera active pixel sensor

A totally digital single chip camera includes communications to operate most of its structure in serial communication mode. The digital single chip camera include a D/A converter for converting an input digital word into an analog reference signal. The chip includes all of the necessary circuitry for operating the chip using a single pin.

Shaw, Timothy↗

High-resolution CCD imagers using area-array CCD's for sensing spectral components of an optical line image

CCD imagers with a novel replicated-line-imager architecture are abutted to form an extended line sensor. The sensor is preceded by optics having a slit aperture and having an optical beam splitter or astigmatic lens for projecting multiple line images through an optical color-discriminating stripe filter to the CCD imagers. A very high resolution camera suitable for use in a satellite, for example, is thus provided. The replicated-line architecture of the imager comprises an area-array CCD, successive rows of which are illuminated by replications of the same line segment, as transmitted by respective color filter stripes. The charge packets formed by accumulation of photoresponsive charge in the area-array CCD are read out row by row. Each successive row of charge packets is then converted from parallel to serial format in a CCD line register and its amplitude sensed to generate a line of output signal.

Elabd, Hammam↗

Power-processing unit

Power-processing unit uses AC buses (30, 32) to supply all current dependent needs such as connections (54, 56) to an ion thruster through an inductor (88) and the primary of a transformer (90), to assure limited currents to such loads. Where temperature control is also required, such as to the main discharge vaporizer heater connection (36, 38), switches (100, 102) are serially connected with inductor (96) and the primary of transformer (98). Temperature sensor (104) controls the switches (100, 102) for temperature regulation.

Wessel, Frank J.↗

CCD imager with photodetector bias introduced via the CCD register

An infrared charge-coupled-device (IR-CCD) imager uses an array of Schottky-barrier diodes (SBD's) as photosensing elements and uses a charge-coupled-device (CCD) for arranging charge samples supplied in parallel from the array of SBD's into a succession of serially supplied output signal samples. Its sensitivity to infrared (IR) is improved by placing bias charges on the Schottky barrier diodes. Bias charges are transported to the Schottky barrier diodes by a CCD also used for charge sample read-out.

Kosonocky, Walter F.↗

Method and apparatus for transmitting data

A method and apparatus for transmitting a byte-organized serial data stream from a transmitting station to a receiving station that may employ byte boundaries different than the transmitting station. The technique includes sending N different data streams from the remote terminal, where N is the number of different framing alignments that may be imposed on the unframed data stream by the network. The different data streams are chosen so that one will be framed by the network as the intended data stream regardless of which framing alignment is actually imposed.

Schroeder, George L.↗

Tri-state logic circuit

A line driver including a pair of complementary transistors having their conduction paths serially connected between an operating and a reference potential and their bases connected through a first switch to a signal input terminal. A second switch is connected between the common base connection and the common connection of the conduction paths. With the second switch open and the first closed, an output voltage, responsive to the input signal, corresponding to first or second binary values is obtained. When the second switch is closed and the first opened, the transistor pair is turned off, disconnecting the line driver from its load, thereby providing tri-state logic operation.

Pryor, Richard Lee↗

Implementation of a Coded Modulation for Deep Space Optical Communications

We present an efficient implementation of a coded modulation for the deep space optical channel. NASA designed this so called serially concatenated pulse position modulation (SCPPM) code to provide an optical link that can operate within one dB signal energy of the Shannon capacity during a nominal mission condition from Mars. Here, we describe some of the challenges in realizing the SCPPM decoder on a field-programmable gate array (FPGA). Through various architectural optimizations, we achieve a 6 Mbps decoder on a single FPGA. Moreover, we demonstrate that it is possible to communicate reliably on an efficient bits-per-photon count in an end-to-end SCPPM coded system.

turbo codes↗

Accumulate Repeat Accumulate Coded Modulation

In this paper we propose an innovative coded modulation scheme called 'Accumulate Repeat Accumulate Coded Modulation' (ARA coded modulation). This class of codes can be viewed as serial turbo-like codes, or as a subclass of Low Density Parity Check (LDPC) codes that are combined with high level modulation. Thus at the decoder belief propagation can be used for iterative decoding of ARA coded modulation on a graph, provided a demapper transforms the received in-phase and quadrature samples to reliability of the bits.

coded modulation↗