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At least 919 records · Page 51

Thermodynamic origin of nonvolatility in resistive memory

Electronic switches based on the migration of high-density point defects, or memristors, are poised to revolutionize post-digital electronics. Despite significant research, key mechanisms for filament formation and oxygen transport remain unresolved, hindering our ability to predict and design device properties. For example, experiments have achieved 10 orders of magnitude longer retention times than predicted by current models. Here, using electrical measurements, scanning probe microscopy, and first-principles calculations on tantalum oxide memristors, we reveal that the formation and stability of conductive filaments crucially depend on the thermodynamic stability of the amorphous oxygen-rich and oxygen-poor compounds, which undergo composition phase separation. Including the previously neglected effects of this amorphous phase separation reconciles unexplained discrepancies in retention and enables predictive design of key performance indicators such as retention stability. Furthermore, this result emphasizes non-ideal thermodynamic interactions as key design criteria in post-digital devices with defect densities substantially exceeding those of today’s covalent semiconductors.

36 MATERIALS SCIENCE↗

Simulation of cosmic-ray induced soft errors and latchup in integrated-circuit computer memories

Soft errors have been induced in solid-state static RAM's by iron nuclei from the Lawrence Berkeley Laboratory (LBL) Bevalac, in experiments designed to prove the ability of iron-group cosmic rays to generate such errors. Subsequently, various delidded device types were tested in beams of argon and krypton ions from the LBL 88-inch Cyclotron, at energies near 2 MeV/nucleon. The latter tests showed that some devices are essentially immune to bit error while others are quite susceptible. Good agreement was obtained with model predictions in cases where the latter exist. Latchup, whose cause is attributed to individual heavy ions, was also observed in some device types.

Kolasinski, W. A.↗

Memristive linear algebra

The advent of memristive devices offers a promising avenue for efficient and scalable analog computing, particularly for linear algebra operations essential in various scientific and engineering applications. This paper investigates the potential of memristive crossbars in implementing matrix inversion algorithms. We explore both static and dynamic approaches, emphasizing the advantages of analog and in-memory computing for matrix operations beyond multiplication. In particular, we demonstrate that the electrical properties of memristive crossbars uniquely suit them for the evolution of a family of matrix exponentials, which can be exploited for the efficient computation of matrix inverses and online solutions for linear problems. Our results demonstrate that memristive arrays can reduce computational complexity. We also study power consumption and show a tradeoff between precision and energy. Furthermore, we address the challenges of device variability, precision, and scalability, providing insights into the practical implementation of these algorithms.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Engineering of Grain Boundaries in CeO 2 Enabling Tailorable Resistive Switching Properties

Abstract Defect engineering in valence change memories aimed at tuning the concentration and transport of oxygen vacancies are studied extensively, however mostly focusing on contribution from individual extended defects such as single dislocations and grain boundaries. In this work, the impact of engineering large numbers of grain boundaries on resistive switching mechanisms and performances is investigated. Three different grain morphologies, that is, “random network,” “columnar scaffold,” and “island‐like,” are realized in CeO 2 thin films. The devices with the three grain morphologies demonstrate vastly different resistive switching behaviors. The best overall resistive switching performance is shown in the devices with “columnar scaffold” morphology, where the vertical grain boundaries extending through the film facilitate the generation of oxygen vacancies as well as their migration under external bias. The observation of both interfacial and filamentary switching modes only in the devices with a “columnar scaffold” morphology further confirms the contribution from grain boundaries. In contrast, the “random network” or “island‐like” structures result in excessive or insufficient oxygen vacancy concentration migration paths. The research provides design guidelines for grain boundary engineering of oxide‐based resistive switching materials to tune the resistive switching performances for memory and neuromorphic computing applications.

36 MATERIALS SCIENCE↗

Autonomous Slat-Cove-Filler Device for Reduction of Aeroacoustic Noise Associated with Aircraft Systems

A slat cove filler is utilized to reduce airframe noise resulting from deployment of a leading edge slat of an aircraft wing. The slat cove filler is preferably made of a super elastic shape memory alloy, and the slat cove filler shifts between stowed and deployed shapes as the slat is deployed. The slat cove filler may be configured such that a separate powered actuator is not required to change the shape of the slat cove filler from its deployed shape to its stowed shape and vice-versa. The outer contour of the slat cove filler preferably follows a profile designed to maintain accelerating flow in the gap between the slat cove filler and wing leading edge to provide for noise reduction.

Turner, Travis L.↗

Energy transfer between localized emitters in photonic cavities from first principles

Radiative and nonradiative resonant couplings between defects are ubiquitous phenomena in photonic devices used in classical and quantum information technology applications. In this work, we present a first-principles approach to enable quantitative predictions of the energy transfer between defects in photonic cavities, beyond the dipole-dipole approximation and including the many-body nature of the electronic states. As an example, we discuss the energy transfer from a dipolelike emitter to an 𝐹 center in MgO in a spherical cavity. We show that the cavity can be used to controllably enhance or suppress specific spin-flip and spin-conserving transitions. Specifically, we predict that an ∼10–100 enhancement in the resonant energy transfer rate can be gained in the case of the 𝐹 center in MgO at ∼10 nm distances from a dipolar source, using rather moderate cavity with quality factor 𝑄 ∼ 400. We also show that a similar suppression in the transfer rate can be achieved by off-tuning the cavity resonance relative to the emitter transition energy. The framework presented here is general and readily applicable to a wide range of devices where localized emitters are embedded in microspheres, core-shell nanoparticles, and dielectric Mie resonators. Hence, our approach paves the way to predict how to control energy transfer in quantum memories and in ultrahigh-density optical memories, and in a variety of quantum information platforms.

First-principles calculations↗

Knowledge gaps for neuromorphic ionic computing

BACKGROUND Neuromorphic computing, inspired by the human brain’s ability to process information efficiently, represents a transformative approach to computation. In this Review, we explore the emerging field of neuromorphic ionic computing, which leverages ionic conduction and coupling to mimic neural processes, and identify critical knowledge gaps that must be addressed to realize its full potential. A central theme of the discussion is energy efficiency, a challenge that is both a limitation and an opportunity for this technology. Although complementary metal-oxide semiconductor (CMOS)–based neuromorphic technologies have made strides in scaling to billions of neurons and are increasingly applied in artificial intelligence and numerical computing, they remain orders of magnitude behind the human brain in terms of connectivity and energy efficiency. Neuromorphic ionic computing promises to overcome these limitations by leveraging the distinct architectural and operational principles of the brain. Our brains achieve this energy efficiency by combining several key features: using the same network elements to store and process information; using an incredibly complex and massively interconnected three-dimensional (3D) network of locally active elements that enables sparsity, robustness in the presence of noise, adaptation, and life-long learning; computing at comparatively low voltage and frequency; and last, taking advantage of a plethora of ions and small molecules as information carriers. Here, we propose that ionic computing systems can take advantage of similar features to achieve substantial gains in energy efficiency. ADVANCES Since the first reports of neuromorphic ionic behavior in nanofluidic channels, we have witnessed an explosion of reports that used ionic devices to produce synaptomimetic behaviors. However, achieving the goals of ionic computing requires not only implementation of much more sophisticated device functionality but also overcoming fundamental barriers in materials science, device architecture, and system integration. Current ionic devices, even those incorporating state-of-the-art materials, still suffer from limited functionality and stability, which restrict their performance and increase energy demands. Developing new materials with enhanced ionic properties is essential to overcome these limitations. Similarly, the design of neuromorphic devices must evolve to leverage the particular advantages of ionic processes. Existing architectures often follow a single-information-carrier logic of conventional electronics or are constructed of mesoscale fluidics, failing to capitalize on the energy-efficient mechanisms inherent to ionic systems or implement the multiple-information-carrier paradigm. Current neuromorphic chips focus on large-scale networks of analog memory elements based on mechanisms such as charge trap (flash), filamentary, phase change, or spin, which are built on top of a network of artificial CMOS neurons. Although such prototype networks have achieved impressive performance, it is difficult to envision how they can implement the key features such as massive connectivity, sophisticated plasticity, adaptability, sparsity, and “multichromatic” computing. Although small-scale devices have demonstrated promising results, integrating them, maintaining energy efficiency, and implementing temperature control as systems grow in complexity and size to computationally relevant scale remain major hurdles. Furthermore, interfacing neuromorphic ionic devices with existing computing technologies presents technical and conceptual challenges that will require innovative approaches that combine insights from neuroscience, materials science, and engineering. OUTLOOK Despite these challenges, the potential impact of neuromorphic ionic computing is profound with potential applications ranging from artificial intelligence to robotics and beyond. We also argue that neuromorphic ionic computing systems should not, at least in the beginning, compete with CMOS technologies but rather should focus on applications that require extreme energy efficiency with chemical and/or biological compatibility, such as biomedical applications (for example, brain-computer interfaces), environmental monitoring, and agricultural and food applications. Ultimately, this Review highlights the crucial role of interdisciplinary collaboration in advancing the field. Neuromorphic ionic computing is not merely a technological innovation; it represents a substantial step toward sustainable computation, aligning with the growing demand for energy-conscious solutions in a world that is increasingly reliant on data and computation.

Neuromorphic↗

On the stability of robotic systems with random communication rates

Control problems of sampled data systems which are subject to random sample rate variations and delays are studied. Due to the rapid growth of the use of computers more and more systems are controlled digitally. Complex systems such as space telerobotic systems require the integration of a number of subsystems at different hierarchical levels. While many subsystems may run on a single processor, some subsystems require their own processor or processors. The subsystems are integrated into functioning systems through communications. Communications between processes sharing a single processor are also subject to random delays due to memory management and interrupt latency. Communications between processors involve random delays due to network access and to data collisions. Furthermore, all control processes involve delays due to casual factors in measuring devices and to signal processing. Traditionally, sampling rates are chosen to meet the worst case communication delay. Such a strategy is wasteful as the processors are then idle a great proportion of the time; sample rates are not as high as possible resulting in poor performance or in the over specification of control processors; there is the possibility of missing data no matter how low the sample rate is picked. Asymptotical stability with probability one for randomly sampled multi-dimensional linear systems is studied. A sufficient condition for the stability is obtained. This condition is so simple that it can be applied to practical systems. A design procedure is also shown.

Kobayashi, H.↗

Presentation on a Space Acceleration Measurement System (SAMS)

The primary objective of the Space Acceleration Measurement Systems (SAMS) project is to provide an acceleration measurement system capable of serving a wide variety of space experiments. The design of the system being developed under this project takes into consideration requirements for experiments located in the middeck, in the orbiter bay, and in Spacelab. In addition to measuring, conditioning, and recording accelerations, the system will be capable of performing complex calculations and interactive control. The main components consist of a remote triaxial optical storage device. In operation, the triaxial sensor head produces output signals in response to acceleration inputs. These signals are preamplified, filtered and converted into digital data which is then transferred to optical memory. The system design is modular, facilitating both software and hardware upgrading as technology advances. Two complete acceleration measurement flight systems will be build and tested under this project.

Chase, Theodore L.↗

Multiple single event upsets in CMOS static rams

The occurrence of multiple upset errors during ground tests can contaminate the data and lead to error cross sections which are too high. In space, multiple errors may produce higher upsets than predicted and if they occur in single words they can defeat error detection and correction hardware. This investigation involves data which were taken during an experimental study of dose imprint effects in static memories. The results show that multiple errors occurred mainly for heavy ions with high linear energy transfers and with the majority of these in the soft upset sections of the dose-imprinted memory samples. The percentages of the total number of errors which were singles, doubles, and triplets, were determined as a function of LET, dose, and soft or hard section of the devices. The experimental observations are compared to the predictions of simple binomial statistics.

Stassinopoulos, E. G.↗

Soft error-mitigating semiconductor design system and associated methods

A soft error-mitigating semiconductor design system and associated methods that tailor circuit design steps to mitigate corruption of data in storage elements (e.g., flip flops) due to Single Events Effects (SEEs). Required storage elements are automatically mapped to triplicated redundant nodes controlled by a voting element that enforces majority-voting logic for fault-free output (i.e., Triple Modular Redundancy (TMR)). Storage elements are also optimally positioned for placement in keeping with SEE-tolerant spacing constraints. Additionally, clock delay insertion (employing either a single global clock or clock triplication) in the TMR specification may introduce useful skew that protects against glitch propagation through the designed device. The resultant layout generated from the TMR configuration may relax constraints imposed on register transfer level (RTL) engineers to make rad-hard designs, as automation introduces TMR storage registers, memory element spacing, and clock delay/triplication with minimal designer input.

Miryala, Sandeep↗

Soft error-mitigating semiconductor design system and associated methods

A soft error-mitigating semiconductor design system and associated methods that tailor circuit design steps to mitigate corruption of data in storage elements (e.g., flip flops) due to Single Events Effects (SEEs). Required storage elements are automatically mapped to triplicated redundant nodes controlled by a voting element that enforces majority-voting logic for fault-free output (i.e., Triple Modular Redundancy (TMR)). Storage elements are also optimally positioned for placement in keeping with SEE-tolerant spacing constraints. Additionally, clock delay insertion (employing either a single global clock or clock triplication) in the TMR specification may introduce useful skew that protects against glitch propagation through the designed device. The resultant layout generated from the TMR configuration may relax constraints imposed on register transfer level (RTL) engineers to make rad-hard designs, as automation introduces TMR storage registers, memory element spacing, and clock delay/triplication with minimal designer input.

Miryala, Sandeep↗

Holographic Optical Data Storage

Although the basic idea may be traced back to the earlier X-ray diffraction studies of Sir W. L. Bragg, the holographic method as we know it was invented by D. Gabor in 1948 as a two-step lensless imaging technique to enhance the resolution of electron microscopy, for which he received the 1971 Nobel Prize in physics. The distinctive feature of holography is the recording of the object phase variations that carry the depth information, which is lost in conventional photography where only the intensity (= squared amplitude) distribution of an object is captured. Since all photosensitive media necessarily respond to the intensity incident upon them, an ingenious way had to be found to convert object phase into intensity variations, and Gabor achieved this by introducing a coherent reference wave along with the object wave during exposure. Gabor's in-line recording scheme, however, required the object in question to be largely transmissive, and could provide only marginal image quality due to unwanted terms simultaneously reconstructed along with the desired wavefront. Further handicapped by the lack of a strong coherent light source, optical holography thus seemed fated to remain just another scientific curiosity, until the field was revolutionized in the early 1960s by some major breakthroughs: the proposition and demonstration of the laser principle, the introduction of off-axis holography, and the invention of volume holography. Consequently, the remainder of that decade saw an exponential growth in research on theory, practice, and applications of holography. Today, holography not only boasts a wide variety of scientific and technical applications (e.g., holographic interferometry for strain, vibration, and flow analysis, microscopy and high-resolution imagery, imaging through distorting media, optical interconnects, holographic optical elements, optical neural networks, three-dimensional displays, data storage, etc.), but has become a prominent am advertising, and security medium as well. The evolution of holographic optical memories has followed a path not altogether different from holography itself, with several cycles of alternating interest over the past four decades. P. J. van Heerden is widely credited for being the first to elucidate the principles behind holographic data storage in a 1963 paper, predicting bit storage densities on the order of 1/lambda(sup 3) with source wavelength lambda - a fantastic capacity of nearly 1 TB/cu cm for visible light! The science and engineering of such a storage paradigm was heavily pursued thereafter, resulting in many novel hologram multiplexing techniques for dense data storage, as well as important advances in holographic recording materials. Ultimately, however, the lack of such enabling technologies as compact laser sources and high performance optical data I/O devices dampened the hopes for the development of a commercial product. After a period of relative dormancy, successful applications of holography in other arenas sparked a renewed interest in holographic data storage in the late 1980s and the early 1990s. Currently, with most of the critical optoelectronic device technologies in place and the quest for an ideal holographic recording medium intensified, holography is once again considered as one of several future data storage paradigms that may answer our constantly growing need for higher-capacity and faster-access memories.

Timucin, Dogan A.↗

MOSFET analog memory circuit achieves long duration signal storage

Memory circuit maintains the signal voltage at the output of an analog signal amplifier when the input signal is interrupted or removed. The circuit uses MOSFET /Metal Oxide Semiconductor Field Effect Transistor/ devices as voltage-controlled switches, triggered by an external voltage-sensing device.

Source record↗

Alphanumeric character generator for oscilloscope

Compact portable alphanumeric display device can be used with any general-purpose externally-triggered oscilloscope without need for Z-axis modulation. Factors limiting size of display are: output line capacitance, read-only memory speed, and persistence of cathode-ray-tube.

Lockerson, D. C.↗

Single event upset vulnerability of selected 4K and 16K CMOS static RAM's

Upset thresholds for bulk CMOS and CMOS/SOS RAMS were deduced after bombardment of the devices with 140 MeV Kr, 160 MeV Ar, and 33 MeV O beams in a cyclotron. The trials were performed to test prototype devices intended for space applications, to relate feature size to the critical upset charge, and to check the validity of computer simulation models. The tests were run on 4 and 1 K memory cells with 6 transistors, in either hardened or unhardened configurations. The upset cross sections were calculated to determine the critical charge for upset from the soft errors observed in the irradiated cells. Computer simulations of the critical charge were found to deviate from the experimentally observed variation of the critical charge as the square of the feature size. Modeled values of series resistors decoupling the inverter pairs of memory cells showed that above some minimum resistance value a small increase in resistance produces a large increase in the critical charge, which the experimental data showed to be of questionable validity unless the value is made dependent on the maximum allowed read-write time.

Kolasinski, W. A.↗

Application of digital image analysis techniques to antimisting fuel spray characterization

Pulsed ruby laser sheet illumination of the spray is used for the initial recording of data on very-high-resolution photographic film. The digitization of mosaic elements is effected with a vidicon and video digitizer whose output is stored in computer RAM memory for processing. Highly nonspherical elements and a broad range of drop diameters (8-2000 microns) resulting from the unusual rheological properties of the fuel-additive system are accommodated by the device configuration and algorithms. It is found that the generation of two-dimensional images by means of scattered light also eliminates errors resulting from variations in the index of refraction and from the submicron scattering sites that are often present within the modified fuel. No a priori information on the drop size distribution or on the system response to various drop sizes is required.

Fleeter, R.↗

Information storage at the molecular level - The design of a molecular shift register memory

The control of electron transfer rates is discussed and a molecular shift register memory at the molecular level is described. The memory elements are made up of molecules which can exist in either an oxidized or reduced state and the bits can be shifted between the cells with photoinduced electron transfer reactions. The device integrates designed molecules onto a VLSI substrate. A control structure to modify the flow of information along a shift register is indicated schematically.

Beratan, David N.↗