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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 919 records · Page 51
All sourcesNASA NTRSDOE OSTI
NASA NTRS1988

The design of radiation-hardened ICs for space - A compendium of approaches

Several technologies, including bulk and epi CMOS, CMOS/SOI-SOS (silicon-on-insulator-silicon-on-sapphire), CML (current-mode logic), ECL (emitter-coupled logic), analog bipolar (JI, single-poly DI, and SOI) and GaAs E/D (enhancement/depletion) heterojunction MESFET, are discussed. The discussion includes the direct effects of space radiation on microelectronic materials and devices, how these effects are evidenced in circuit and device design parameter variations, the particular effects of most significance to each functional class of circuit, specific techniques for hardening high-speed circuits, design examples for integrated systems, including operational amplifiers and A/D (analog/digital) converters, and the computer simulation of radiation effects on microelectronic ISs.

Kerns, Sherra E.↗
NASA NTRS1993

Delay analysis of combinations of pass transistors and classical logic gates

Combinations of pass transistors and logic gates driving nonlinear capacitive loads are analyzed for the presence of characteristics that will permit easier and more accurate digital logic simulation. Accurate time delay models are developed by studying the nature of the response of simplified circuit models to variations of input waveform rise and fall times and output loading. The nonlinear effects of the CMOS logic devices are minimized to permit easier interpretation of the influence of nonlinear capacitive loads. The performance of a CMOS inverter with a complex nonlinear load consisting of a pass transistor that separates a range of capacitances is compared to the same inverter circuit with a linear capacitive load to develop an understanding of the unique requirements of modeling a nonlinear system. Several methods of modeling the delay of CMOS circuits are reviewed, and a multi-parameter linear model is described. General guidelines for designing CMOS circuits with complex load circuits are developed, emphasizing that the circuit output rise delays and fall delays must be separately analyzed.

Gibson, Jonathan S.↗
NASA NTRS2002

Design of a High-Energy, Two-Stage Pulsed Plasma Thruster

Design details of a proposed high-energy (approx. 50 kJ/pulse), two-stage pulsed plasma thruster are presented. The long-term goal of this project is to develop a high-power (approx. 500 kW), high specific impulse (approx. 7500 s), highly efficient (approx. 50%),and mechanically simple thruster for use as primary propulsion in a high-power nuclear electric propulsion system. The proposed thruster (PRC-PPT1) utilizes a valveless, liquid lithium-fed thermal plasma injector (first stage) followed by a high-energy pulsed electromagnetic accelerator (second stage). A numerical circuit model coupled with one-dimensional current sheet dynamics, as well as a numerical MHD simulation, are used to qualitatively predict the thermal plasma injection and current sheet dynamics, as well as to estimate the projected performance of the thruster. A set of further modelling efforts, and the experimental testing of a prototype thruster, is suggested to determine the feasibility of demonstrating a full scale high-power thruster.

Markusic, T. E.↗
NASA NTRS2014

NASA Numerical and Experimental Evaluation of UTRC Low Emissions Injector

Computational and experimental analyses of a PICS-Pilot-In-Can-Swirler technology injector, developed by United Technologies Research Center (UTRC) are presented. NASA has defined technology targets for near term (called "N+1", circa 2015), midterm ("N+2", circa 2020) and far term ("N+3", circa 2030) that specify realistic emissions and fuel efficiency goals for commercial aircraft. This injector has potential for application in an engine to meet the Pratt & Whitney N+3 supersonic cycle goals, or the subsonic N+2 engine cycle goals. Experimental methods were employed to investigate supersonic cruise points as well as select points of the subsonic cycle engine; cruise, approach, and idle with a slightly elevated inlet pressure. Experiments at NASA employed gas analysis and a suite of laser-based measurement techniques to characterize the combustor flow downstream from the PICS dump plane. Optical diagnostics employed for this work included Planar Laser-Induced Fluorescence of fuel for injector spray pattern and Spontaneous Raman Spectroscopy for relative species concentration of fuel and CO2. The work reported here used unheated (liquid) Jet-A fuel for all fuel circuits and cycle conditions. The initial tests performed by UTRC used vaporized Jet-A to simulate the expected supersonic cruise condition, which anticipated using fuel as a heat sink. Using the National Combustion Code a PICS-based combustor was modeled with liquid fuel at the supersonic cruise condition. All CFD models used a cubic non-linear k-epsilon turbulence wall functions model, and a semi-detailed Jet-A kinetic mechanism based on a surrogate fuel mixture. Two initial spray droplet size distribution and spray cone conditions were used: (1) an initial condition (Lefebvre) with an assumed Rosin-Rammler distribution, and 7 degree Solid Spray Cone; and (2) the Boundary Layer Stripping (BLS) primary atomization model giving the spray size distribution and directional properties. Contour and line plots are shown in comparison with experimental data (where this data is available) for flow velocities, fuel, and temperature distribution. The CFD results are consistent with experimental observations for fuel distribution and vaporization. Analysis of gas sample results, using a previously-developed NASA NOx correlation, indicates that for sea-level takeoff, the PICS configuration is predicted to deliver an EINOx value of about three for the targeted supersonic aircraft. Emissions results at supersonic cruise conditions show potential for meeting the NASA goals with liquid fuel.

Hicks, Yolanda R.↗
NASA NTRS2014

NASA Numerical and Experimental Evaluation of UTRC Low Emissions Injector

Computational and experimental analyses of a PICS-Pilot-In-Can-Swirler technology injector, developed by United Technologies Research Center (UTRC) are presented. NASA has defined technology targets for near term (called "N+1", circa 2015), midterm ("N+2", circa 2020) and far term ("N+3", circa 2030) that specify realistic emissions and fuel efficiency goals for commercial aircraft. This injector has potential for application in an engine to meet the Pratt & Whitney N+3 supersonic cycle goals, or the subsonic N+2 engine cycle goals. Experimental methods were employed to investigate supersonic cruise points as well as select points of the subsonic cycle engine; cruise, approach, and idle with a slightly elevated inlet pressure. Experiments at NASA employed gas analysis and a suite of laser-based measurement techniques to characterize the combustor flow downstream from the PICS dump plane. Optical diagnostics employed for this work included Planar Laser-Induced Fluorescence of fuel for injector spray pattern and Spontaneous Raman Spectroscopy for relative species concentration of fuel and CO2. The work reported here used unheated (liquid) Jet-A fuel for all fuel circuits and cycle conditions. The initial tests performed by UTRC used vaporized Jet-A to simulate the expected supersonic cruise condition, which anticipated using fuel as a heat sink. Using the National Combustion Code a PICS-based combustor was modeled with liquid fuel at the supersonic cruise condition. All CFD models used a cubic non-linear k-epsilon turbulence wall functions model, and a semi-detailed Jet-A kinetic mechanism based on a surrogate fuel mixture. Two initial spray droplet size distribution and spray cone conditions were used: 1) an initial condition (Lefebvre) with an assumed Rosin-Rammler distribution, and 7 degree Solid Spray Cone; and 2) the Boundary Layer Stripping (BLS) primary atomization model giving the spray size distribution and directional properties. Contour and line plots are shown in comparison with experimental data (where this data is available) for flow velocities, fuel, and temperature distribution. The CFD results are consistent with experimental observations for fuel distribution and vaporization. Analysis of gas sample results, using a previously-developed NASA NOx correlation, indicates that for sea-level takeoff, the PICS configuration is predicted to deliver an EINOx value of about 3 for the targeted supersonic aircraft. Emissions results at supersonic cruise conditions show potential for meeting the NASA goals with liquid fuel.

Hicks, Yolanda R.↗
NASA NTRSDate not supplied

Hardware-Efficient Quantum Optimization Layered Algorithms and Experiments

Quantum optimization algorithms, such as QAOA, that implement parametrized stochastic optimization solvers attempt to identify low-energy solutions of Ising systems by exploiting available quantum effects in noisy-intermediate scale machines. Engineering a well-performing parametrized quantum optimization circuit is indeed an exercise in balancing the trade-off between expressivity and implementation complexity. We show that, for MaxCut QAOA circuits defined on native hardware topology (Rigetti’s Aspen Quantum Processors), error-mitigation techniques recover simulated features of the noiseless theory. Moreover, we explore a design space for QAOA-like ansatze that perform well in theory as well as in hardware for fully-connected problems. We also discuss how efficient coherence and entanglement detection methods that could be coupled with quantum optimization experiments require only linear overhead in benchmarking time.

quantum computing↗
DOE OSTI2021

Determining quantum phase diagrams of topological Kitaev-inspired models on NISQ quantum hardware

Topological protection is employed in fault-tolerant error correction and in developing quantum algorithms with topological qubits. But, topological protection intrinsic to models being simulated , also robustly protects calculations, even on NISQ hardware. We leverage it by simulating Kitaev-inspired models on IBM quantum computers and accurately determining their phase diagrams. This requires constructing conventional quantum circuits for Majorana braiding to prepare the ground states of Kitaev-inspired models. The entanglement entropy is then measured to calculate the quantum phase boundaries. We show how maintaining particle-hole symmetry when sampling through the Brillouin zone is critical to obtaining high accuracy. This work illustrates how topological protection intrinsic to a quantum model can be employed to perform robust calculations on NISQ hardware, when one measures the appropriate protected quantum properties. It opens the door for further simulation of topological quantum models on quantum hardware available today.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2021

Quantum Solver of Contracted Eigenvalue Equations for Scalable Molecular Simulations on Quantum Computing Devices

The accurate computation of ground and excited states of many-fermion quantum systems is one of the most consequential, contemporary challenges in the physical and computational sciences whose solution stands to benefit significantly from the advent of quantum computing devices. Existing methodologies using phase estimation or variational algorithms have potential drawbacks such as deep circuits requiring substantial error correction or non-trivial high-dimensional classical optimization. In this work, we introduce a quantum solver of contracted eigenvalue equations, the quantum analogue of classical methods for the energies and reduced density matrices of ground and excited states. The solver does not require deep circuits or difficult classical optimization and achieves an exponential speed-up over its classical counterpart. We demonstrate the algorithm though computations on both a quantum simulator and two IBM quantum processing units.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2024

Sachdev-Ye-Kitaev model on a noisy quantum computer

Here we study the SYK model -- an important toy model for quantum gravity on IBM's superconducting qubit quantum computers. By using a graph-coloring algorithm to minimize the number of commuting clusters of terms in the qubitized Hamiltonian, we find the gate complexity of the time evolution using the first-order product formula for N Majorana fermions is $\mathscr{O}$(N 5 J 2 t 2 /ε) where J is the dimensionful coupling parameter, t is the evolution time, and ε is the desired precision. With this improved resource requirement, we perform the time evolution for N=6,8 with maximum two-qubit circuit depth of 343. We perform different error mitigation schemes on the noisy hardware results and find good agreement with the exact diagonalization results on classical computers and noiseless simulators. In particular, we compute return probability after time t and out-of-time order correlators (OTOC) which is a standard observable of quantifying the chaotic nature of quantum systems.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
NASA NTRS1994

QPPM receiver for free-space laser communications

A prototype receiver developed at NASA Lewis Research Center for direct detection and demodulation of quaternary pulse position modulated (QPPM) optical carriers is described. The receiver enables dual-channel communications at 325-Megabits per second (Mbps) per channel. The optical components of the prototype receiver are briefly described. The electronic components, comprising the analog signal conditioning, slot clock recovery, matched filter and maximum likelihood data recovery circuits are described in more detail. A novel digital symbol clock recovery technique is presented as an alternative to conventional analog methods. Simulated link degradations including noise and pointing-error induced amplitude variations are applied. The bit-error-rate performance of the electronic portion of the prototype receiver under varying optical signal-to-noise power ratios is found to be within 1.5-dB of theory. Implementation of the receiver as a hybrid of analog and digital application specific integrated circuits is planned.

Budinger, J. M.↗
NASA NTRS1975

The 7.5 kW solar array simulator

A high power solar array simulator capable of providing the input power to simultaneously operate two 30 cm diameter ion thruster power processors was designed, fabricated, and tested. The maximum power point is set to between 150 and 7500 watts representing an open circuit voltage from 50 to 300 volts and a short circuit current from 4 to 36 amps. Illuminated solar cells are used as the control element to provide a true solar cell characteristic and permit the option of simulating changes in this characteristic due to variations in solar intensity and/or temperature of the solar array. This is accomplished by changing the illumination and/or temperature of the control cells. The response of the output to a step change in load closely approximates that of an actual solar array.

Robson, R. R.↗
NASA NTRS2016

Open Source Radiation Hardened by Design Technology

The proposed technology allows use of the latest microcircuit technology with lowest power and fastest speed, with minimal delay and engineering costs, through new Radiation Hardened by Design (RHBD) techniques that do not require extensive process characterization, technique evaluation and re-design at each Moore's Law generation. The separation of critical node groups is explicitly parameterized so it can be increased as microcircuit technologies shrink. The technology will be open access to radiation tolerant circuit vendors. INNOVATION: This technology would enhance computation intensive applications such as autonomy, robotics, advanced sensor and tracking processes, as well as low power applications such as wireless sensor networks. OUTCOME / RESULTS: 1) Simulation analysis indicates feasibility. 2)Compact voting latch 65 nanometer test chip designed and submitted for fabrication -7/2016. INFUSION FOR SPACE / EARTH: This technology may be used in any digital integrated circuit in which a high level of resistance to Single Event Upsets is desired, and has the greatest benefit outside low earth orbit where cosmic rays are numerous.

Shuler, Robert↗
NASA NTRS1998

FPGA Based Reconfigurable ATM Switch Test Bed

Various issues associated with "FPGA Based Reconfigurable ATM Switch Test Bed" are presented in viewgraph form. Specific topics include: 1) Network performance evaluation; 2) traditional approaches; 3) software simulation; 4) hardware emulation; 5) test bed highlights; 6) design environment; 7) test bed architecture; 8) abstract sheared-memory switch; 9) detailed switch diagram; 10) traffic generator; 11) data collection circuit and user interface; 12) initial results; and 13) the following conclusions: Advances in FPGA make hardware emulation feasible for performance evaluation, hardware emulation can provide several orders of magnitude speed-up over software simulation; due to the complexity of hardware synthesis process, development in emulation is much more difficult than simulation and requires knowledge in both networks and digital design.

Chu, Pong P.↗
DOE OSTI2024

Simulating dirty bosons on a quantum computer

Abstract Quantum computers hold the potential to unlock new discoveries in complex quantum systems by enabling the simulation of physical systems that have heretofore been impossible to implement on classical computers due to intractability. A system of particular interest is that of dirty bosons, whose physics highlights the intriguing interplay of disorder and interactions in quantum systems, playing a central role in describing, for instance, ultracold gases in a random potential, doped quantum magnets, and amorphous superconductors. Here, we demonstrate how quantum computers can be used to elucidate the physics of dirty bosons in one and two dimensions. Specifically, we explore the disorder-induced delocalized-to-localized transition using adiabatic state preparation. In one dimension, the quantum circuits can be compressed to small enough depths for execution on currently available quantum computers. In two dimensions, the compression scheme is no longer applicable, thereby requiring the use of large-scale classical state vector simulations to emulate quantum computer performance. In addition, simulating interacting bosons via emulation of a noisy quantum computer allowed us to study the effect of quantum hardware noise on the physical properties of the simulated system. Our results suggest that scaling laws control how noise modifies observables versus its strength, the circuit depth, and the number of qubits. Moreover, we observe that noise impacts the delocalized and localized phases differently. A better understanding of how noise alters the observed properties of the simulated system is essential for leveraging near-term quantum devices for simulation of dirty bosons, and indeed for condensed matter systems in general.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2025

Quantum State Transfer between Heterogeneous 3D QPUs

We present detailed analyses and microwave simulations of a quantum interconnect architecture that couples two distinct three-dimensional quantum processing units (QPUs): (i) a two-cell superconducting radio-frequency (SRF) cavity coupled to multiple transmon qubits and (ii) a waveguide-based cavity hosting a planar circuit with transmons and resonators. The modules are linked via a low-loss superconducting coaxial cable, which serves as a quantum bus. Finite-element electromagnetic simulations are performed to optimize coupling strengths and mode frequencies for high-fidelity quantum state transfer between cavities. These simulation results provide a comprehensive blueprint for the experimental realization of a flexible quantum interconnect architecture, coupling heterogeneous QPUs.

Yaker, Joey [Fermilab]↗
NASA NTRS1998

Global Qualitative Flow-Path Modeling for Local State Determination in Simulation and Analysis

For qualitative modeling and analysis, a general qualitative abstraction of power transmission variables (flow and effort) for elements of flow paths includes information on resistance, net flow, permissible directions of flow, and qualitative potential is discussed. Each type of component model has flow-related variables and an associated internal flow map, connected into an overall flow network of the system. For storage devices, the implicit power transfer to the environment is represented by "virtual" circuits that include an environmental junction. A heterogeneous aggregation method simplifies the path structure. A method determines global flow-path changes during dynamic simulation and analysis, and identifies corresponding local flow state changes that are effects of global configuration changes. Flow-path determination is triggered by any change in a flow-related device variable in a simulation or analysis. Components (path elements) that may be affected are identified, and flow-related attributes favoring flow in the two possible directions are collected for each of them. Next, flow-related attributes are determined for each affected path element, based on possibly conflicting indications of flow direction. Spurious qualitative ambiguities are minimized by using relative magnitudes and permissible directions of flow, and by favoring flow sources over effort sources when comparing flow tendencies. The results are output to local flow states of affected components.

Malin, Jane T.↗
NASA NTRS1993

A formal language for the specification and verification of synchronous and asynchronous circuits

A formal hardware description language for the intended application of verifiable asynchronous communication is described. The language is developed within the logical framework of the Nqthm system of Boyer and Moore and is based on the event-driven behavioral model of VHDL, including the basic VHDL signal propagation mechanisms, the notion of simulation deltas, and the VHDL simulation cycle. A core subset of the language corresponds closely with a subset of VHDL and is adequate for the realistic gate-level modeling of both combinational and sequential circuits. Various extensions to this subset provide means for convenient expression of behavioral circuit specifications.

Russinoff, David M.↗
DOE OSTI2025

Intermediate-temperature topological Uhlmann phase on IBM quantum computers

A spin-1 system can exhibit an intermediate-temperature topological regime with a quantized Uhlmann phase sandwiched by topologically trivial low- and high-temperature regimes. We present a quantum circuit consisting of system and ancilla qubits plus a probe qubit which prepares an initial state corresponding to the purified state of a spin-1 system at finite temperature, evolves the system according to the Uhlmann process, and measures the Uhlmann phase via expectation values of the probe qubit. Although classical simulations suggest the quantized Uhlmann phase is observable on International Business Machines (IBM’s) noisy intermediate-scale quantum (NISQ) computers, an implementation of the circuit without any optimization exceeds the gate count for the error budget and results in unresolved signals. Through a series of optimization with Qiskit and BQSKit, the gate count can be substantially reduced, making the jumps of the Uhlmann phase more visible. A recent hardware upgrade of IBM quantum computers further improves the signals and leads to a clearer demonstration of interesting finite-temperature topological phenomena on NISQ hardware.

Mastandrea, Christopher [Univ. of California, Merc↗