SEARCH · Engineering Papers

Results for “CMOS”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

SourceResearch connectionFrom yearThrough year

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 919 records · Page 51

All sources NASA NTRS DOE OSTI

NASA NTRS2000

MEMS Reliability Assurance Activities at JPL

An overview of Microelectromechanical Systems (MEMS) reliability assurance and qualification activities at JPL is presented along with the a discussion of characterization of MEMS structures implemented on single crystal silicon, polycrystalline silicon, CMOS, and LIGA processes. Additionally, common failure modes and mechanisms affecting MEMS structures, including radiation effects, are discussed. Common reliability and qualification practices contained in the MEMS Reliability Assurance Guideline are also presented.

Kayali, S.↗

NASA NTRS1998

Toward Evolvable Hardware Chips: Experiments with a Programmable Transistor Array

Evolvable Hardware is reconfigurable hardware that self-configures under the control of an evolutionary algorithm. We search for a hardware configuration can be performed using software models or, faster and more accurate, directly in reconfigurable hardware. Several experiments have demonstrated the possibility to automatically synthesize both digital and analog circuits. The paper introduces an approach to automated synthesis of CMOS circuits, based on evolution on a Programmable Transistor Array (PTA). The approach is illustrated with a software experiment showing evolutionary synthesis of a circuit with a desired DC characteristic. A hardware implementation of a test PTA chip is then described, and the same evolutionary experiment is performed on the chip demonstrating circuit synthesis/self-configuration directly in hardware.

Stoica, Adrian↗

NASA NTRS2000

Flexible All-Digital Receiver for Bandwidth Efficient Modulations

An all-digital high data rate parallel receiver architecture developed jointly by Goddard Space Flight Center and the Jet Propulsion Laboratory is presented. This receiver utilizes only a small number of high speed components along with a majority of lower speed components operating in a parallel frequency domain structure implementable in CMOS, and can currently process up to 600 Mbps with standard QPSK modulation. Performance results for this receiver for bandwidth efficient QPSK modulation schemes such as square-root raised cosine pulse shaped QPSK and Feher's patented QPSK are presented, demonstrating the flexibility of the receiver architecture.

Gray, Andrew↗

NASA NTRS2000

8-9 and 14-15 Micron Two-Color 640x486 GaAs/AlGaAs Quantum Well Infrared Photodetector (QWIP) Focal Plane Array Camera

An optimized long-wavelength two-color Quantum Well Infrared Photodetector (QWIP) device structure has been designed. This device structure was grown on a three inch semi-insulating GaAs substrate by molecular beam epitaxy (MBE). This wafer was processed into several 640x486 format monolithically integrated 8-9 and 14-15 micron two color (or dual wavelength) QWIP focal plane arrays (FPAs). These FPAs were then hybridized to 640x486 silicon CMOS readout multiplexers. A thinned (i.e., substrate removed) FPA hybrid was integrated into a liquid helium cooled dewar to perform electrical and optical characterization and to demonstrate simultaneous two-color imagery. The 8-9 micron detectors in the FPA have shown background limited performance (BLIP) at 70 K operating temperature, at 300 K background with f/2 cold stop. The 14-15 micron detectors of the FPA have reached BLIP at 40 K operating temperature at the same background conditions. In this presentation we discuss the performance of this long-wavelength dualband QWIP FPA in quantum efficiency, detectivity, noise equivalent temperature difference (NEAT), uniformity, and operability.

Gunapala, S. D.↗

NASA NTRS1999

Thin Film Li Ion Microbatteries for NASA Applications

Rechargeable thin film microbatteries have recently become the topic of widespread research for use in low power applications such as battery-backed CMOS memory, miniaturized implantable medical devices and smart cards. In particular, the Center for Integrated Space Microsystems (CISM) at NASA's Jet Propulsion Laboratory has interest in applying this technology for secondary power systems in miniaturized satellites, microsensors, microactuators and other remote MEMS applications. The general requirements of the microbatteries for these applications are high specific energy, wide range of temperature stability. low self-discharge rate, and flexibility of cell design. The thin film Li ion materials system using LiCoO2(LiPO(x)N(1-x))SnO is expected to fulfill these requirements.

West, W. C.↗

NASA NTRS2001

Low-Temperature Spacecraft: Challenges/Opportunities

Imagine sending a spacecraft into deep space that operates at the ambient temperature of its environment rather than hundreds of degrees Kelvin warmer. The average temperature of a spacecraft warmed only by the sun drops from 279 K near the Earth's orbit to 90 K near the orbit of Saturn, and to 44 K near Pluto's orbit. At present, deep space probes struggle to maintain an operating temperature near 300 K for the onboard electronics. To warm the electronics without consuming vast amounts of electrical energy, radioisotope heater units (RHUs) are used in vast numbers. Unfortunately, since RHU are always 'on', an active thermal management system is required to reject the excess heat. A spacecraft designed to operate at cryogenic temperatures and shielded from the sun by a large communication dish or solar cell array could be less complex, lighter, and cheaper than current deep space probes. Before a complete low-temperature spacecraft becomes a reality, there are several challenges to be met. Reliable cryogenic power electronics is one of the major challenges. The Low-Temperature Power Electronics Research Group at NASA Glenn Research Center (GRC) has demonstrated the ability of some commercial off the shelf power electronic components to operate at temperatures approaching that of liquid nitrogen (77 K). Below 77 K, there exists an opportunity for the development of reliable semiconductor power switching technologies other than bulk silicon CMOS. This paper will report on the results of NASA GRC's Low-Temperature Power Electronics Program and discuss the challenges to (opportunities for) the creation of a low-temperature spacecraft.

Dickman, J. E.↗

NASA NTRS2001

An Active Substrate Driver for Enabling Mixed-Voltage SOI Systems-On-A-Chip

The current trend for space application systems is towards fully integrated systems-on-a-chip. To facilitate this drive, high-voltage transistors must reside on the same substrate as low-voltage transistors. These systems must also be radiation tolerant, particularly for space missions such as the Europa Lander and Titan Explorer. SOI CMOS technology offers high levels of radiation hardness. As a result, a high-voltage lateral MOSFET has been developed in a partially-depleted (PD) SOI technology. Utilizing high voltages causes a parasitic transistor to have non-negligible effects on a circuit. Several circuit architectures have been used to compensate for the radiation induced threshold voltage shift of the parasitic back-channel transistor. However, a new architecture for high-voltage systems must be employed to bias the substrate to voltage levels insuring all parasitic transistors remain off. An active substrate driver has been developed to accomplish task. Additional information is contained in the original extended abstract.

Jackson, S. A.↗

NASA NTRS2001

Electrically Isolating Thermally Coupled Device for Noise Suppression of Circuits in Deep Space

Mixed mode rad hard avionics Systems on a Chip (SoC) designed for deep space applications such as Europa orbiters and Europa Landers will require data isolation circuits to block noise. This paper presents the simulation performance for a novel rad hard SOI CMOS compatible thermal transducer used for on-chip data isolation in SoC. The research presented involves the use of commercially available computer aided design tools to model the transient electrothermal behavior of the transducer. Both one- and two-dimensional analyses of a prototype thermal transducer were performed. Results indicate that thermal-based data isolator technology can pass a data bit in under a microsecond and, as a measurement of feasibility, I(exp 2)C bus specifications can be met.

Mantooth, A.↗

NASA NTRS2001

Electronics for Extreme Environments

Most of the NASA missions involve extreme environments comprising radiation and low or high temperatures. Current practice of providing friendly ambient operating environment to electronics costs considerable power and mass (for shielding). Immediate missions such as the Europa orbiter and lander and Mars landers require the electronics to perform reliably in extreme conditions during the most critical part of the mission. Some other missions planned in the future also involve substantial surface activity in terms of measurements, sample collection, penetration through ice and crust and the analysis of samples. Thus it is extremely critical to develop electronics that could reliably operate under extreme space environments. Silicon On Insulator (SOI) technology is an extremely attractive candidate for NASA's future low power and high speed electronic systems because it offers increased transconductance, decreased sub-threshold slope, reduced short channel effects, elimination of kink effect, enhanced low field mobility, and immunity from radiation induced latch-up. A common belief that semiconductor devices function better at low temperatures is generally true for bulk devices but it does not hold true for deep sub-micron SOI CMOS devices with microscopic device features of 0.25 micrometers and smaller. Various temperature sensitive device parameters and device characteristics have recently been reported in the literature. Behavior of state of the art technology devices under such conditions needs to be evaluated in order to determine possible modifications in the device design for better performance and survivability under extreme environments. Here, we present a unique approach of developing electronics for extreme environments to benefit future NASA missions as described above. This will also benefit other long transit/life time missions such as the solar sail and planetary outposts in which electronics is out open in the unshielded space at the ambient space temperatures and always exposed to radiation. Additional information is contained in the original extended abstract.

Patel, J. U.↗

NASA NTRS2001

Micro-Power Sources Enabling Robotic Outpost Based Deep Space Exploration

Robotic outpost based exploration represents a fundamental shift in mission design from conventional, single spacecraft missions towards a distributed risk approach with many miniaturized semi-autonomous robots and sensors. This approach can facilitate wide-area sampling and exploration, and may consist of a web of orbiters, landers, or penetrators. To meet the mass and volume constraints of deep space missions such as the Europa Ocean Science Station, the distributed units must be fully miniaturized to fully leverage the wide-area exploration approach. However, presently there is a dearth of available options for powering these miniaturized sensors and robots. This group is currently examining miniaturized, solid state batteries as candidates to meet the demand of applications requiring low power, mass, and volume micro-power sources. These applications may include powering microsensors, battery-backing rad-hard CMOS memory and providing momentary chip back-up power. Additional information is contained in the original extended abstract.

West, W. C.↗

NASA NTRS2001

Coupling Between Microstrip Lines Embedded in Polyimide Layers for 3D-MMICs on Si

Three-dimensional circuits built upon multiple layers of polyimide are required for constructing Si/SiGe monolithic microwave/millimeter-wave integrated circuits on CMOS (low resistivity) Si wafers. However, the closely spaced transmission lines are susceptible to high levels of coupling, which degrades circuit performance. In this paper, Finite Difference Time Domain (FDTD) analysis and measured characteristics of novel shielding structures that significantly reduce coupling between embedded microstrip lines are presented.

Ponchak, George E.↗

NASA NTRS2001

Simulation of MEMS for the Next Generation Space Telescope

The NASA Goddard Space Flight Center (GSFC) is developing optical micro-electromechanical system (MEMS) components for potential application in Next Generation Space Telescope (NGST) science instruments. In this work, we present an overview of the electro-mechanical simulation of three MEMS components for NGST, which include a reflective micro-mirror array and transmissive microshutter array for aperture control for a near infrared (NIR) multi-object spectrometer and a large aperture MEMS Fabry-Perot tunable filter for a NIR wide field camera. In all cases the device must operate at cryogenic temperatures with low power consumption and low, complementary metal oxide semiconductor (CMOS) compatible, voltages. The goal of our simulation efforts is to adequately predict both the performance and the reliability of the devices during ground handling, launch, and operation to prevent failures late in the development process and during flight. This goal requires detailed modeling and validation of complex electro-thermal-mechanical interactions and very large non-linear deformations, often involving surface contact. Various parameters such as spatial dimensions and device response are often difficult to measure reliably at these small scales. In addition, these devices are fabricated from a wide variety of materials including surface micro-machined aluminum, reactive ion etched (RIE) silicon nitride, and deep reactive ion etched (DRIE) bulk single crystal silicon. The above broad set of conditions combine to be a formidable challenge for space flight qualification analysis. These simulations represent NASA/GSFC's first attempts at implementing a comprehensive strategy to address complex MEMS structures.

Mott, Brent↗

NASA NTRS2001

Coupling Between Microstrip Lines with Finite Width Ground Plane Embedded in Polyimide Layers for 3D-MMICs on Si

Three-dimensional circuits built upon multiple layers of polyimide are required for constructing Si/SiGe monolithic microwave/millimeter-wave integrated circuits on complementary metal oxide semiconductor (CMOS) (low resistivity) Si wafers. Thin film microstrip lines (TFMS) with finite width ground planes embedded in the polyimide are often used. However, the closely spaced TFMS lines are susceptible to high levels of coupling, which degrades circuit performance. In this paper, Finite Difference Time Domain (FDTD) analysis and experimental measurements are used to show that the ground planes must be connected by via holes to reduce coupling in both the forward and backward directions.

Ponchak, George E.↗

NASA NTRS2001

Radiation Response of Emerging FeRAM Technology

The test results of measurements performed on two different sizes of ferroelectric random access memory (FeRAM) suggest the degradation is due to the low radiation tolerance of sense amplifiers and reference voltage generators which are based on commercial complementary metal oxide semiconductor (CMOS) technology. This paper presents total ionizing dose (TID) testing of 64Kb Ramtron FM1608 and 256Kb Ramtron FM1808.

Nguyen, D. N.↗

NASA NTRS2001

Future Development of Dense Ferroelectric Memories for Space Applications

The availability of high density, radiation tolerant, nonvolatile memories is critical for space applications. Ferroelectric memories, when fabricated with radiation hardened complementary metal oxide semiconductors (CMOS), can be manufactured and packaged to provide high density replacements for Flash memory, which is not radiation tolerant. Previous work showed ferroelectric memory cells to be resistant to single event upsets and proton irradiation, and ferroelectric storage capacitors to be resistant to neutron exposure. In addition to radiation hardness, the fast programming times, virtually unlimited endurance, and low voltage, low power operation make ferroelectric memories ideal for space missions. Previously, a commercial double level metal 64-kilobit ferroelectric memory was presented. Although the capabilities of radiation hardened wafer fabrication facilities lag behind those of the most modern commercial wafer fabrication facilities, several paths to achieving radiation tolerant, dense ferroelectric memories are emerging. Both short and long term solutions are presented in this paper. Although worldwide major semiconductor companies are introducing commercial ferroelectric memories, funding limitations must be overcome to proceed with the development of high density, radiation tolerant ferroelectric memories.

Philpy, Stephen C.↗

NASA NTRS2001

Flight Computer Design for the Space Technology 5 (ST-5) Mission

As part of NASA's New Millennium Program, the Space Technology 5 mission will validate a variety of technologies for nano-satellite and constellation mission applications. Included are: a miniaturized and low power X-band transponder, a constellation communication and navigation transceiver, a cold gas micro-thruster, two different variable emittance (thermal) controllers, flex cables for solar array power collection, autonomous groundbased constellation management tools, and a new CMOS ultra low-power, radiation-tolerant, +0.5 volt logic technology. The ST-5 focus is on small and low-power. A single-processor, multi-function flight computer will implement direct digital and analog interfaces to all of the other spacecraft subsystems and components. There will not be a distributed data system that uses a standardized serial bus such as MIL-STD-1553 or MIL-STD-1773. The flight software running on the single processor will be responsible for all real-time processing associated with: guidance, navigation and control, command and data handling (C&DH) including uplink/downlink, power switching and battery charge management, science data analysis and storage, intra-constellation communications, and housekeeping data collection and logging. As a nanosatellite trail-blazer for future constellations of up to 100 separate space vehicles, ST-5 will demonstrate a compact (single board), low power (5.5 watts) solution to the data acquisition, control, communications, processing and storage requirements that have traditionally required an entire network of separate circuit boards and/or avionics boxes. In addition to the New Millennium technologies, other major spacecraft subsystems include the power system electronics, a lithium-ion battery, triple-junction solar cell arrays, a science-grade magnetometer, a miniature spinning sun sensor, and a propulsion system.

Speer, David↗

NASA NTRS2002

Mosad and Stream Vision For A Telerobotic, Flying Camera System

Two full custom camera systems using the Multiplexed OverSample Analog to Digital (MOSAD) conversion technology for visible light sensing were built and demonstrated. They include a photo gate sensor and a photo diode sensor. The system includes the camera assembly, driver interface assembly, a frame stabler board with integrated decimeter and Windows 2000 compatible software for real time image display. An array size of 320X240 with 16 micron pixel pitch was developed for compatibility with 0.3 inch CCTV optics. With 1.2 micron technology, a 73% fill factor was achieved. Noise measurements indicated 9 to 11 bits operating with 13.7 bits best case. Power measured under 10 milliwatts at 400 samples per second. Nonuniformity variation was below noise floor. Pictures were taken with different cameras during the characterization study to demonstrate the operable range. The successful conclusion of this program demonstrates the utility of the MOSAD for NASA missions, providing superior performance over CMOS and lower cost and power consumption over CCD. The MOSAD approach also provides a path to radiation hardening for space based applications.

Mandl, William↗

NASA NTRS2000

Implementation of Ferroelectric Memories for Space Applications

Ferroelectric random access semiconductor memories (FeRAMs) are an ideal nonvolatile solution for space applications. These memories have low power performance, high endurance and fast write times. By combining commercial ferroelectric memory technology with radiation hardened CMOS technology, nonvolatile semiconductor memories for space applications can be attained. Of the few radiation hardened semiconductor manufacturers, none have embraced the development of radiation hardened FeRAMs, due a limited commercial space market and funding limitations. Government funding may be necessary to assure the development of radiation hardened ferroelectric memories for space applications.

Philpy, Stephen C.↗