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All sources NASA NTRS DOE OSTI

DOE OSTI2018

Optimized pulsed write schemes improve linearity and write speed for low-power organic neuromorphic devices

Neuromorphic devices are becoming increasingly appealing as efficient emulators of neural networks used to model real world problems. However, no hardware to date has demonstrated the necessary high accuracy and energy efficiency gain over CMOS in both training via backpropagation and in read via vector matrix multiplication. Such shortcomings are due to device non-idealities, particularly asymmetric conductance tuning in response to uniform voltage pulse inputs. Here, by formulating a general circuit model for capacitive ion-exchange neuromorphic devices, we show that asymmetric nonlinearity in organic electrochemical neuromorphic devices (ENODes) can be suppressed by an appropriately chosen write scheme. Simulations based upon our model suggest that a nonlinear write-selector could reduce the switching voltage and energy, enabling analog tuning via a continuous set of resistance states (100 states) with extremely low switching energy (~170 fJ • µm –2 ). Furthermore, this work clarifies the pathway to neural algorithm accelerators capable of parallelism during both read and write operations.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2025

Comprehensive model for evaluating voltage losses and performance improvements in thin-film photovoltaic devices

Progress of state-of-the-art and next-generation thin-film photovoltaic devices is often stymied by open-circuit voltage (𝑉 oc ) that is significantly lower than theoretical and practical limits. Yet, effectively diagnosing the primary sources of voltage loss remains challenging. Herein, a sequence of device-level characterization techniques and simulations are employed to identify and rank loss mechanisms. For the research-based Cd⁡(Se,Te) device under study, most of the loss was at the front semiconductor heterointerface due to a clifflike conduction-band offset that lowered the recombination activation energy. Additional losses due to band tails were quantified by photoluminescence analysis. The latter provided the absorption coefficient and activation energy reduction associated with band tails as inputs to device models. Simulations showed that alleviating front-interface issues would improve 𝑉 oc , but it would then be limited by bulk recombination. Further improvement of the bulk would then lead to back-contact limitations. Reducing band tails is beneficial in any circumstance. In conclusion, this analysis provides guidance for reaching toward the radiative 𝑉 oc limit.

14 SOLAR ENERGY↗

DOE OSTI2021

Experimental realization of classical Z 2 spin liquids in a programmable quantum device

We build and probe a Z 2 spin liquid in a programmable quantum device, the D-Wave DW-2000Q. Specifically, we observe the classical eight-vertex and six-vertex (spin ice) states and transitions between them. To realize this state of matter, we design a Hamiltonian with combinatorial gauge symmetry using only pairwise-qubit interactions and a transverse field, i.e., interactions which are accessible in this quantum device. The combinatorial gauge symmetry remains exact along the full quantum annealing path, landing the system onto the classical eight-vertex model at the endpoint of the path. The output configurations from the device allow us to directly observe the loop structure of the classical model. Moreover, we deform the Hamiltonian so as to vary the weights of the eight vertices and show that we can selectively attain the classical six-vertex (ice) model, or drive the system into a ferromagnetic state. Additionally, we present studies of the classical phase diagram of the system as a function of the eight-vertex deformations and effective temperature, which we control by varying the relative strengths of the programmable couplings, and we show that the experimental results are consistent with theoretical analysis. Finally, we identify additional capabilities that, if added to these devices, would allow us to realize Z 2 quantum spin liquids on which to build topological qubits.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

DOE OSTI2021

Performance Evaluation and Loss Modeling of WBG Devices based on a Novel Double-Pulse Test Method for Current Source Inverter

Careful measurements of the power device characteristics are necessary to accurately estimate a power converter's losses and efficiency. The conventional double-pulse test (DPT) circuit is a well-known method to implement this laboratory characterization of power devices and power modules. However, the switching characteristics of a power device depend on the power electronics circuit in which it is connected as well as the power circuit's physical layout, in addition to the device's internal structure. Hence, the conventional DPT circuit configuration, which is tailored for a standard voltage-source inverter (VSI), is not well-suited for a current-source inverter (CSI). This paper demonstrates a previously-proposed CSI-based DPT measurement technique that is appropriate for normal CSI operation. The characteristics of SiC MOSFETs and series-connected SiC Schottky diodes used in a CSI are measured using this improved technique while taking temperature effects into account to yield more accurate loss predictions. The CSI losses, including the switching and conduction losses of SiC MOSFETs and SiC Schottky diodes, have been modeled using this approach. The total CSI losses and efficiency have been estimated based on the CSI DPT results and loss models.

42 ENGINEERING↗

DOE OSTI2019

Quantum Computing Circuits and Devices

The development of quantum computing technologies builds on the unique features of quantum physics while borrowing familiar principles from the design of conventional devices. Here, we introduce the fundamental concepts required for designing and operating quantum computing devices by reviewing state of the art efforts to fabricate and demonstrate quantum gates and qubits. We summarize the near-term challenges for devices based on semiconducting, superconducting, and trapped ion technologies with an emphasis on design tools as well as methods of verification and validation. We then discuss the generation and synthesis of quantum circuits for higher-order logic that can be carried out using quantum computing devices.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2023

SnO2 Buffer Layers for High Efficiency CdSeTe/CdTe Devices

SnO2 buffer layers of different thickness were deposited onto TEC 15 Fluorine doped tin oxide coated glass substrates using rf magnetron sputtering. The buffer layers were then incorporated into Cu-doped CdSeTe/CdTe devices using a range of CdCl 2 activation treatments and CuCl2 annealing temperatures to determine the effects of buffer layer thickness on device performance. Results show that all devices fabricated with thinner buffer layers resulted in much better J - V characteristics than their thicker counterparts. This was mainly due to a reduced open-circuit voltage (Voc) when using thicker buffer layers. The best device produced a conversion efficiency of 16.59%, fill factor of 71.62%, Jsc of 28.44 mA/cm 2 and Voc of 814.23 mV.

buffer layers↗

DOE OSTI2023

Implanted Guard Ring Edge Termination With Avalanche Capability for Vertical GaN Devices

Edge termination is the key building block in power devices to enable near-ideal, avalanche breakdown voltage (BV). Here, this work presents the design, fabrication, and physics of a GaN guard ring (GR) edge termination formed by selective-area nitrogen implantation through an epitaxial p-GaN layer. The fabrication of this termination only includes a single implantation step that does not require precise control of implant depth, rendering a large process latitude. The selective-area implantation produces p-GaN rings that are separated by the implanted, semi-insulating regions. The number and spacing of the p-type rings are found to determine the BV of the vertical GaN p-n diode. The 16-ring structure enables a BV of 1800 V, being 88% of the theoretical 1-D parallel-plane limit. Avalanche characteristics are observed in devices with a large variety of GR designs. Finally, we present a comprehensive survey on the efficiency, fabrication complexity, real estate, and avalanche capability of various edge termination techniques that have been reported in vertical GaN devices. The high efficiency (among the highest reported in avalanche-capable GaN terminations), simple and robust fabrication process, and uniform avalanche capability make this implanted GR a promising edge termination for high-voltage GaN devices.

42 ENGINEERING↗

DOE OSTI2017

Review of Silicon Carbide Power Devices and Their Applications

Silicon carbide (SiC) power devices have been investigated extensively in the past two decades, and there are many devices commercially available now. Owing to the intrinsic material advantages of SiC over silicon, SiC power devices can operate at higher voltage, higher switching frequency, and higher temperature. Our paper reviews the technology progress of SiC power devices and their emerging applications. Furthemore, the design challenges and future trends are summarized at the end of the paper.

36 MATERIALS SCIENCE↗

DOE OSTI2018

Online Junction Temperature Monitoring Using Intelligent Gate Drive for SiC Power Devices

Junction temperature is a prime design/operation parameter, as well as, a main indicator of device's health condition for power electronics converters. Compared to its silicon (Si) counterparts, it is more critical for silicon carbide (SiC) devices due to the reliability concern determined by the immaturity of new material and packaging. This paper presents a practical implementation using an intelligent gate drive for online junction temperature monitoring of SiC devices based on turn-off delay time as the thermo-sensitive electrical parameter. First, the sensitivity of turn-off delay time on the junction temperature for fast switching SiC devices is analyzed. A gate impedance regulation assist circuit is proposed to enhance the sensitivity by a factor of 60 and approach 736 ps/°C tested in the case study with little penalty on the power conversion performance. Next, an online monitoring unit based on gate assist circuits is developed to monitor the turn-off delay time in real time with the resolution less than 104 ps. As a result, the micro-controller is capable of “reading” junction temperature during the converter operation. Finally, a SiC-based half-bridge inverter is constructed with an intelligent gate drive consisting of the gate impedance regulation circuit and online turn-off delay time monitoring unit. Experimental results demonstrate the feasibility and accuracy of the proposed approach.

42 ENGINEERING↗

DOE OSTI2018

NREL Topic 1 Final Report: Cohesive Application of Standards-Based Connected Devices to Enable Clean Energy Technologies

This document is the final report of a two-year development, test, and demonstration project entitled 'Cohesive Application of Standards-Based Connected Devices to Enable Clean Energy Technologies.' The project was part of the National Renewable Energy Laboratory's (NREL) Integrated Network Test-bed for Energy Grid Research and Technology (INTEGRATE) initiative. The Electric Power Research Institute (EPRI) and a team of partners were selected by NREL to carry out a project to develop and test how smart, connected consumer devices can act to enable the use of more clean energy technologies on the electric power grid. The project team includes a set of leading companies that produce key products in relation to achieving this vision: thermostats, water heaters, pool pumps, solar inverters, electric vehicle supply equipment, and battery storage systems. A key requirement of the project was open access at the device level - a feature seen as foundational to achieving a future of widespread distributed generation and storage. The internal intelligence, standard functionality and communication interfaces utilized in this project result in the ability to integrate devices at any level, to work collectively at the level of the home/business, microgrid, community, distribution circuit or other. Collectively, the set of products serve as a platform on which a wide range of control strategies may be developed and deployed.

24 POWER TRANSMISSION AND DISTRIBUTION↗

DOE OSTI2025

Thermal Evaluation of CCS and NACS Reference Devices and Adapters

It is important for manufacturers of electric vehicle charging connectors, inlets, and adapters to understand the thermal performance of their devices. Various standards, such as SAE J1772, SAE J3400, IEC 62196, UL 2251, and UL 2252, list temperature limits that charging hardware needs to meet. However, there are currently very limited standardized reference devices against which to measure connector performance, and those that do currently exist generally serve charging currents less than 500A. This can make determining whether a charging connector meets the appropriate temperature limits difficult. Additionally, as automakers and charging station suppliers transition from the SAE J1772 CCS charging standard to SAE J3400 NACS, a number of CCS-to-NACS and NACS-to-CCS adapters are entering the market. These devices are being produced both by well-known automakers/equipment OEMs and lesser-known third-party suppliers, across a wide range of price points and construction qualities. Though SAE J3400/1 and UL 2252 lay out standards for adapter construction, performance and overtemperature response, there is no guarantee that any particular adapter will follow these standards and react to overtemperature events appropriately. This work addresses these issues by developing and evaluating a set of CCS and NACS reference inlet devices to validate the performance of charging connectors in the 500-800A range. The work also evaluates the performance of multiple NACS-to-CCS and CCS-to-NACS charging adapters with respect to UL 2252 temperature limits and SAE J3400/1 overtemperature signaling criteria.

33 ADVANCED PROPULSION SYSTEMS↗

NASA NTRS1995

Pragmatic Approach to Device-Independent Color

JPL has been producing images of planetary bodies for over 30 years. The results of an effort to implement device-independent color on three types of devices are described. The goal is to produce near the same eye-brain response when the observer views the image produced by each device under the correct lighting conditions. The procedure used to calibrate and obtain each device profile is described.

device-independent color remote imaging reproducti↗

NASA NTRS2017

Taking SiC Power Devices to the Final Frontier: Addressing Challenges of the Space Radiation Environment

Silicon carbide power device technology has the potential to enable a new generation of aerospace power systems that demand high efficiency, rapid switching, and reduced mass and volume in order to expand space-based capabilities. For this potential to be realized, SiC devices must be capable of withstanding the harsh space radiation environment. Commercial SiC components exhibit high tolerance to total ionizing dose but to date, have not performed well under exposure to heavy ion radiation representative of the on-orbit galactic cosmic rays. Insertion of SiC power device technology into space applications to achieve breakthrough performance gains will require intentional development of components hardened to the effects of these highly-energetic heavy ions. This work presents heavy-ion test data obtained by the authors over the past several years for discrete SiC power MOSFETs, JFETs, and diodes in order to increase the body of knowledge and understanding that will facilitate hardening of this technology to space radiation effects. Specifically, heavy-ion irradiation data taken under different bias, temperature, and ion beam conditions is presented for devices from different manufacturers, and the emerging patterns discussed.

Power semiconductor devices↗

DOE OSTI2015

Processing and Device Oriented Approach to CIGS Module Reliability; SunShot Initiative, U.S. Department of Energy (DOE)

Abstract: A device level understanding of thin film module reliability has been lacking. We propose that device performance and stability issues are strongly coupled and simultaneous attention to both is necessary. Commonly discussed technical issues such as light soaking, metastability, reverse bias breakdown and junction breakdown can be understood by comparing the behaviors of cells made inAbstract: A device level understanding of thin film module reliability has been lacking. We propose that device performance and stability issues are strongly coupled and simultaneous attention to both is necessary. Commonly discussed technical issues such as light soaking, metastability, reverse bias breakdown and junction breakdown can be understood by comparing the behaviors of cells made in the laboratory and industry. It will then be possible to attribute the observed effects in terms of processing and cell design. Process connection to stability studies can help identify root causes and a path for mitigating the degradation.

14 SOLAR ENERGY↗

DOE OSTI2021

Ion Pair Uptake in Ion Gel Devices Based on Organic Mixed Ionic–Electronic Conductors

Abstract In organic mixed ionic–electronic conductors (OMIECs), it is critical to understand the motion of ions in the electrolyte and OMIEC. Generally, the focus is on the movement of net charge during gating, and the motion of neutral anion–cation pairs is seldom considered. Uptake of mobile ion pairs by the semiconductor before electrochemical gating (passive uptake) can be advantageous as this can improve device speed, and both ions can participate in charge compensation during gating. Here, such passive ion pair uptake in high‐speed solid‐state devices is demonstrated using an ion gel electrolyte. This is compared to a polymerized ionic liquid (PIL) electrolyte to understand how ion pair uptake affects device characteristics. Using X‐ray photoelectron spectroscopy, the passive uptake of ion pairs from the ion gel into the OMIEC is detected, whereas no uptake is observed with a PIL electrolyte. This is corroborated by X‐ray scattering, which reveals morphological changes to the OMIEC from the uptake of ion pairs. With in situ Raman, a reorganization of both anions and cations is then observed during gating. Finally, the speed and retention of OMIEC‐based neuromorphic devices are tuned by controlling the freedom of charge motion in the electrolyte.

Quill, Tyler J.↗

DOE OSTI2025

Focused Helium Ion Beam for Direct Patterning of Monolayer MoS 2 Nanoribbon Field Effect Devices

The helium ion microscope (HIM) focused ion beam (FIB) has emerged as a powerful tool to directly pattern nanostructures below 10 nm due to its high-resolution capabilities and the inert nature of the ion source. These attributes make HIM FIB particularly interesting for patterning 2D materials such as transition metal dichalcogenides (TMDs) to investigate transport phenomena at the nanoscale. Reported here is the fabrication of MoS 2 nanoribbon devices using HIM FIB-induced etching (FIBIE) with XeF 2 , allowing for reduced ion dose compared to direct sputtering. While patterning is efficacious, the devices exhibit performance degradation with decreasing nanoribbon width due to damage up to 150 nm beyond the patterned edge. Incorporating an hBN encapsulation improves device performance by one order of magnitude, although the lateral extent of damage remains unchanged. The spatial distribution of damage is shown to be determined by the forward- and backscattered ions and electrons, while the hBN encapsulation layer substantially reduces damage from XeF 2 interactions in unexposed regions. Raman and photoluminescence (PL) measurements corroborate these findings, while ion/solid interaction simulations further elucidate the resolution limits imposed by substrate interactions. In conclusion, this work provides critical insights and a practical pathway for utilizing HIM FIBIE in 2D TMD functional device patterning.

MoS 2↗

DOE OSTI2017

Atomically Thin Femtojoule Memristive Device

The morphology and dimension of the conductive filament formed in a memristive device are strongly influenced by the thickness of its switching medium layer. Aggressive scaling of this active layer thickness is critical toward reducing the operating current, voltage, and energy consumption in filamentary-type memristors. Previously, the thickness of this filament layer has been limited to above a few nanometers due to processing constraints, making it challenging to further suppress the on-state current and the switching voltage. In this paper, the formation of conductive filaments in a material medium with sub-nanometer thickness formed through the oxidation of atomically thin two-dimensional boron nitride is studied. The resulting memristive device exhibits sub-nanometer filamentary switching with sub-pA operation current and femtojoule per bit energy consumption. Furthermore, by confining the filament to the atomic scale, current switching characteristics are observed that are distinct from that in thicker medium due to the profoundly different atomic kinetics. The filament morphology in such an aggressively scaled memristive device is also theoretically explored. Finally, these ultralow energy devices are promising for realizing femtojoule and sub-femtojoule electronic computation, which can be attractive for applications in a wide range of electronics systems that desire ultralow power operation.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗

DOE OSTI2018

Carbon-Nanotube-Based Thermoelectric Materials and Devices

Conversion of waste heat to voltage has the potential to significantly reduce the carbon footprint of a number of critical energy sectors, such as the transportation and electricity-generation sectors, and manufacturing processes. Thermal energy is also an abundant low-flux source that can be harnessed to power portable/wearable electronic devices and critical components in remote off-grid locations. As such, a number of different inorganic and organic materials are being explored for their potential in thermoelectric-energy-harvesting devices. Carbon-based thermoelectric materials are particularly attractive due to their use of nontoxic, abundant source-materials, their amenability to high-throughput solution-phase fabrication routes, and the high specific energy (i.e., W g-1) enabled by their low mass. Single-walled carbon nanotubes (SWCNTs) represent a unique 1D carbon allotrope with structural, electrical, and thermal properties that enable efficient thermoelectric-energy conversion. Here, the progress made toward understanding the fundamental thermoelectric properties of SWCNTs, nanotube-based composites, and thermoelectric devices prepared from these materials is reviewed in detail. This progress illuminates the tremendous potential that carbon-nanotube-based materials and composites have for producing high-performance next-generation devices for thermoelectric-energy harvesting.

77 NANOSCIENCE AND NANOTECHNOLOGY↗