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At least 901 records · Page 50

Design and evaluation of a fault-tolerant multiprocessor using hardware recovery blocks

A fault-tolerant multiprocessor with a rollback recovery mechanism is discussed. The rollback mechanism is based on the hardware recovery block which is a hardware equivalent to the software recovery block. The hardware recovery block is constructed by consecutive state-save operations and several state-save units in every processor and memory module. When a fault is detected, the multiprocessor reconfigures itself to replace the faulty component and then the process originally assigned to the faulty component retreats to one of the previously saved states in order to resume fault-free execution. A mathematical model is proposed to calculate both the coverage of multi-step rollback recovery and the risk of restart. A performance evaluation in terms of task execution time is also presented.

Lee, Y. H.↗

Measurement of fault latency in a digital avionic mini processor, part 2

The results of fault injection experiments utilizing a gate-level emulation of the central processor unit of the Bendix BDX-930 digital computer are described. Several earlier programs were reprogrammed, expanding the instruction set to capitalize on the full power of the BDX-930 computer. As a final demonstration of fault coverage an extensive, 3-axis, high performance flght control computation was added. The stages in the development of a CPU self-test program emphasizing the relationship between fault coverage, speed, and quantity of instructions were demonstrated.

Mcgough, J.↗

A fault tolerant approach to state estimation and failure detection in nonlinear systems

The design problem considered in the present investigation involves a nonlinear discrete time stochastic system where replicated sensors provide redundant observations of inputs and outputs of the system, compensate for sensor 'normal operating' bias levels, and generate reliable estimates for the plant states in the presence of possible sensor failures. The resulting fault tolerant design should utilize inherent analytical redundancy and be capable of detecting many different types and levels of sensor failures. In addition, it should have minimal complexity. In connection with these goals, a sensor fault tolerant system design methodology is developed. The performance of the considered approach to an application is discussed, taking into account the design of a sensor fault tolerant system using analytic redundancy for the Terminal Configured Vehicle research aircraft in a microwave landing system environment.

Lancraft, R. E.↗

Fault tolerant software modules for SIFT

The implementation of software fault tolerance is investigated for critical modules of the Software Implemented Fault Tolerance (SIFT) operating system to support the computational and reliability requirements of advanced fly by wire transport aircraft. Fault tolerant designs generated for the error reported and global executive are examined. A description of the alternate routines, implementation requirements, and software validation are included.

Hecht, M.↗

On requirements for software fault tolerance for flight controls

The need for the application of software fault tolerance techniques in digital flight control systems is argued to follow from the requirements derivable from the safety constraints of such systems, requirements which can be stated in terms of minimum acceptable system reliability levels and, moreover, stated quantitatively. It is argued further that, while fault tolerance appears to be a viable mechanism in general, individual fault tolerance schemes need to be analyzed to ensure that they are adequate to the task and being properly utilized, that such analysis is essentially an exercise in software 'reliability' estimation involving software characteristics not currently included in software 'reliability' modeling (most especially, the degree of correlation of malfunctions among redundant, dissimilar software modules), and that, consequently, further research and studies in the characterization of software behavior and malfunctions is required.

Migneault, G. E.↗

Crosscutting relations and relative ages of ridges and faults in the Tharsis region of Mars

The results of a detailed photogeologic analysis and classification of ridge-fault cross-cutting relationships on ridged plains units of the Tharsis region is reported. The problems involved in using the morphology of ridge-fault intersections to determine relative timing of structural events are discussed. The implications of using intersection angles as well as morphology to determine possible age relationships for the tectonic history of the region are presented. It is concluded that the major ridge-forming events in the Tharsis region were roughly coincident with, and possibly prior to, the extensional events that produced the faulting of the Tempe and Mareotis regions, the Coprates and Memnonia regions, and the rifting of the Valles Marineris. The compressional events that formed most of the ridges are restricted in time both by their relationship to regional extensional events and by the age of the units on which they formed.

Watters, T. R.↗

The containment set approach to digital system tolerance of lightning-induced transient faults

A fault model and a system model are necessary to assess the tolerance or resilience of a digital system to lightning-induced transients. It is noted that these models are usually developed separately. A new approach is outlined here for this assessment problem which combines the fault and system models into an overall model. With this approach, referred to as the containment set approach, an assessment of the effects of lightning-induced transients can be made in terms of a state transition matrix. This matrix can be generated by means of fault injection experiments. In addition, certain nonredundancy-oriented design alternatives to the achievement of lightning-induced transient tolerance in digital systems are indicated by the containment set approach.

Masson, G. M.↗

The role of an intracrustal asthenosphere on the behavior of major strike-slip faults

Strain accumulation measurements adjacent to the San Andreas fault have indicated that the strain accumulation zone extends only a few tens of kms away from the fault. While the restricted zone of cyclic accumulation and release of elastic energy adjacent to major strike-slip faults has been attributed to a viscoelastic asthenosphere's damping effect, the narrowness of the San Andreas zone implies a thickness of the lithosphere that, at 10-20 km, may not be consistent with the relatively low surface heat flow measurements obtained. It is presently proposed that an upper elastic plate extends to a depth of 15 km, and that beneath this upper elastic plate is a soft, intracrustal asthenosphere exhibiting a viscoelastic behavior. A second elastic layer lies under this, followed by the asthenosphere. It is shown that the damping due to the intracrustal asthenosphere can explain the observed narrow zone of cyclic strain accumulation and release.

Turcotte, D. L.↗

Focal depths and fault plane solutions of earthquakes and active tectonics of the Himalaya

Synthetic seismograms were compared with long-period body waves for nine earthquakes with epicenters in the Himalayan arc to determine depths of foci and to improve fault plane solutions. Focal depths are shallow (10-20 km). Inferred slip vectors are locally perpendicular to the mountain range; they plunge very gently (about 10 deg) in the eastern sections of the range and more steeply (about 25 deg) in western sections. Assuming India to be a rigid plate, the radially oriented slip vectors imply that southern Tibet extends at about half the rate of underthrusting in the Himalaya and therefore probably at about 5-10 mm/yr. The shallow depths and gentle dips of the fault planes, at least for the events in the eastern half of the range, are consistent with coherent underthrusting of the Indian plate beneath, at least, the Lesser Himalaya. The steeper dips of fault planes in the western part of the arc might reflect deformation of the overriding thrust plate or simply a steepening of the main underthrusting zone beneath the Greater Himalaya.

Baranowski, J.↗

The role of knowledge structures in fault diagnosis

The use of human memory and knowledge structures to direct fault diagnosis performance was investigated. The performances of 20 pilots with instrument flight ratings were studied in a fault diagnosis task. The pilots were read a scenario which described flight conditions under which the symptoms which are indicative of a problem were detected. They were asked to think out loud as they requested and interpreted various pieces of information to diagnose the cause of the problem. Only 11 of the 20 pilots successfully diagnosed the problem. Pilot performance on this fault diagnosis task was modeled in the use of domain specific knowledge organized in a frame system. Eighteen frames, with a common structure, were necessary to account for the data from all twenty subjects.

Smith, P. J.↗

Ultrareliable, fault-tolerant control systems: A conceptual description

An Ultrareliable, Fault-Tolerant, Control-System (UFTCS) concept is described using a systems design philosophy which allows development of system structures containing virtually no common elements. Common elements limit achievable system reliability and can cause catastrophic loss of fault-tolerant system function. The UFTCS concept provides the means for removing common system elements by permitting the elements of the system to operate as independent, uncoupled entities. Multiple versions of the application program are run on dissimilar hardware. Fault tolerance is achieved through the use of static redundancy management.

Webster, L. D.↗

Fault-free behavior of reliable multiprocessor systems: FTMP experiments in AIRLAB

This report describes a set of experiments which were implemented on the Fault tolerant Multi-Processor (FTMP) at NASA/Langley's AIRLAB facility. These experiments are part of an effort to formulate and evaluate validation methodologies for fault-tolerant computers. This report deals with the measurement of single parameters (baselines) of a fault free system. The initial set of baseline experiments lead to the following conclusions: (1) The system clock is constant and independent of workload in the tested cases; (2) the instruction execution times are constant; (3) the R4 frame size is 40mS with some variation; (4) the frame stretching mechanism has some flaws in its implementation that allow the possibility of an infinite stretching of frame duration. Future experiments are planned. Some will broaden the results of these initial experiments. Others will measure the system more dynamically. The implementation of a synthetic workload generation mechanism for FTMP is planned to enhance the experimental environment of the system.

Clune, E.↗

Hybrid routing technique for a fault-tolerant, integrated information network

The evolutionary growth of the space station and the diverse activities onboard are expected to require a hierarchy of integrated, local area networks capable of supporting data, voice, and video communications. In addition, fault-tolerant network operation is necessary to protect communications between critical systems attached to the net and to relieve the valuable human resources onboard the space station of time-critical data system repair tasks. A key issue for the design of the fault-tolerant, integrated network is the development of a robust routing algorithm which dynamically selects the optimum communication paths through the net. A routing technique is described that adapts to topological changes in the network to support fault-tolerant operation and system evolvability.

Meredith, B. D.↗

Fault models

A major problem in the qualification of integrated circuit cells and in the development of adequate tests for the circuits is to lack of information on the nature and density of fault models. Some of this information is being obtained from the test structures. In particular, the Pinhole Array Capacitor is providing values for the resistance of gate oxide shorts, and the Addressable Inverter Matrix is providing values for parameter distributions such as noise margins. Another CMOS fault mode, that of the open-gated transistor, is examined and the state of the transistors assessed. Preliminary results are described for a number of open-gated structures such as transistors, inverters, and NAND gates. Resistor faults are applied to various CMOS gates and the time responses are noted. The critical value for the resistive short to upset the gate response was determined.

Sayah, H. R.↗

Structure of the Melajo clay near Arima, Trinidad and strike-slip motion in the El Pilar fault zone

No consensus has yet emerged on the sense, timing and amount of motion in the El Pilar fault zone. As a contribution to the study of this problem, a critical area within the zone in North Central Trinidad has been mapped. On the basis of the mapping, it is concluded that the El Pilar zone has been active in right-lateral strike-slip motion during the Pleistocene. Recognition of structural styles akin to those of the mapped area leads to the suggestion that the El Pilar zone is part of a 300 km wide plate boundary zone extending from the Orinoco delta northward to Grenada. Lateral motion of the Caribbean plate with respect to South America has been suggested to amount to 1900 km in the last 38 Ma. Part of this displacement since the Miocene can be readily accommodated within the broad zone identified here. No one fault system need account for more than a fraction of the total motion and all faults need not be active simultaneously.

Robertson, P.↗

Fault tolerant control laws

A systematic procedure for the synthesis of fault tolerant control laws to actuator failure has been presented. Two design methods were used to synthesize fault tolerant controllers: the conventional LQ design method and a direct feedback controller design method SANDY. The latter method is used primarily to streamline the full-state Q feedback design into a practical implementable output feedback controller structure. To achieve robustness to control actuator failure, the redundant surfaces are properly balanced according to their control effectiveness. A simple gain schedule based on the landing gear up/down logic involving only three gains was developed to handle three design flight conditions: Mach .25 and Mach .60 at 5000 ft and Mach .90 at 20,000 ft. The fault tolerant control law developed in this study provides good stability augmentation and performance for the relaxed static stability aircraft. The augmented aircraft responses are found to be invariant to the presence of a failure. Furthermore, single-loop stability margins of +6 dB in gain and +30 deg in phase were achieved along with -40 dB/decade rolloff at high frequency.

Ly, U. L.↗

Fault and Error Latency Under Real Workload: an Experimental Study

A practical methodology for the study of fault and error latency is demonstrated under a real workload. This is the first study that measures and quantifies the latency under real workload and fills a major gap in the current understanding of workload-failure relationships. The methodology is based on low level data gathered on a VAX 11/780 during the normal workload conditions of the installation. Fault occurrence is simulated on the data, and the error generation and discovery process is reconstructed to determine latency. The analysis proceeds to combine the low level activity data with high level machine performance data to yield a better understanding of the phenomena. A strong relationship exists between latency and workload and that relationship is quantified. The sampling and reconstruction techniques used are also validated. Error latency in the memory where the operating system resides was studied using data on the physical memory access. Fault latency in the paged section of memory was determined using data from physical memory scans. Error latency in the microcontrol store was studied using data on the microcode access and usage.

Chillarege, Ram↗

Intelligent fault-tolerant controllers

A system with fault tolerant controls is one that can detect, isolate, and estimate failures and perform necessary control reconfiguration based on this new information. Artificial intelligence (AI) is concerned with semantic processing, and it has evolved to include the topics of expert systems and machine learning. This research represents an attempt to apply AI to fault tolerant controls, hence, the name intelligent fault tolerant control (IFTC). A generic solution to the problem is sought, providing a system based on logic in addition to analytical tools, and offering machine learning capabilities. The advantages are that redundant system specific algorithms are no longer needed, that reasonableness is used to quickly choose the correct control strategy, and that the system can adapt to new situations by learning about its effects on system dynamics.

Huang, Chien Y.↗