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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 91 records · Page 5
All sourcesNASA NTRSDOE OSTI
NASA NTRS2016

Fabrication of a Silicon Nanowire on a Bulk Substrate by Use of a Plasma Etching and Total Ionizing Dose Effects on a Gate-All-Around Field-Effect Transistor

The gate all around transistor is investigated through experiment. The suspended silicon nanowire for the next generation is fabricated on bulk substrate by plasma etching method. The scallop pattern generated by Bosch process is utilized to form a floating silicon nanowire. By combining anisotropic and istropic silicon etch process, the shape of nanowire is accurately controlled. From the suspended nanowire, the gate all around transistor is demonstrated. As the silicon nanowire is fully surrounded by the gate, the device shows excellent electrostatic characteristics.

Transistor↗
NASA NTRS2018

One Time Programmable Antifuse Memory Based on Bulk Junctionless Transistor

One time programmable (OTP) antifuse base memory is demonstrated based on a bulk junctionless gate-all-around (GAA) nanowire transistor technology. The presented memory consists of a single transistor (1T) footprint without any process modification. The source/drain (S/D) and gate respectively become bit line and word line where the antifuse is formed by oxide breakdown across the gate and the channel. The channel is connected directly to the bit line due to junctionless S/D and inherently isolated from the neighboring cell by the GAA channel. Therefore, an array of 1T antifuse OTP can be a candidate for the sub-5-nanometer technology node.

Antifuse↗
NASA NTRS2024

Development of a High Frequency Class-A Amplifier for High Temperature Wireless Microsystems based on a Silicon Carbide Static Induction Transistor

Next generation gas turbine engine health monitoring for high performance jet engine-powered aircraft will incorporate integrated microelectronic sensors specifically designed to enhance aircraft functionality, engine efficiency, and safety. Temperature, air flow and pressure associated with the gas path as well as emissions from the engine correlate to the state of the combustor and other engine health conditions. Monitoring these parameters accurately requires positioning electronic sensors in the hot zone of the gas turbine engine, which exposes them to temperatures in excess of 400ºC. At these temperatures, signal amplification is needed at the transducer level to distinguish the desired measured signal from the significant electronic noise generated by the harsh environment. In this presentation, we report on the simulation, development, fabrication, and testing on a high temperature Class-A amplifier which utilizes a 4H-SiC Static Induction Transistor (SIT) as the active device and input/output matching and DC bias networks comprised of thin-film spiral inductors, metal-insulator-metal capacitors, and thick film chip resistors. A small signal model that emulates the operation of the 4H-SiC SIT from 25 to 400ºC, with an emphasis on operation at 400οC, was utilized. Measurements were performed from 25 to 400ºC to generate current-voltage curves, capacitive transistor characteristics and high frequency scattering parameters (S-parameters). The measured data was used to extrapolate the transconductance, gm, as a function of temperature for model development. Circuit simulation tools were used to generate S-parameters, which were compared to the measured values. At 400οC, a maximum difference between measured and simulated S-parameters for frequencies from 20 to 100 MHz were 3.84%, 0.68%, 10.61%, and 3.26% for S21, S12, S11, and S22, respectively. The average transit frequency, ft, was calculated from measured values to be 197.8 MHz, while the simulated value from the model was found to be 200 MHz. The Amplifier’s S-parameters were recorded at 20-100 MHz over a temperature range of 25-400ºC and show a gain of approximately 15.8 and 5.80 dBm at 25 and 400ºC, respectively. The input and output reflection coefficients at 50 MHz and 400ºC were -18.5 and -15.2 dB, respectively. The noise figure and phase noise were measured over the temperature range of 25-400ºC and recorded. The noise figure increased 21% at 50 MHz over the temperature range, while the 1 kHz offset of the phase noise remained below -110 dB. The stability factor, K, calculated with measured and simulated data demonstrates unconditional stability over the frequency range at 400ºC. Lastly, the 1-dB compression point was measured at 50 MHz and 400ºC with an approximated output of 9.5 dBm.

SiC↗
DOE OSTI2026

Physical Modeling and Design of a Nonvolatile Optically Gated High‐Power Diamond Transistor

In this work, we present the theory and modeling framework of a diamond optically gated junction field‐effect transistor (DOGFET). The device utilizes nitrogen substitutional centers in type‐1b diamond to optically modulate a p‐ boron doped diamond channel. Using sub‐gap lasers with intensities as low as 100 W/cm 2 , electrons are optically excited from substitutional nitrogen sites to the conduction band of the diamond substrate, thus enabling the optical gate to exercise control on modulating the space‐charge region at the junction and therefore the channel conductivity. We show that the device can deliver a current of 7 μA/μm, or equivalently 1750 A/cm 2 , while switching at a frequency greater than 100 kHz, in a form factor of 5 μm 2 . The breakdown voltage is found to be greater than 1850 V, with a breakdown field strength of ~13 MV/cm. Moreover, the device supports nonvolatile operation with a “memory effect” enabling single transistor state retention. The presented simulation framework provides a physically grounded insight into the limits and opportunities of optoelectronic diamond systems.

Engineering - Electronic and electrical engineerin↗
DOE OSTI2025

Reversible parts-per-trillion-level detection of perfluorooctane sulfonic acid in tap water using field-effect transistor sensors

Widespread, persistent and toxic per- and polyfluoroalkyl substances (PFAS) pose a major threat to water systems and human health. Current detection methods are relatively expensive, slow and complex, underscoring the need for more accessible alternatives to meet increasingly stringent PFAS regulations. Here, in this study, we present an ultrasensitive sensing platform for perfluorooctane sulfonic acid detection in tap water with a reporting limit ( ~ 250 parts per quadrillion) lower than the US Environmental Protection Agency’s regulatory standard (4 parts per trillion), using a remote gate field-effect transistor featuring β-cyclodextrin (β-CD)-modified reduced graphene oxide as the sensing membrane. The sensor exhibits excellent selectivity against common inorganic ions, natural organic matter and select organic pollutants in tap water. The reversible and rapid response ( < 2 min) indicates the potential of remote gate field-effect transistor for continuous in-line monitoring. Mechanistic studies using quartz crystal microbalance and molecular dynamics simulations reveal key roles of analyte adsorption and charge properties in sensing performance and offer insights for designing more selective PFAS capture probes.

Wang, Yuqin [University of Chicago, IL (United Sta↗
DOE OSTI2025

Gate control of electron correlations towards Mott field effect transistors (MottFET)

The modulation of channel conductance in field-effect transistors (FETs) via metal-insulator-semiconductor structures has revolutionized information processing and storage. However, the limitations of silicon-based FETs in electrical switching have driven the search for new materials capable of overcoming these constraints. Electrostatic gating of competing electronic phases in a Mott material near its metal-to-insulator transition (MIT) offers the prospects of substantial modulation of the conducting electrons and electrical resistivity through small changes in band filling. While electrostatic control of the MIT has been previously reported, the advancement of Mott materials toward novel Mott-based transistors, MottFETs requires the realization of their unique physical properties in a solid-state device. In this study, we present gate control of electron correlation using a solid-state device utilizing the oxide Mott system La 1-x Sr x VO 3 as a correlated FET channel. We report on a gate resistance response that cannot be explained in a purely electrostatic framework. This behavior suggests an enhancement in effective mass and a reduction in effective carrier density as the system approaches its insulating state, consistent with theoretical predictions for Mott systems, suggesting at least 100× charge gain originating from the correlated behavior. These preliminary results pave the way toward the development of highly efficient, low-power electronic devices that could surpass the performance bottlenecks of conventional FETs by leveraging the electronic phase transitions of correlated electron systems.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2024

Role of mechanical stress localizations on the radiation hardness of AlGaN/GaN high electron mobility transistors

Multi-material, multi-layered systems such as AlGaN/GaN high electron mobility transistors (HEMTs) contain residual mechanical stresses that arise from sharp contrasts in device geometry and materials parameters. These stresses, which can be either tensile or compressive, are difficult to detect and eliminate because of their highly localized nature. We propose that their high-stored internal energy makes potential sites for defect nucleation sites under radiation, particularly if their locations coincide with the electrically sensitive regions of a transistor. In this study, we validate this hypothesis with molecular dynamic simulation and experiments exposing both pristine and annealed HEMTS to 2.8 MeV Au +3 irradiation. Our unique annealing process uses mechanical momentum of electrons, also known as the electron wind force (EWF) to mitigate the residual stress at room temperature. High-resolution transmission electron microscopy and cathodoluminescence spectra reveal the reduction of point defects and dislocations near the two-dimensional electron gas region of EWF-treated devices compared to pristine devices. The EWF-treated HEMTs showed relatively higher resilience with approximately 10% less degradation of drain saturation current and ON-resistance and 5% less degradation of peak transconductance. Both mobility and carrier concentration of the EWF-treated devices were less impacted compared to the pristine devices. Our results suggest that the lower density of nanoscale stress localization contributed to the improved radiation tolerance of the EWF-treated devices. Intriguingly, the EWF is found to modulate the defect distribution by moving the defects to electrically less sensitive regions in the form of dislocation networks, which act as sinks for the radiation induced defects and this assisted faster dynamic annealing.

AlGaN/GaN HEMTs↗
DOE OSTI2025

Securing 3D NAND Without Density Loss via In-Situ Encryption Using a Single Transistor XOR Cell

In this article, we push lightweight XOR-based in-situ encryption to extreme density by proposing a singletransistor XOR memory cell and applying it to 3D NAND, enabling secure data storage without density loss. Using a ferroelectric field-effect transistor (FeFET) as an example technology, we demonstrate that: i) a single-transistor memory can realize the XOR function by exploiting the ability to charge the source and drain separately and control current flow direction, eliminating the need for conventional encrypted cells that rely on complementary devices; ii) with a XOR-based cipher, encryption and decryption can be mapped to in-situ array operations, where ciphertext is stored as the threshold voltage (VTH) states of FeFETs in a NAND string, and decryption is achieved through read operations using key-dependent complementary source/drain bias; iii) the proposed technique is scalable to multi-level cell (MLC) storage by encrypting and decrypting data bit by bit; iv) using an integrated NAND FeFET array, we experimentally demonstrate encryption and decryption operations for both single-level cell (SLC) and MLC storage; v) systemlevel benchmarking shows that the proposed technique achieves 48× and 278× improvements in encryption and decryption throughput, respectively, compared to AES.

36 MATERIALS SCIENCE↗
DOE OSTI2025

Prediction of Alpha-Particle-Immune Gate-All-Around Field-Effect Transistors (GAA-FET) Based SRAM Design

Alpha particles are known to be a major source of particles creating soft errors in semiconductor devices, such as content flipping in Static Random-Access Memory (SRAM). Recent advancements in transistor nodes have led to the introduction of Gate-All-Around Field Effect Transistors (GAA-FETs), which have better gate control, thus better electrostatics. Moreover, the introduction of bottom dielectric isolation (BDI) eliminates substrate leakage and thus is expected to enhance its radiation hardness. It is thus important to explore if one can design an SRAM that is completely radiation-hard to alpha particles. In this paper, using 3D Technology Computer-Aided-Design (TCAD) simulations, we show that it is possible to design an SRAM using GAA-FET technology so that it is immune to single alpha particle radiation error. In other words, with the design, there will be no single-event upset (SEU) due to alpha particles. We first use ab initio calculations in PHITS to show that there is a maximum linear energy transfer (LET), LET max , for the alpha particle in Si and Si x Ge 1-x . Based on that, by de signing a sub-7nm GAA-FET-based SRAM with BDI, we show that the SRAM does not flip even if the particle strike is in the worst-case scenario for LET > LET max .

42 ENGINEERING↗
DOE OSTI2025

Vertical 2T-nC FeRAM Demonstration: BEOL Read Transistor for 4F 2 Memory Strings and Two-Terminal Selector Design for Polarization Disturb Mitigation

In this work, we demonstrate a vertical 2T-nC FeRAM with a back-end-of-line (BEOL) read transistor (T R ) for 4F 2 string and propose a selector design to mitigate polarization disturb in passive capacitor crossbar arrays. Key contributions include: 1) successful integration and operation composed of a Si MOSFET write transistor (T W ), 3-layer cylindrical ferroelectric capacitors, and Si-doped In 2 O 3 BEOL T R , demonstrating the feasibility of 4F 2 2T−nC string; 2) introducing nonlinearity into the capacitor stack to suppress ferroelectric voltage drop under inhibition biases while maintaining sufficient write voltage, reducing disturbance; 3)modeling and experimental validation of inserting a metalsemiconductor (a-Si)-metal (MSM) selector into the capacitor in mitigating the disturb, particularly achieving 9x reduction of disturb after 10 6 cycles in the V W /2 scheme.

42 ENGINEERING↗
NASA NTRS1964

Field effect transistors used as voltage controlled resistors

Two new methods of incorporating field effect transistors into circuit designs have resulted in linear response of this type transistor over a wide range of controlled voltage levels. This increases its usefulness as a voltage-controlled resistor.

Source record↗
NASA NTRS1965

Boron nitride housing cools transistors

Boron nitride ceramic heat sink cools transistors in r-f transmitter and receiver circuits. Heat dissipated by the transistor is conducted by the boron nitride housing to the metal chassis on which it is mounted.

Source record↗
NASA NTRS1965

Insulator-holder protects transistors in dense electronic assemblies

Molded insulating spacer with one or more cavities is used as an insulated holder for mounting metal-case transistors in a chassis containing densely packed electronic components. The transistors are mechanically supported on their bases and electrically isolated from each other by the holder.

Source record↗
NASA NTRS1966

Jig protects transistors from heat while tinning leads

In tinning transistor leads, an aluminum jig is used to dip the leads into the molten tin. The jigs mass shunts excess heat given off by the molten tin before it reaches and damages the transistor body.

Pelletier, A. J.↗
NASA NTRS1966

Substituting transistor for diode improves rectifying means

Unusual transistor connection that substitutes for a silicon diode and allows significantly higher repetition rates without increasing power loss rectifies an alternating current. Operation speed is improved by a factor of 10 or more when a given diode is replaced by this transistor circuit.

Muller, R. M.↗