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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 91 records · Page 5
All sourcesNASA NTRSDOE OSTI
NASA NTRS2000

Active pixel sensor having intra-pixel charge transfer with analog-to-digital converter

An imaging device formed as a monolithic complementary metal oxide semiconductor Integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node and an analog-to-digital converter formed in the substrate connected to the output of the readout circuit.

Fossum, Eric R.↗
NASA NTRS1999

Active pixel sensor array with multiresolution readout

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. The imaging device can also include an electronic shutter formed on the substrate adjacent the photogate, and/or a storage section to allow for simultaneous integration. In addition, the imaging device can include a multiresolution imaging circuit to provide images of varying resolution. The multiresolution circuit could also be employed in an array where the photosensitive portion of each pixel cell is a photodiode. This latter embodiment could further be modified to facilitate low light imaging.

Fossum, Eric R.↗
NASA NTRS1995

Active pixel sensor with intra-pixel charge transfer

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

Fossum, Eric R.↗
NASA NTRS2005

Active pixel sensor pixel having a photodetector whose output is coupled to an output transistor gate

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. A Simple Floating Gate (SFG) pixel structure could also be employed in the imager to provide a non-destructive readout and smaller pixel sizes.

Fossum, Eric R.↗
NASA NTRS2003

Active pixel sensor with intra-pixel charge transfer

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

Fossum, Eric R.↗
NASA NTRS2004

Active pixel sensor with intra-pixel charge transfer

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

Fossum, Eric R.↗
NASA NTRS2003

Active pixel sensor having intra-pixel charge transfer with analog-to-digital converter

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node and an analog-to-digital converter formed in the substrate connected to the output of the readout circuit.

Fossum, Eric R.↗
NASA NTRS2006

Method of acquiring an image from an optical structure having pixels with dedicated readout circuits

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

Fossum, Eric R.↗
NASA NTRS2010

Advanced Avionics and Processor Systems for a Flexible Space Exploration Architecture

The Advanced Avionics and Processor Systems (AAPS) project, formerly known as the Radiation Hardened Electronics for Space Environments (RHESE) project, endeavors to develop advanced avionic and processor technologies anticipated to be used by NASA s currently evolving space exploration architectures. The AAPS project is a part of the Exploration Technology Development Program, which funds an entire suite of technologies that are aimed at enabling NASA s ability to explore beyond low earth orbit. NASA s Marshall Space Flight Center (MSFC) manages the AAPS project. AAPS uses a broad-scoped approach to developing avionic and processor systems. Investment areas include advanced electronic designs and technologies capable of providing environmental hardness, reconfigurable computing techniques, software tools for radiation effects assessment, and radiation environment modeling tools. Near-term emphasis within the multiple AAPS tasks focuses on developing prototype components using semiconductor processes and materials (such as Silicon-Germanium (SiGe)) to enhance a device s tolerance to radiation events and low temperature environments. As the SiGe technology will culminate in a delivered prototype this fiscal year, the project emphasis shifts its focus to developing low-power, high efficiency total processor hardening techniques. In addition to processor development, the project endeavors to demonstrate techniques applicable to reconfigurable computing and partially reconfigurable Field Programmable Gate Arrays (FPGAs). This capability enables avionic architectures the ability to develop FPGA-based, radiation tolerant processor boards that can serve in multiple physical locations throughout the spacecraft and perform multiple functions during the course of the mission. The individual tasks that comprise AAPS are diverse, yet united in the common endeavor to develop electronics capable of operating within the harsh environment of space. Specifically, the AAPS tasks for the Federal fiscal year of 2010 are: Silicon-Germanium (SiGe) Integrated Electronics for Extreme Environments, Modeling of Radiation Effects on Electronics, Radiation Hardened High Performance Processors (HPP), and and Reconfigurable Computing.

Keys, Andrew S.↗
NASA NTRS2012

ASIC Readout Circuit Architecture for Large Geiger Photodiode Arrays

The objective of this work was to develop a new class of readout integrated circuit (ROIC) arrays to be operated with Geiger avalanche photodiode (GPD) arrays, by integrating multiple functions at the pixel level (smart-pixel or active pixel technology) in 250-nm CMOS (complementary metal oxide semiconductor) processes. In order to pack a maximum of functions within a minimum pixel size, the ROIC array is a full, custom application-specific integrated circuit (ASIC) design using a mixed-signal CMOS process with compact primitive layout cells. The ROIC array was processed to allow assembly in bump-bonding technology with photon-counting infrared detector arrays into 3-D imaging cameras (LADAR). The ROIC architecture was designed to work with either common- anode Si GPD arrays or common-cathode InGaAs GPD arrays. The current ROIC pixel design is hardwired prior to processing one of the two GPD array configurations, and it has the provision to allow soft reconfiguration to either array (to be implemented into the next ROIC array generation). The ROIC pixel architecture implements the Geiger avalanche quenching, bias, reset, and time to digital conversion (TDC) functions in full-digital design, and uses time domain over-sampling (vernier) to allow high temporal resolution at low clock rates, increased data yield, and improved utilization of the laser beam.

Vasile, Stefan↗
NASA NTRS2013

Medicine Delivery Device with Integrated Sterilization and Detection

Sterile delivery devices can be created by integrating a medicine delivery instrument with surfaces that are coated with germicidal and anti-fouling material. This requires that a large-surface-area template be developed within a constrained volume to ensure good contact between the delivered medicine and the germicidal material. Both of these can be integrated using JPL-developed silicon nanotip or cryo-etch black silicon technologies with atomic layer deposition (ALD) coating of specific germicidal layers. The application of semiconductor processing techniques and technologies to the problems of fluid manipulation and delivery has enabled the integration of chemical, electrical, and mechanical manipulation of samples all within a single microfluidic device. This approach has been successfully applied at JPL to the automated processing, detection, and analysis of minute quantities (parts per trillion level) of biomaterials to develop instruments for in situ exploration or extraterrestrial bodies. The same nanofabrication techniques that are used to produce a microfluidics device are also capable of synthesizing extremely high-surface-area templates in precise locations, and coating those surfaces with conformal films to manipulate their surface properties. This methodology has been successfully applied at JPL to produce patterned and coated silicon nanotips (also known as black silicon) to manipulate the hydrophilicity of surfaces to direct the spreading of fluids in microdevices. JPL's ALD technique is an ideal method to produce the highly conformal coatings required for this type of application. Certain materials, such as TiO2, have germicidal and anti-fouling properties when they are illuminated with UV light. The proposed delivery device contacts medicine with this high-surface-area black silicon surface coated with a thin-film germicidal deposited conformally with ALD. The coating can also be illuminated with ultraviolet light for the purpose of sterilization or identification of the medicine itself. This constrained volume that is located immediately prior to delivery into a patient, ensures that the medicine delivery device is inherently sterile. An additional benefit to integrating a high-surface-area template within the fluid channel of a medicine delivery device is that one can envision a number of different functional coatings that could facilitate the capture and analysis of either microbial contaminants or the medicine itself. For example, one could attach antibodies or some other binding agent with a specific affinity to the silicon nanotip template. Once a target molecule or microbe is bound to the high-surface- area template, one could use an optical analytical technique such as fluorescence or adsorption to determine the identity and potentially the concentration of the species of interest. By illuminating the bound species from the back, it may also be possible to probe only the molecules with an evanescent wave, making detection of the species from the front side of the device much simpler.

Shearn, Michael J.↗
NASA NTRS2016

Integrated Broadband Quantum Cascade Laser

A broadband, integrated quantum cascade laser is disclosed, comprising ridge waveguide quantum cascade lasers formed by applying standard semiconductor process techniques to a monolithic structure of alternating layers of claddings and active region layers. The resulting ridge waveguide quantum cascade lasers may be individually controlled by independent voltage potentials, resulting in control of the overall spectrum of the integrated quantum cascade laser source. Other embodiments are described and claimed.

Mansour, Kamjou↗
NASA NTRS1989

Optical Processing With Photorefractive Semiconductors

Experimental phase-conjugate four-wave-mixing apparatus used to demonstrate capabilities of GaAs (and potentially of other photorefractive semiconductors like InP and CdTe) for optical processing of information. With modifications, performs any of three basic image-processing functions: transfer to different light beam, enhancement of edges, and autocorrelation. Includes crystal of GaAs of 5 by 9 by 9 mm with cubic crystalline axes. Advantages include high speed and compatibilty with other semiconductor devices.

Cheng, Li-Jen↗
NASA NTRS2012

Studies of Thermophysical Properties of Metals and Semiconductors by Containerless Processing Under Microgravity

Electromagnetic levitation under microgravity provides unique opportunities for the investigation of liquid metals, alloys and semiconductors, both above and below their melting temperatures, with minimized disturbances of the sample under investigation. The opportunity to perform such experiments will soon be available on the ISS with the EML payload which is currently being integrated. With its high-performance diagnostics systems EML allows to measure various physical properties such as heat capacity, enthalpy of fusion, viscosity, surface tension, thermal expansion coefficient, and electrical conductivity. In studies of nucleation and solidification phenomena the nucleation kinetics, phase selection, and solidification velocity can be determined. Advanced measurement capabilities currently being studied include the measurement and control of the residual oxygen content of the process atmosphere and a complementary inductive technique to measure thermophysical properties.

Seidel, A.↗
NASA NTRS1986

Producing Silicon Carbide for Semiconductor Devices

Processes proposed for production of SiC crystals for use in semiconductors operating at temperatures as high as 900 degrees C. Combination of new processes produce silicon carbide chips containing epitaxial layers. Chips of SiC first grown on porous carbon matrices, then placed in fluidized bed, where additional layer of SiC grows. Processes combined to yield complete process. Liquid crystallization process used to make SiC particles or chips for fluidized-bed process.

Hsu, G. C.↗