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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 91 records · Page 5
All sourcesNASA NTRSDOE OSTI
DOE OSTI2020

A VXS [VITA41] Trigger Processor for the 12GEV Experimental Programs at Jefferson Lab

The VXS_Trigger_Processor [VTP] was developed and commissioned for CLAS12 in the fall of 2016. This board is a VITA41 switch card and it collects data from a variety of front-end TDC and Flash ADC modules. The VTP has since been used in several experiments at Jefferson Lab serving as the L1 trigger module for a variety of detector types, such as stacked calorimeters, strip calorimeters, time-of-flight, Cerenkov, hodoscopes, drift chambers, and silicon strips. Trigger algorithms implemented include cluster finding (1D, 2D), drift chamber segment and road finding, geometry matching between various detectors, particle counting, and general global trigger bit processing. The VTP is also capable of reading out each front-end crate with up to 40Gbps Ethernet which is an enormous increase compared to the currently used 200MB/s VME bus. Recent progress has been made to show that a firmware and software upgrade can enable existing Jefferson Lab front-end crates to operate in a streaming DAQ mode. In February 2020, tests will be performed on a full calorimeter and matched hodoscope which are components of the CLAS12 Forward Tagger detector system with beam in Hall B. This paper details the hardware performance, triggered, and streaming applications that have been implemented using the VTP for several experiments at Jefferson Lab.

ABBOTT, David↗
DOE OSTI2024

A Hydropower facility as an Energy Water Signal Processor

In recent times, various efforts have been made to address the challenge of adequately representing hydropower systems in modeling frameworks, accounting for the lack of data to represent the multiple constraints in hydropower operation. This research is a pilot data-driven methodology for characterizing, classifying, and comparing the water-to-energy and energy-to-water signal transformations that hydropower facilities as signal processors accomplish. In this study, a Box Jenkins transfer function/noise model is used to identify the relationship between reservoir inflows and outflows. For examining the feasibility of this methodology, 5-minute fleet data for five storage and five run-of-river facilities was provided by the Tennessee Valley Authority (TVA) and transfer function models are developed. The influence of past inflow and outflow values on the current outflow decisions was investigated and summarized by examining the results of Box Jenkins methodology. Finally, dominance analysis was introduced to add value to the Box Jenkins model results and provide different stakeholders with a set of concepts to convey the functionality of hydropower.

13 HYDRO ENERGY↗
DOE OSTI2024

Simulating strongly correlated molecules with a superconducting quantum processor

Many of the biggest challenges in expanding the nation’s access to clean and low-cost energy resources are fundamentally chemistry or materials challenges. An important case is the development of new catalysts for the up-conversion of cheap and readily available materials such as methane or water into materials suitable for use as a fuel such as methanol or oxygen. To understand and exploit such processes, computer simulations of chemical reactions provide a natural complement to experimental studies. Unfortunately, most catalytic reactions involve so-called “strongly correlated” molecules which are notoriously difficult to study with simulation algorithms that can be executed on existing (classical) computers. The recent growth in quantum information science offers an alternative potential route for simulating these difficult systems. As a result, an increasing number of computational chemists are becoming interested in quantum computing. At the same time, quantum information scientists have identified chemistry simulation as a possible first demonstration of a quantum computer providing an improvement over a classical computer. The objective of this project is to accurately simulate strongly correlated molecules on a quantum processor. To meet the high challenges of this objective, new hybrid quantum/classical algorithms will be co-designed with advanced quantum gate developments and computed on customized quantum hardware. Some of the developed techniques will be transferable to study other molecular systems, while the project as a whole will help define better strategies for advancing the quantum simulation of matter more generally.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗
DOE OSTI2024

Building Qudit-Based Quantum Computing Processors using Superconducting RF Cavities

Superconducting radio frequency (SRF) cavities provide an excellent platform for storing quantum information as quantum d-level systems (qudits) due to their exceptionally long lifetimes and large accessible Hilbert spaces. A common strategy to manipulate the states is to use a nonlinear element like a transmon. There are, however, several challenges to building a 3D SRF architecture while maintaining a long cavity lifetime. We demonstrate our successful integration of transmons with single-cell Nb SRF cavities and the ability to prepare several non-classical states. Finally, we discuss our strategies to improve the coherence times, gate schemes, and extend the system for building a multi-qudit quantum processor.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗
DOE OSTI2024

SQMS science advances impact on Rigetti commercial processors

The collaboration between the Superconducting Quantum Materials and Systems Center (SQMS) and Rigetti Computing produced several advancements in our understanding of the role of materials characteristics in quantum processor performance. This partnership leverages SQMS's extensive characterization infrastructure and cutting-edge research in materials, and Rigetti's expertise in quantum hardware and robust nanofabrication to improve precision and performance of Rigetti's test QPUs. Qubit frequency is determined in large part by the properties of Josephson junctions (JJs) made of amorphous oxide tunnel barriers; the Alternating-Bias Assisted Annealing (ABAA) process allows us to tune JJs to their desired frequency [1]. Work by SQMS researchers in characterizing high-precision JJs post-processed (using ABAA) have yielded crucial information on the nature of the structure and chemical bonding uniformity of the ABAA processed amorphous oxides. Performance has also been improved through a comprehensive series of experiments that tested encapsulation and surface treatment. Encapsulation of the niobium metal layer with tantalum resulted in an T1 improvement of 80%, experimentally confirming the role of Nb surface losses in qubit performance [2]. Pre-treatment of the underlying silicon surface prior to JJ fabrication by replacing a buffered oxide etch (BOE) with hydrofluoric acid (HF) followed by aqueous ammonium fluoride (NH4F) has shown a statistically significant improvement of T1 by 22%, and reduction in the number of strongly-coupled TLS [3]. These examples, as well as many other published and ongoing investigations, demonstrate the mutual benefits that come from Rigetti's involvement in the SQMS collaboration. [1] - Pappas, D.P., et al. (2024). https://doi.org/10.1038/s43246-024-00596-z [2] - Bal, M., et al. (2024). https://doi.org/10.1038/s41534-024-00840-x [3] Kopas, C. J. et al. Preprint at https://doi.org/10.48550/arXiv.2408.02863 (2024).

Lachman, Ella↗
DOE OSTI2020

RD53 analog front-end processors for the ATLAS and CMS experiments at the High-Luminosity LHC

This work discusses the design and the main results relevant to the characterization of analog front-end processors in view of their operation in the pixel detector readout chips of ATLAS and CMS at the High-Luminosity LHC. The front-end channels presented in this paper are part of RD53A, a large scale demonstrator designed in a 65 nm CMOS technology by the RD53 collaboration.The collaboration is now developing the full-sized readout chips for the actual experiments. Some details on the improvements implemented in the analog front-ends are provided in the paper.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2023

Characterizing and mitigating coherent errors in a trapped ion quantum processor using hidden inverses

Quantum computing testbeds exhibit high-fidelity quantum control over small collections of qubits, enabling performance of precise, repeatable operations followed by measurements. Currently, these noisy intermediate-scale devices can support a sufficient number of sequential operations prior to decoherence such that near term algorithms can be performed with proximate accuracy (like chemical accuracy for quantum chemistry problems). While the results of these algorithms are imperfect, these imperfections can help bootstrap quantum computer testbed development. Demonstrations of these algorithms over the past few years, coupled with the idea that imperfect algorithm performance can be caused by several dominant noise sources in the quantum processor, which can be measured and calibrated during algorithm execution or in post-processing, has led to the use of noise mitigation to improve typical computational results. Conversely, benchmark algorithms coupled with noise mitigation can help diagnose the nature of the noise, whether systematic or purely random. Here, we outline the use of coherent noise mitigation techniques as a characterization tool in trapped-ion testbeds. We perform model-fitting of the noisy data to determine the noise source based on realistic physics focused noise models and demonstrate that systematic noise amplification coupled with error mitigation schemes provides useful data for noise model deduction. Further, in order to connect lower level noise model details with application specific performance of near term algorithms, we experimentally construct the loss landscape of a variational algorithm under various injected noise sources coupled with error mitigation techniques. This type of connection enables application-aware hardware codesign, in which the most important noise sources in specific applications, like quantum chemistry, become foci of improvement in subsequent hardware generations.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2025

Ground state energy and magnetization curve of a frustrated magnetic system from real-time evolution on a digital quantum processor

Models of interacting many-body quantum systems that may realize new exotic phases of matter, notably quantum spin liquids, are challenging to study using even state-of-the-art classical methods such as tensor network simulations. Quantum computing provides a promising route for overcoming these difficulties to find ground states, dynamics, and more. In this paper, we argue that recently developed hybrid quantum-classical algorithms based on real-time evolution are promising methods for solving a particularly important model in the search for spin liquids, the antiferromagnetic Heisenberg model on the two-dimensional kagome lattice. We show how to construct efficient quantum circuits to implement time evolution for the model and to evaluate key observables on the quantum computer, and we argue that the method has favorable scaling with increasing system size. We then restrict to a 12-spin star plaquette from the kagome lattice and a related 8-spin system, and we give an empirical demonstration on these small systems that the hybrid algorithms can efficiently find the ground state energy and the magnetization curve. For these demonstrations, we use four levels of approximation: exact state vectors, exact state vectors with statistical noise from sampling, noisy classical emulators, and (for the 8-spin system only) real quantum hardware, specifically the Quantinuum H1-1 processor; for the noisy simulations and hardware demonstration, we also employ error mitigation strategies based on the symmetries of the Hamiltonian. Our results strongly suggest that these hybrid algorithms present a promising direction for studying quantum spin liquids and more generally for resolving important unsolved problems in condensed matter theory and beyond.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2025

Near-Term Application Engineering Challenges in Emerging Superconducting Qudit Processors

We review the prospects to build quantum processors based on superconducting transmons and radiofrequency cavities for testing applications in the NISQ era. We identify engineering opportunities and challenges for implementation of algorithms in simulation, combinatorial optimization, and quantum machine learning in qudit-based quantum computers.

Venturelli, Davide [RIACS, Mtn. View] (ORCID:00000↗
DOE OSTI2022

Compressing micro-operations in scheduler entries in a processor

An electronic device includes a processor having a micro-operation queue, multiple scheduler entries, and scheduler compression logic. When a pair of micro-operations in the micro-operation queue is compressible in accordance with one or more compressibility rules, the scheduler compression logic acquires the pair of micro-operations from the micro-operation queue and stores information from both micro-operations of the pair of micro-operations into different portions in a single scheduler entry. In this way, the scheduler compression logic compresses the pair of micro-operations into the single scheduler entry.

Boyer, Michael W.↗
DOE OSTI2023

Quantum frequency processor for provable cybersecurity

Methods of quantum key distribution include receiving a frequency bin photon at a location, selecting a frequency bin photon quantum key distribution measurement basis, with a quantum frequency processor, performing a measurement basis transformation on the received frequency bin photon so that the frequency bin photon is measurable in the selected frequency bin photon quantum key distribution measurement basis, and detecting the frequency bin photon in the selected quantum key distribution measurement basis and assigning a quantum key distribution key value based on the detection to a portion of a quantum key distribution key. Apparatus and methods for encoding, decoding, transmitting, and receiving frequency bin photons are disclosed.

Lukens, Joseph M.↗
DOE OSTI2023

Filtering micro-operations for a micro-operation cache in a processor

A processor includes a micro-operation cache having a plurality of micro-operation cache entries for storing micro-operations decoded from instruction groups and a micro-operation filter having a plurality of micro-operation filter table entries for storing identifiers of instruction groups for which the micro-operations are predicted dead on fill if stored in the micro-operation cache. The micro-operation filter receives an identifier for an instruction group. The micro-operation filter then prevents a copy of the micro-operations from the first instruction group from being stored in the micro-operation cache when a micro-operation filter table entry includes an identifier that matches the first identifier.

Scrbak, Marko↗
DOE OSTI2024

Quantum frequency processor for provable cybersecurity

Methods of quantum key distribution include receiving a frequency bin photon at a location, selecting a frequency bin photon quantum key distribution measurement basis, with a quantum frequency processor, performing a measurement basis transformation on the received frequency bin photon so that the frequency bin photon is measurable in the selected frequency bin photon quantum key distribution measurement basis, and detecting the frequency bin photon in the selected quantum key distribution measurement basis and assigning a quantum key distribution key value based on the detection to a portion of a quantum key distribution key. Apparatus and methods for encoding, decoding, transmitting, and receiving frequency bin photons are disclosed.

Lukens, Joseph M.↗
DOE OSTI2023

Sparse matrix‐vector and matrix‐multivector products for the truncated SVD on graphics processors

Summary Many practical algorithms for numerical rank computations implement an iterative procedure that involves repeated multiplications of a vector, or a collection of vectors, with both a sparse matrix and its transpose. Unfortunately, the realization of these sparse products on current high performance libraries often deliver much lower arithmetic throughput when the matrix involved in the product is transposed. In this work, we propose a hybrid sparse matrix layout, named CSRC, that combines the flexibility of some well‐known sparse formats to offer a number of appealing properties: (1) CSRC can be obtained at low cost from the popular CSR (compressed sparse row) format; (2) CSRC has similar storage requirements as CSR; and especially, (3) the implementation of the sparse product kernels delivers high performance for both the direct product and its transposed variant on modern graphics accelerators thanks to a significant reduction of atomic operations compared to a conventional implementation based on CSR. This solution thus renders considerably higher performance when integrated into an iterative algorithm for the truncated singular value decomposition (SVD), such as the randomized SVD or, as demonstrated in the experimental results, the block Golub–Kahan–Lanczos algorithm.

Aliaga, José I.↗
DOE OSTI2025

ReSpike: A Co-Design Framework for Evaluating SNNs on ReRAM-Based Neuromorphic Processors

With Moore’s law approaching its end, traditional von Neumann architectures are struggling to keep up with the exceeding performance and memory requirements of artificial intelligence and machine learning algorithms. Unconventional computing approaches such as neuromorphic computing that leverage spiking neural networks (SNNs) to perform computation are gaining traction and seek the paradigm shift necessary to sustain the increasing demands of modern applications. Novel memory technologies, such as resistive RAM (ReRAM), employ a crossbar architecture that possesses the inherent capability of efficiently computing vector-matrix multiplication—a dominant operation in SNNs. The prospect of naturally mapping SNNs to the crossbar structures provides a unique opportunity for achieving a high-performance, power-efficient neuromorphic system. In this work, we present ReSpike, which is a new framework, behavioral simulator, and architectural design based on ReRAM crossbar architectures, enabling modeling and co-design to achieve efficient execution of SNNs. We drive this co-design forward by quantifying the impact that ReRAM cell nonidealities have on the corresponding accuracy of an SNN application.

Asifuzzaman, Kazi [ORNL] (ORCID:0000000240044791)↗