Engineering PapersSearch

SEARCH · Engineering Papers

Results for “onboard processor”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 91 records · Page 5

NASA Tech Briefs, December 2012

The topics include: Pattern Generator for Bench Test of Digital Boards; 670-GHz Down- and Up-Converting HEMT-Based Mixers; Lidar Electro-Optic Beam Switch with a Liquid Crystal Variable Retarder; Feedback Augmented Sub-Ranging (FASR) Quantizer; Real-Time Distributed Embedded Oscillator Operating Frequency Monitoring; Software Modules for the Proximity-1 Space Link Interleaved Time Synchronization (PITS) Protocol; Description and User Instructions for the Quaternion to Orbit v3 Software; AdapChem; Mars Relay Lander and Orbiter Overflight Profile Estimation; Extended Testability Analysis Tool; Interactive 3D Mars Visualization; Rapid Diagnostics of Onboard Sequences; MER Telemetry Processor; pyam: Python Implementation of YaM; Process for Patterning Indium for Bump Bonding; Archway for Radiation and Micrometeorite Occurrence Resistance; 4D Light Field Imaging System Using Programmable Aperture; Device and Container for Reheating and Sterilization; Radio Frequency Plasma Discharge Lamps for Use as Stable Calibration Light Sources; Membrane Shell Reflector Segment Antenna; High-Speed Transport of Fluid Drops and Solid Particles via Surface Acoustic Waves; Compact Autonomous Hemispheric Vision System; A Distributive, Non-Destructive, Real-Time Approach to Snowpack Monitoring; Wideband Single-Crystal Transducer for Bone Characterization; Numerical Simulation of Rocket Exhaust Interaction With Lunar Soil; Motion Imagery and Robotics Application (MIRA): Standards-Based Robotics; Particle Filtering for Model-Based Anomaly Detection in Sensor Networks; Ka-band Digitally Beamformed Airborne Radar Using SweepSAR Technique; Composite With In Situ Plenums; Multi-Beam Approach for Accelerating Alignment and Calibration of HyspIRI-Like Imaging Spectrometers; JWST Lifting System; Next-Generation Tumbleweed Rover; Pneumatic System for Concentration of Micrometer-Size Lunar Soil.

Source record

Real-time SAR image processing onboard a Venus orbiting spacecraft

The potential use of real-time SAR processing to produce 200-meter resolution imagery onboard a 1983 Venus Orbiter Imaging Radar (VOIR) spacecraft is discussed. The current NASA SAR processor development program and its relationship to the VOIR application are described. VOIR SAR processing requirements are defined in terms of a nominal baseline design evolving from a 1977 VOIR mission study by JPL. A candidate onboard SAR processor architecture compatible with the VOIR requirements is described. Detailed implementation characteristics, based on currently available integrated circuits, are estimated in terms of chip count, weight, and power.

Arens, W. E.

Fault-tolerant onboard digital information switching and routing for communications satellites

The NASA Lewis Research Center is developing an information-switching processor for future meshed very-small-aperture terminal (VSAT) communications satellites. The information-switching processor will switch and route baseband user data onboard the VSAT satellite to connect thousands of Earth terminals. Fault tolerance is a critical issue in developing information-switching processor circuitry that will provide and maintain reliable communications services. In parallel with the conceptual development of the meshed VSAT satellite network architecture, NASA designed and built a simple test bed for developing and demonstrating baseband switch architectures and fault-tolerance techniques. The meshed VSAT architecture and the switching demonstration test bed are described, and the initial switching architecture and the fault-tolerance techniques that were developed and tested are discussed.

Shalkhauser, Mary JO

Radar satellite altimetry and ocean wave height estimation

The design of a radar satellite altimeter having a plus or minus 10 cm topographic resolution at 20 meter (peak-to-trough) ocean wave heights is described. In addition to altimetry, the resulting design also provides a measurement of significant wave height over the range of 1.0 to 20 meters to within plus or minus 10%. A full deramp pulse compression technique followed by an analog filter bank to separate individual range returns is used in the radar transmitter/receiver design to reduce the A/D converter bandwidth from a rather impractical 330 MHz to less than 1 MHz. The altimeter design utilizes an onboard maximum likelihood estimate (MLE) processor to achieve the plus or minus 10 cm topographic resolution. It is shown that an MLE processor provides simultaneous optimum (minimum variance) estimates of satellite altitude, ocean wave height and electromagnetic ocean surface reflectivity.

Dooley, R. P.

Digital Radar-Signal Processors Implemented in FPGAs

High-performance digital electronic circuits for onboard processing of return signals in an airborne precipitation- measuring radar system have been implemented in commercially available field-programmable gate arrays (FPGAs). Previously, it was standard practice to downlink the radar-return data to a ground station for postprocessing a costly practice that prevents the nearly-real-time use of the data for automated targeting. In principle, the onboard processing could be performed by a system of about 20 personal- computer-type microprocessors; relative to such a system, the present FPGA-based processor is much smaller and consumes much less power. Alternatively, the onboard processing could be performed by an application-specific integrated circuit (ASIC), but in comparison with an ASIC implementation, the present FPGA implementation offers the advantages of (1) greater flexibility for research applications like the present one and (2) lower cost in the small production volumes typical of research applications. The generation and processing of signals in the airborne precipitation measuring radar system in question involves the following especially notable steps: The system utilizes a total of four channels two carrier frequencies and two polarizations at each frequency. The system uses pulse compression: that is, the transmitted pulse is spread out in time and the received echo of the pulse is processed with a matched filter to despread it. The return signal is band-limited and digitally demodulated to a complex baseband signal that, for each pulse, comprises a large number of samples. Each complex pair of samples (denoted a range gate in radar terminology) is associated with a numerical index that corresponds to a specific time offset from the beginning of the radar pulse, so that each such pair represents the energy reflected from a specific range. This energy and the average echo power are computed. The phase of each range bin is compared to the previous echo by complex conjugate multiplication to obtain the mean Doppler shift (and hence the mean and variance of the velocity of precipitation) of the echo at that range.

Berkun, Andrew

Helmet-Mounted Display Research Capabilities of the NASA/Army Rotorcraft Aircrew Systems Concepts Airborne Laboratory (RASCAL)

The Rotorcraft Aircrew Systems Concepts Airborne Laboratory (RASCAL) is a UH-60A Black Hawk helicopter that is being modified by the US Army and NASA for flight systems research. The principal systems that are being installed in the aircraft are a Helmet Mounted Display (HMD) and imaging system, and a programmable full authority Research Flight Control System (RFCS). In addition, comprehensive instrumentation of both the rigid body of the helicopter and the rotor system is provided. The paper will describe the capabilities of these systems and their current state of development. A brief description of initial research applications is included. The wide (40 X 60 degree) field-of-view HMD system has been provided by Kaiser Electronics. It can be configured as a monochromatic system for use in bright daylight conditions, a two color system for darker ambients, or a full color system for use in night viewing conditions. Color imagery is achieved using field sequential video and a mechanical color wheel. In addition to the color symbology, high resolution computer-gene rated imagery from an onboard Silicon Graphics Reality Engine Onyx processor is available for research in virtual reality applications. This synthetic imagery can also be merged with real world video from a variety of imaging systems that can be installed easily on the front of the helicopter. These sensors include infrared or tv cameras, or potentially small millimeter wave radars. The Research Flight Control System is being developed for the aircraft by a team of contractors led by Boeing Helicopters. It consists of a full authority high bandwidth fly-by-wire actuators that drive the main rotor swashplate actuators and the tail rotor actuator in parallel. This arrangement allows the basic mechanical flight control system of the Black Hawk to be retained so that the safety pilot can monitor the operation of the system through the action of his own controls. The evaluation pilot will signal the fly-by-wire actuators through the flight computer from electrical sidearm controllers located in the right hand cockpit. The system will have very substantial input/output capacity and impressive computational power. These systems are installed in the aircraft using predominantly a MIL-STD 1553B data bus architecture. Sensor data from the RFCS, the basic aircraft and rotor system instrumentation including navigation information, and the HMD system are easily exchanged among user systems, or are available at the systems operator station located in the cabin for real time monitoring or data recording.

Jacobsen, R. A.

Network-Capable Application Process and Wireless Intelligent Sensors for ISHM

Intelligent sensor technology and systems are increasingly becoming attractive means to serve as frameworks for intelligent rocket test facilities with embedded intelligent sensor elements, distributed data acquisition elements, and onboard data acquisition elements. Networked intelligent processors enable users and systems integrators to automatically configure their measurement automation systems for analog sensors. NASA and leading sensor vendors are working together to apply the IEEE 1451 standard for adding plug-and-play capabilities for wireless analog transducers through the use of a Transducer Electronic Data Sheet (TEDS) in order to simplify sensor setup, use, and maintenance, to automatically obtain calibration data, and to eliminate manual data entry and error. A TEDS contains the critical information needed by an instrument or measurement system to identify, characterize, interface, and properly use the signal from an analog sensor. A TEDS is deployed for a sensor in one of two ways. First, the TEDS can reside in embedded, nonvolatile memory (typically flash memory) within the intelligent processor. Second, a virtual TEDS can exist as a separate file, downloadable from the Internet. This concept of virtual TEDS extends the benefits of the standardized TEDS to legacy sensors and applications where the embedded memory is not available. An HTML-based user interface provides a visual tool to interface with those distributed sensors that a TEDS is associated with, to automate the sensor management process. Implementing and deploying the IEEE 1451.1-based Network-Capable Application Process (NCAP) can achieve support for intelligent process in Integrated Systems Health Management (ISHM) for the purpose of monitoring, detection of anomalies, diagnosis of causes of anomalies, prediction of future anomalies, mitigation to maintain operability, and integrated awareness of system health by the operator. It can also support local data collection and storage. This invention enables wide-area sensing and employs numerous globally distributed sensing devices that observe the physical world through the existing sensor network. This innovation enables distributed storage, distributed processing, distributed intelligence, and the availability of DiaK (Data, Information, and Knowledge) to any element as needed. It also enables the simultaneous execution of multiple processes, and represents models that contribute to the determination of the condition and health of each element in the system. The NCAP (intelligent process) can configure data-collection and filtering processes in reaction to sensed data, allowing it to decide when and how to adapt collection and processing with regard to sophisticated analysis of data derived from multiple sensors. The user will be able to view the sensing device network as a single unit that supports a high-level query language. Each query would be able to operate over data collected from across the global sensor network just as a search query encompasses millions of Web pages. The sensor web can preserve ubiquitous information access between the querier and the queried data. Pervasive monitoring of the physical world raises significant data and privacy concerns. This innovation enables different authorities to control portions of the sensing infrastructure, and sensor service authors may wish to compose services across authority boundaries.

Figueroa, Fernando

A CCD image transducer and processor suitable for space flight

A satellite borne extreme ultraviolet solar telescope makes use of CCD area arrays for both image readout and onboard data processing. The instrument is designed to view the inner solar corona in the wavelength band 170 - 630 A, and the output video stream may be selected by ground command to present the coronal scene, or the time-rate-of-change of the scene. Details of the CCD application to onboard image processing are described, and a discussion of the processor's potential for telemetry bandwidth compression is included. Optical coupling methods, data storage requirements, spatial and temporal resolution, and nonsymmetry of resolution (pitch) in the CCD are discussed.

Michels, D. J.

Video image processor on the Spacelab 2 Solar Optical Universal Polarimeter /SL2 SOUP/

The SOUP instrument is designed to obtain diffraction-limited digital images of the sun with high photometric accuracy. The Video Processor originated from the requirement to provide onboard real-time image processing, both to reduce the telemetry rate and to provide meaningful video displays of scientific data to the payload crew. This original concept has evolved into a versatile digital processing system with a multitude of other uses in the SOUP program. The central element in the Video Processor design is a 16-bit central processing unit based on 2900 family bipolar bit-slice devices. All arithmetic, logical and I/O operations are under control of microprograms, stored in programmable read-only memory and initiated by commands from the LSI-11. Several functions of the Video Processor are described, including interface to the High Rate Multiplexer downlink, cosmetic and scientific data processing, scan conversion for crew displays, focus and exposure testing, and use as ground support equipment.

Lindgren, R. W.

NASA SpaceCube Edge TPU SmallSat Card for Autonomous Operations and Onboard Science-Data Analysis

Using state-of-the-art artificial intelligence (AI)frameworks onboard spacecraft is challenging because common spacecraft processors cannot provide comparable performance to datacenters with server-grade CPUs and GPUs available for terrestrial applications and advanced deep-learning networks. This limitation makes small, lo w-p o we r AI microchip architectures, such as the Google Coral Edge Tensor Processing Unit (TPU), attractive for space missions where the application-specific design enables both high-performance and power-efficient computing for AI applications. To address these challenging considerations for space deployment, this research introduces the design and capabilities of a CubeSat-sized Edge TPU-based co-processor card, known as the SpaceCube Low-power Ed g e Artificial Intelligence Resilient Node (SC-LEARN). This design conforms to NASA’s CubeSat Card Specification (CS2) for integration into next-generation SmallSat and CubeSat systems. This paper describes the overarching architecture and design of the SC-LEARN, as well as, the supporting test card designed for rapid prototyping and evaluation. The SC-LEARN was developed with three operational modes: (1) a high-performance parallel-processing mode,(2)a fault-tolerant mode for onboard resilience, and (3) a power-saving mode with cold spares. Importantly, this research also elaborates on both training and quantization of Tensor Flow models for the SC-LEARN for use onboard with representative, open-source datasets. Lastly, we describe future research plans, including radiation-beam testing and flight demonstration.

Advanced avionics

Using a Multicore Processor for Rover Autonomous Science

Multicore processing promises to be a critical component of future spacecraft. It provides immense increases in onboard processing power and provides an environment for directly supporting fault-tolerant computing. This paper discusses using a state-of-the-art multicore processor to efficiently perform image analysis onboard a Mars rover in support of autonomous science activities.

Mars

Onboard Experiment Data Support Facility (OEDSF): Conceptual design study

The Onboard Experimental Data Support Facility (OEDSF) is an inflight data processor based on a totally new architecture specifically developed to cost-effectively process the data of Shuttle payloads sensors. Processing data onboard fills the following needs: (1) reduction of data bulk by conversion to information (2)quick-look for evaluation, interactive operation, etc. (3) real-time computation of engineering representation of sensed phenomena. For example: Value of backscatter coefficient (sigma) of a scatterometer as a function of latitude and longitude (4) exploitation of the real-time availability of ancillary data, thereby obviating the need for time-tagging, recording, and recorrelation and (5) providing data or information immediately usable by the experimenter or user. The OEDSF is made up of modular and cascadable matrix processors. Each matrix has been sized to process the data of a full typical shuttle payload. Cost analyses indicate that significant savings are realized by processing data with the OEDSF compared with conventional ground facilities.

Source record

Software techniques for a distributed real-time processing system

The paper describes software techniques developed for the Unified Data System (UDS), a distributed processor network for control and data handling onboard a planetary spacecraft. These techniques include a structured language for specifying the programs contained in each module, and a small executive program in each module which performs scheduling and implements the module task.

Lesh, F.

Multi-user satellite communications system using an innovative compressive receiver

There is a need for an onboard simultaneous multi-channel demodulation system for a satellite communications system. Studies indicate that Convolve Multiply Convolve (CMC) filtering with surface acoustic wave (SAW) dispersive delay lines will eliminate the necessity of onboard satellite channelized filters of complex fourier transform processors. The reason for choosing the CMC technique is its ability to perform Fourier transformations in a shorter time with less space and power consumption than digital Fourier transform processors. Each ground terminal in this multi-users communications system is remotely located and operates independently; hence, a method of synchronizing the transmission of these users is presented which utilizes the existing Global Positioning System (GPS) system. Each ground user is equipped with a low cost ground terminal that has a synchronization subsystem attached to it. The system design of an onboard Multi-channel Receiver and Demodulator utilizes Quadrature Phase Shift Keying (QPSK) as the modulation technique. This technique provides the best figure of merit, i.e., the lowest transmitter power requirement per communication channel.

Staples, Edward J.

Extending the International Space Station Life and Operability

The International Space Station (ISS) is in an operational configuration with final assembly complete. To fully utilize ISS and extend the operational life, it became necessary to upgrade and extend the onboard systems with the Obsolescence Driven Avionics Redesign (ODAR) project. ODAR enabled a joint project between the Johnson Space Center (JSC) and Marshall Space Flight Center (MSFC) focused on upgrading the onboard payload and Ku-Band systems, expanding the voice and video capabilities, and including more modern protocols allowing unprecedented access for payload investigators to their on-orbit payloads. The MSFC Huntsville Operations Support Center (HOSC) was tasked with developing a high-rate enhanced Functionally Distributed Processor (eFDP) to handle 300Mbps Return Link data, double the legacy rate, and incorporate a Line Outage Recorder (LOR). The eFDP also provides a 25Mbps uplink transmission rate with a Space Link Extension (SLE) interface. HOSC also updated the Payload Data Services System (PDSS) to incorporate the latest Consultative Committee for Space Data Systems (CCSDS) protocols, most notably the use of the Internet Protocol (IP) Encapsulation, in addition to the legacy capabilities. The Central Command Processor was also updated to interact with the new onboard and ground capabilities of Mission Control Center -- Houston (MCC-H) for the uplink functionality. The architecture, implementation, and lessons learned, including integration and incorporation of Commercial Off The Shelf (COTS) hardware and software into the operational mission of the ISS, is described herein. The applicability of this new technology provides new benefits to ISS payload users and ensures better utilization of the ISS by the science community

Cecil, Andrew J.