Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “memory array”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 91 records · Page 5
All sourcesNASA NTRSDOE OSTI
DOE OSTI2026

Spatiotemporal Thermal Coupling in VO 2 Device Arrays

Correlated oxides such as VO 2 exhibit an electrically driven insulator–metal transition (IMT) that underlies their promise for neuromorphic and memory devices. Yet the IMT is not a uniform bulk process but a spatiotemporal phenomenon in which local heating nucleates filaments, contracts or dissolves them with the electric field, and couples to the environment. In this work, we directly image the VO 2 IMT dynamics by mid-wave infrared, thermography synchronized with electrical transport, resolving device temperature with micrometer spatial and microsecond temporal resolution. At the single-device level, we capture the full cycle of filament nucleation, contraction, and relaxation during current/voltage-driven resistive switching. At the array level, we show that heat propagates across etched gaps with an effective length scale of ∼131 µm, enabling cooperative behaviors among electrically isolated devices. Short-range distanced devices exhibit mutual filament attraction and sequential dissolution, while long-range distanced devices differentiate into distinct roles: drivers that initiate switching, cooperative responders that undergo assisted self-oscillations, and passive reporters that record the thermal field. Furthermore, these results reframe thermal crosstalk, long regarded as parasitic, as an intrinsic coupling channel and design principle for organizing collective switching behaviors, with direct implications for emergent circuit functionality in neuromorphic and unconventional computing architectures.

coupling↗
DOE OSTI2026

CORE-BFS: Communication-Optimized REctangular-partitioned BFS Achieving 160.845 TeraTEPS on Frontier Supercomputer

Distributed Breadth-First Search (BFS) is fundamental to many large-scale graph applications, but its performance on parallel systems is often limited by high communication overhead. This paper presents CORE-BFS, an extremely scalable GPU-based BFS implementation that introduces a unique rectangular 2D partitioning-based design for Frontier supercomputer. To further improve performance, we propose four key optimizations: (1) Rectangular 2D-partition specific data formats that use two compressed row and one compressed column status array bitmaps combined with a Double Compressed Sparse Row (DCSR) format per partition, reducing memory footprint and inter-rank traffic; (2) Adaptive frontier & communication strategy that unifies top-down and bottom-up traversal on the rectangular layout, uses lazy synchronization in top-down levels, and switches variants based on frontier size to minimize communication overhead; (3) Frontier-split degree-aware update that maps frontier vertices to thread-centric, wavefront-centric, and block-centric kernels based on their degree to improve GPU utilization and memory coalescing; (4) Row-reduction pipeline that overlaps bottom-up adjacency list processing with row-wise bitmap reduction to hide inter-rank latency. Together, these techniques increase parallelism while reducing memory and communication overhead. On the Graph500 benchmark, CORE - BFS scales up to 9,248 Frontier nodes with scale-42 graphs and reaches 160.845 TTEPS, delivering a 5.42 × speedup over our previous Frontier implementation.

Yang, Haoshen [Rutgers University]↗
DOE OSTI2024

Characterization of ECRAM materials and devices

As the limits of Moore’s Law approaches, new computing paradigms are developing to breakthrough this bottleneck. One such computer architecture is neuromorphic computing, which models the brain. Electrochemical random-access memory (ECRAM) is a low power and energy efficient memory due to characteristics, such as in-memory compute, ion modulation of the channel conductance, and computation distribution with large scale array integration.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2025

Multiplexed color centers in a silicon photonic cavity array

Entanglement distribution is central to the modular scaling of quantum processors and establishing quantum networks. Color centers with telecom-band transitions and long spin coherence times are suitable candidates for long-distance entanglement distribution. However, high-bandwidth memory-enhanced quantum communication is limited by high-yield, scalable creation of efficient spin-photon interfaces. Here, we develop a silicon photonics platform consisting of arrays of bus-coupled cavities. The coupling to a common bus waveguide enables simultaneous access to individually addressable cavity-enhanced T center arrays. We demonstrate frequency-multiplexed operation of two T centers in separate photonic crystal cavities. In addition, we investigate the cavity enhancement of a T center through hybridized modes formed between physically distant cavities. Our results show that bus-coupled arrays of cavity-enhanced color centers could enable efficient on-chip and long-distance entanglement distribution.

Komza, Lukasz↗
DOE OSTI2021

Deep-Learning based Reconstruction of the Shower Maximum $X_{\mathrm{max}}$ using the Water-Cherenkov Detectors of the Pierre Auger Observatory

The atmospheric depth of the air shower maximum X max is an observable commonly used for the determination of the nuclear mass composition of ultra-high energy cosmic rays. Direct measurements of X max are performed using observations of the longitudinal shower development with fluorescence telescopes. At the same time, several methods have been proposed for an indirect estimation of X max from the characteristics of the shower particles registered with surface detector arrays. In this paper, we present a deep neural network (DNN) for the estimation of X max . The reconstruction relies on the signals induced by shower particles in the ground based water-Cherenkov detectors of the Pierre Auger Observatory. The network architecture features recurrent long short-term memory layers to process the temporal structure of signals and hexagonal convolutions to exploit the symmetry of the surface detector array. We evaluate the performance of the network using air showers simulated with three different hadronic interaction models. Thereafter, we account for long-term detector effects and calibrate the reconstructed X max using fluorescence measurements. Finally, we show that the event-by-event resolution in the reconstruction of the shower maximum improves with increasing shower energy and reaches less than 25 g/cm 2 at energies above 2 × 10 19 eV.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2022

Graphene-Based Interconnect Exploration for Large SRAM Caches for Ultrascaled Technology Nodes

Graphene-based interconnects are considered promising replacements for traditional copper (Cu) interconnect due to their great electric properties. In this article, an interconnect-memory co- design framework is developed to efficiently optimize various graphene-based interconnect technologies. Four interconnect materials and heterogeneous design schemes are benchmarked against their traditional Cu counterparts to optimize large cache-level SRAM performance in terms of delay and energy per access, energy-delay product (EDP), and energy-delay-area product (EDAP). Here, a large design space exploration is performed based on realistic subarray design and device technology. Various interconnect- and array-level design parameters are studied to quantify the true potential of graphene-based wires for optimal memory performance.

42 ENGINEERING↗
DOE OSTI2024

Refactoring the elastic–viscous–plastic solver from the sea ice model CICE v6.5.1 for improved performance

This study focuses on the performance of the elastic–viscous–plastic (EVP) dynamical solver within the sea ice model, CICE v6.5.1. The study has been conducted in two steps. First, the standard EVP solver was extracted from CICE for experiments with refactored versions, which are used for performance testing. Second, one refactored version was integrated and tested in the full CICE model to demonstrate that the new algorithms do not significantly impact the physical results. The study reveals two dominant bottlenecks, namely (1) the number of Message Parsing Interface (MPI) and Open Multi-Processing (OpenMP) synchronization points required for halo exchanges during each time step combined with the irregular domain of active sea ice points and (2) the lack of single-instruction, multiple-data (SIMD) code generation. The standard EVP solver has been refactored based on two generic patterns. The first pattern exposes how general finite differences on masked multi-dimensional arrays can be expressed in order to produce significantly better code generation by changing the memory access pattern from random access to direct access. The second pattern takes an alternative approach to handle static grid properties. The measured single-core performance improvement is more than a factor of 5 compared to the standard implementation. The refactored implementation of strong scales on the Intel® Xeon® Scalable Processors series node until the available bandwidth of the node is used. For the Intel® Xeon® CPU Max series, there is sufficient bandwidth to allow the strong scaling to continue for all the cores on the node, resulting in a single-node improvement factor of 35 over the standard implementation. This study also demonstrates improved performance on GPU processors.

58 GEOSCIENCES↗
DOE OSTI2024

Harnessing ML Privacy by Design Through Crossbar Array Non-idealities

Deep Neural Networks (DNNs), handling computeand data-intensive tasks, often utilize accelerators like Resistiveswitching Random-access Memory (RRAM) crossbar for energyefficient in-memory computation. Despite RRAM’s inherent nonidealities causing deviations in DNN output, this study transforms the weakness into strength. By leveraging RRAM non-idealities, the research enhances privacy protection against Membership Inference Attacks (MIAs), which reveal private information from training data. RRAM non-idealities disrupt MIA features, increasing model robustness and revealing a privacy-accuracy tradeoff. Empirical results with four MIAs and DNNs trained on different datasets demonstrate significant privacy leakage reduction with a minor accuracy drop (e.g., up to 2.8% for ResNet-18 with CIFAR-100).

artificial intelligence↗
DOE OSTI2025

Ice sculpting: An artificial spin ice Tutorial on controlling microstate and geometry for magnonics and neuromorphic computing

Artificial spin ice, arrays of strongly interacting nanomagnets, are complex magnetic systems with many emergent properties, rich microstate spaces, intrinsic physical memory, high-frequency dynamics in the GHz range, and compatibility with a broad range of measurement approaches. This Tutorial article aims to provide the foundational knowledge needed to understand, design, develop, and improve the dynamic properties of artificial spin ice. Special emphasis is placed on introducing the theory of micromagnetics, which describes the complex dynamics within these systems, along with their design, fabrication methods, and standard measurement and control techniques. The article begins with a review of the historical background, introducing the underlying physical phenomena and interactions that govern artificial spin ice. We then explore the standard experimental techniques used to prepare the microstate space of the nanomagnetic array and to characterize magnetization dynamics, both in artificial spin ice and more broadly in ferromagnetic materials. Finally, we introduce the basics of neuromorphic computing applied to the case of artificial spin ice systems with a goal to help researchers new to the field grasp these exciting new developments.

Sultana, Rawnak [Univ. of Delaware, Newark, DE (Un↗
DOE OSTI2022

Two–Photon Printing of Shape–Memory Microstructures and Metasurfaces via Radical–Mediated Thiol–Vinyl Hydrothiolation

Shape-memory resists capable of high-resolution curing into arbitrarily designed structures are increasingly demanded for soft robotics, optical sensors, microscale manufacturing, and biomedicine. Amorphous, shape-memory thiol-vinyl networks were printed using two-photon polymerization (2PP) curing of a simple resin formulated with commercially available reagents. The ability to print high-resolution feature sizes down to 200 nm is attributed to the use of radicalmediated, thiol-vinyl step-growth polymerization that quickly crosslinks the resin, limiting diffusive transport. The thermomechanical behavior of the 2PP-cured material analyzed in compression, tension and three-point bending is similar to the behavior of the UV-polymerized samples. To demonstrate the ability to design, field, and test 4D responsive microstructures, an array of nine springs with coil diameters of 330 μm was printed. Following compressive shapefixing, printed arrays can release 11 μJ of stored elastic strain energy when reheated. Further, a new concept of dichroic-memory of a metamaterial device is demonstrated by printing a twisted woodpile structure with circular dichroism as characterized by Mueller Matrix ellipsometry. Furthermore, our results demonstrate how combining high-resolution 2PP curing with stimuli-responsive molecular architectures can further the engineering of responsive microstructures and metamaterials.

36 MATERIALS SCIENCE↗
DOE OSTI2023

Moment Representation of Regularized Lattice Boltzmann Methods on NVIDIA and AMD GPUs

The lattice Boltzmann method is a highly scalable Navier-Stokes solver that has been applied to flow problems in a wide array of domains. However, the method is bandwidth-bound on modern GPU accelerators and has a large memory footprint. In this paper, we present new 2D and 3D GPU implementations of two different regularized lattice Boltzmann methods, which are not only able to achieve an acceleration of ∼ 1.4 × w.r.t. reference lattice Boltzmann implementations but also reduce the memory requirements by up to 35% and 47% in 2D and 3D simulations respectively. These new approaches are evaluated on NVIDIA and AMD GPU architectures.

Valero Lara, Pedro↗
DOE OSTI2022

New Total-Ionizing-Dose Resistant Data Storing Technique for NAND Flash Memory

This paper describes a new non-charge-based data storing technique in NAND flash memory called watermark that encodes read-only data in the form of physical properties of flash memory cells. Unlike traditional charge-based data storing method in flash memory, the proposed technique is resistant to total ionizing dose (TID) effects. To evaluate its resistance to irradiation effects, we analyze data stored in several commercial single-level-cell (SLC) flash memory chips from different vendors and technology nodes. These chips are irradiated using a Co-60 gamma-ray source array for up to 100 krad(Si) at Sandia National Laboratories. Experimental evaluation performed on a flash chip from Samsung shows that the intrinsic bit error rate (BER) of watermark increases from 0.8% for TID = 0 krad(Si) to 1% for TID = 100 krad(Si). Conversely, the BER of charge-based data stored on the same chip increases from 0% at TID = 0 krad(Si) to 1.5% at TID = 100 krad(Si). Overall, the results imply that the proposed technique may potentially offer significant improvements in data integrity relative to traditional charge-based data storage for very high radiation (TID > 100 krad(Si)) environments. These gains in data integrity relative to the charge-based data storage are useful in radiation-prone environments, but they come at the cost of increased write times and higher BERs before irradiation.

36 MATERIALS SCIENCE↗
DOE OSTI2024

Sentinel

Network intrusion detection systems (NIDS) are commonplace in network security but they frequently employ algorithms that are computational demanding requiring hardware and software with significant power requirements. Two examples of such resource-intensive algorithms used for network security are regular expression matching and broader signature pattern matching which are commonly used in deep packet inspection (DPI). Network security algorithms that have large power requirements may be a challenge for low-power internet-of-things (IoT) environments, which generally lack the power resources to implement complex security measures like computationally expensive DPI at the edge. Furthermore, IoT environments incorporating 5G standalone networks have network latency constraints beyond just power that make DPI at the edge even more difficult. Programmable logic is ideally suited for machine learning inference for DPI because of its deep instruction level parallelism and single-cycle memory access. Machine learning approaches for DPI have been explored before using the programmable logic of field programmable gate arrays (FPGA) as a potential solution for NIDS approaches that would be power-suitable for IoT. However, those previous programmable logic NIDS approaches utilize either a supervised or unsupervised learning model. Sentinel utilizes the ensemble of these two machine learning approaches known as a semi-supervised approach which has shown promise in NIDS implementations. Sentinel provides a programmable logic implementation of a semi-supervised approach for DPI which operates at much lower power and latency than a GPU implementation with negligible loss of accuracy due to quantization through a logistic regressor.

Anderson, MatthewW [Idaho National Laboratory (INL↗
DOE OSTI2022

Block-structured, equal-workload, multi-grid-nesting interface for the Boussinesq wave model FUNWAVE-TVD (Total Variation Diminishing)

Abstract. We describe the development of a block-structured, equal-CPU-load (central processing unit), multi-grid-nesting interface for the Boussinesq wave model FUNWAVE-TVD (Fully Nonlinear Boussinesq Wave Model with Total Variation Diminishing Solver). The new model framework does not interfere with the core solver, and thus the core program, FUNWAVE-TVD, is still a standalone model used for a single grid. The nesting interface manages the time sequencing and two-way nesting processes between the parent grid and child grid with grid refinement in a hierarchical manner. Workload balance in the MPI-based (message passing interface) parallelization is handled by an equal-load scheme. A strategy of shared array allocation is applied for data management that allows for a large number of nested grids without creating additional memory allocations. Four model tests are conducted to verify the nesting algorithm with assessments of model accuracy and the robustness in the application in modeling transoceanic tsunamis and coastal effects.

Choi, Young-Kwang↗
DOE OSTI2023

Distributed Quantum Computing with Photons and Atomic Memories

The promise of universal quantum computing requires scalable single- and inter-qubit control interactions. Currently, three of the leading candidate platforms for quantum computing are based on superconducting circuits, trapped ions, and neutral atom arrays. However, these systems have strong interaction with environmental and control noises that introduce decoherence of qubit states and gate operations. Alternatively, photons are well decoupled from the environment and have advantages of speed and timing for quantum computing. Photonic systems have already demonstrated capability for solving specific intractable problems like Boson sampling, but face challenges for practically scalable universal quantum computing solutions because it is extremely difficult for a single photon to “talk” to another deterministically. Here, a universal distributed quantum computing scheme based on photons and atomic-ensemble-based quantum memories is proposed. Taking the established photonic advantages, two-qubit nonlinear interaction is mediated by converting photonic qubits into quantum memory states and employing Rydberg blockade for the controlled gate operation. Spatial and temporal scalability of this scheme is demonstrated further. Furthermore, these results show photon-atom network hybrid approach can be a potential solution to universal distributed quantum computing.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2025

Coaxial Direct Ink Writing of Cholesteric Liquid Crystal Elastomers in 3D Architectures

Abstract Cholesteric liquid crystal elastomers (CLCEs) hold great promise for mechanochromic applications in anti‐counterfeiting, smart textiles, and soft robotics, thanks to the structural color and elasticity. While CLCEs are printed via direct ink writing (DIW) to fabricate free‐standing films, complex 3D structures are not fabricated due to the opposing rheological properties necessary for cholesteric alignment and multilayer stacking. Here, 3D CLCE structures are realized by utilizing coaxial DIW to print a CLC ink within a silicone ink. By tailoring the ink compositions, and thus, the rheological properties, the cholesteric phase rapidly forms without an annealing step, while the silicone shell provides encapsulation and support to the CLCE core, allowing for layer‐by‐layer printing of self‐supported 3D structures. As a demonstration, free‐standing bistable thin‐shell domes are printed. Color changes due to compressive and tensile stresses can be witnessed from the top and bottom of the inverted domes, respectively. When the domes are arranged in an array and inverted, they can snap back to their base state by uniaxial stretching, thereby functioning as mechanical sensors with memory. The additive manufacturing platform enables the rapid fabrication of 3D mechanochromic sensors thereby expanding the realm of potential applications for CLCEs.

36 MATERIALS SCIENCE↗
DOE OSTI2023

Ultra-low latency recurrent neural network inference on FPGAs for physics applications with hls4ml

Abstract Recurrent neural networks have been shown to be effective architectures for many tasks in high energy physics, and thus have been widely adopted. Their use in low-latency environments has, however, been limited as a result of the difficulties of implementing recurrent architectures on field-programmable gate arrays (FPGAs). In this paper we present an implementation of two types of recurrent neural network layers—long short-term memory and gated recurrent unit—within the hls4ml framework. We demonstrate that our implementation is capable of producing effective designs for both small and large models, and can be customized to meet specific design requirements for inference latencies and FPGA resources. We show the performance and synthesized designs for multiple neural networks, many of which are trained specifically for jet identification tasks at the CERN Large Hadron Collider.

97 MATHEMATICS AND COMPUTING↗