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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 91 records · Page 5
All sourcesNASA NTRSDOE OSTI
NASA NTRS1975

The Pioneer 10/11 and Helios A/B cosmic ray instruments

This paper describes the design and performance of a set of cosmic-ray particle experiments for the Pioneer 10/11 and Helios A/B space missions. These experiments had to be very light-weight, low-power and electronically sophisticated in order to meet the spacecraft and scientific requirements. Both sets of missions use several solid-state detector telescopes to measure protons from 100 KeV to 800 MeV and heavier ions up to Neon at 200 MeV per nucleon. Good performance is required for 7-8 years, and the system must tolerate large vibration loads and ionizing radiation doses up to 500,000 rads.

Stilwell, D. E.↗
NASA NTRS1975

The Helios A/B cosmic ray instrument /E 7/

This paper describes the design and performance of a cosmic ray particle experiment for the Helios A/B space missions. This experiment had to be very lightweight, low power and electronically sophisticated in order to meet the spacecraft and scientific requirements, and very similar to those on the Pioneer 10 and 11 missions to Jupiter. Both sets of missions use several solid-state detector telescopes to measure protons from 100 KeV to 800 MeV per nucleon. Additionally, the Helios experiment includes a proportional counter to monitor the solar X-ray activity. The experiment has functioned quite well for 5 months in space, and large quantities of data are now being received.

Trainor, J. H.↗
NASA NTRS1979

Obtaining an electrical output from a mechanical flowmeter

Circuit using optical sensor, low power counting electronics, oneclip digital-to-analog converter and operational amplifier converts mechanical readout of water, gas, fuel-oil or power meter to analog signal suitable for online processings.

Powers, W. T.↗
NASA NTRS1979

An introduction to the BANNING design automation system for shuttle microelectronic hardware development

The BANNING MOS design system is presented. It complements rather than supplant the normal design activities associated with the design and fabrication of low-power digital electronic equipment. BANNING is user-oriented and requires no programming experience to use effectively. It provides the user a simulation capability to aid in his circuit design and it eliminates most of the manual operations involved in the layout and artwork generation of integrated circuits. An example of its operation is given and some additional background reading is provided.

Mcgrady, W. J.↗
NASA NTRS2010

Reconfigurable Hardware for Compressing Hyperspectral Image Data

High-speed, low-power, reconfigurable electronic hardware has been developed to implement ICER-3D, an algorithm for compressing hyperspectral-image data. The algorithm and parts thereof have been the topics of several NASA Tech Briefs articles, including Context Modeler for Wavelet Compression of Hyperspectral Images (NPO-43239) and ICER-3D Hyperspectral Image Compression Software (NPO-43238), which appear elsewhere in this issue of NASA Tech Briefs. As described in more detail in those articles, the algorithm includes three main subalgorithms: one for computing wavelet transforms, one for context modeling, and one for entropy encoding. For the purpose of designing the hardware, these subalgorithms are treated as modules to be implemented efficiently in field-programmable gate arrays (FPGAs). The design takes advantage of industry- standard, commercially available FPGAs. The implementation targets the Xilinx Virtex II pro architecture, which has embedded PowerPC processor cores with flexible on-chip bus architecture. It incorporates an efficient parallel and pipelined architecture to compress the three-dimensional image data. The design provides for internal buffering to minimize intensive input/output operations while making efficient use of offchip memory. The design is scalable in that the subalgorithms are implemented as independent hardware modules that can be combined in parallel to increase throughput. The on-chip processor manages the overall operation of the compression system, including execution of the top-level control functions as well as scheduling, initiating, and monitoring processes. The design prototype has been demonstrated to be capable of compressing hyperspectral data at a rate of 4.5 megasamples per second at a conservative clock frequency of 50 MHz, with a potential for substantially greater throughput at a higher clock frequency. The power consumption of the prototype is less than 6.5 W. The reconfigurability (by means of reprogramming) of the FPGAs makes it possible to effectively alter the design to some extent to satisfy different requirements without adding hardware. The implementation could be easily propagated to future FPGA generations and/or to custom application-specific integrated circuits.

Aranki, Nazeeh↗
NASA NTRS2010

Modeling of Sonos Memory Cell Erase Cycle

Silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile semiconductor memories (NVSMS) have many advantages. These memories are electrically erasable programmable read-only memories (EEPROMs). They utilize low programming voltages, endure extended erase/write cycles, are inherently resistant to radiation, and are compatible with high-density scaled CMOS for low power, portable electronics. The SONOS memory cell erase cycle was investigated using a nonquasi-static (NQS) MOSFET model. The SONOS floating gate charge and voltage, tunneling current, threshold voltage, and drain current were characterized during an erase cycle. Comparisons were made between the model predictions and experimental device data.

Phillips, Thomas A.↗
NASA NTRS2010

SPARCLE: Electrostatic Dust Control Tool Proof of Concept

Successful exploration of most planetary surfaces, with their impact-generated dusty regoliths, will depend on the capabilities to keep surfaces free of the performance-compromising dust. Once in contact with surfaces, whether set in motion by natural or mechanical means, regolith fines, or dust, behave like abrasive Velcro, coating surfaces, clogging mechanisms, making movement progressively more difticult, and being almost impossible to remove by mechanical mcans (brushing). The successful dust removal strategy will deal with dust dynamics resulting from interaction between Van der Waals and Coulombic forces. Here, proof of concept for an electrostatically-based concept for dust control tool is described and demonstrated. A low power focused electron beam is used in the presence of a small electrical field to increase the negative charge to mass ratio of a dusty surface until dust repulsion and attraction to a lower potential surface, acting as a dust collector, occurred. Our goal is a compact device of less than 5 kg mass and using less than 5 watts of power to be operational in less than 5 years with heritage from ionic sweepers for active spacecraft potential control (e.g ., on POLAR). Rovers could be fitted with devices that could hamess the removal of dust for sampling as part of the extended exploration process on Mercury, Mars, asteroids or outer solar system satellites, as well as the Moon.

Clark, P. E.↗
NASA NTRS2011

Modeling of SONOS Memory Cell Erase Cycle

Utilization of Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) nonvolatile semiconductor memories as a flash memory has many advantages. These electrically erasable programmable read-only memories (EEPROMs) utilize low programming voltages, have a high erase/write cycle lifetime, are radiation hardened, and are compatible with high-density scaled CMOS for low power, portable electronics. In this paper, the SONOS memory cell erase cycle was investigated using a nonquasi-static (NQS) MOSFET model. Comparisons were made between the model predictions and experimental data.

Phillips, Thomas A.↗
NASA NTRS2013

Application of a Broadband Active Vibration Control System to a Helicopter Trim Panel

This paper discusses testing of a broadband active vibration control concept on an interior trim panel in a helicopter cabin mockup located at ONERA's Centre de Toulouse. The control system consisted of twelve diamond-shaped piezoelectric actuators distributed around a 1.2m x 1.2m trim panel. Accelerometers were mounted at the four vertices of each diamond. The aspect ratio of the diamond was based on the dielectric constants of the piezoelectric material in order to create an actuator-sensor pair that was collocated over a broad frequency range. This allowed robust control to be implemented using simple, low power analog electronics. Initial testing on a thick acrylic window demonstrated the capability of the controller, but actuator performance was less satisfactory when mounted on a composite sandwich trim panel. This may have been due to the orthotropic nature of the trim panel, or due to its much higher stiffness relative to the acrylic window. Insights gained from a finite element study of the actuator-sensor-structural system are discussed.

Cabell, Randolph H.↗
DOE OSTI2023

Analyzing Distribution Transformer Degradation with Increased Power Electronic Loads

The influx of non-linear power electronic loads into the distribution network has the potential to disrupt the existing distribution transformer operations. They were not designed to mediate the excessive heating losses generated from the harmonics. To have a good understanding of current standing challenges, a knowledge of the generation and load mix as well as the current harmonic estimations are essential for designing transformers and evaluating their performance. In this paper, we investigate a mixture of essential power electronic loads for a household designed in PSCAD/EMTdc and their potential impacts on transformer eddy current losses and derating using harmonic analysis. Our findings reveal that in the presence of high power electronic loads (especially third harmonics), increasing PV generation may worsen transformer degradation. However, with a low amount of power electronic loads, additional PV generation helps to reduce the harmonic content in the current and improve transformer performance.

eddy current, harmonics, PV, THD, power transforme↗
NASA NTRS1974

A high voltage power supply for the AE-C and D low energy electron experiment

A description is given of the electrical and mechanical design and operation of high voltage power supplies for space flight use. The supply was used to generate the spiraltron high voltage for low energy electron experiment on AE-C and D. Two versions of the supply were designed and built; one design is referred to as the low power version (AE-C) and the other as the high power version (AE-D). Performance is discussed under all operating conditions.

Gillis, J. A.↗
NASA NTRS2001

Low-Temperature Spacecraft: Challenges/Opportunities

Imagine sending a spacecraft into deep space that operates at the ambient temperature of its environment rather than hundreds of degrees Kelvin warmer. The average temperature of a spacecraft warmed only by the sun drops from 279 K near the Earth's orbit to 90 K near the orbit of Saturn, and to 44 K near Pluto's orbit. At present, deep space probes struggle to maintain an operating temperature near 300 K for the onboard electronics. To warm the electronics without consuming vast amounts of electrical energy, radioisotope heater units (RHUs) are used in vast numbers. Unfortunately, since RHU are always 'on', an active thermal management system is required to reject the excess heat. A spacecraft designed to operate at cryogenic temperatures and shielded from the sun by a large communication dish or solar cell array could be less complex, lighter, and cheaper than current deep space probes. Before a complete low-temperature spacecraft becomes a reality, there are several challenges to be met. Reliable cryogenic power electronics is one of the major challenges. The Low-Temperature Power Electronics Research Group at NASA Glenn Research Center (GRC) has demonstrated the ability of some commercial off the shelf power electronic components to operate at temperatures approaching that of liquid nitrogen (77 K). Below 77 K, there exists an opportunity for the development of reliable semiconductor power switching technologies other than bulk silicon CMOS. This paper will report on the results of NASA GRC's Low-Temperature Power Electronics Program and discuss the challenges to (opportunities for) the creation of a low-temperature spacecraft.

Dickman, J. E.↗
NASA NTRS1968

Multichip packaging with thermal insulation

Thermal insulation technique permits low and high power electronic chips to operate in the same package without thermal cross-coupling. An alumina glass shield thermally isolates the low power chip from the high power chip while Kovar substrate acts as a heat sink to remove heat from the high power chip.

Mc Inturff, R. G.↗
DOE OSTI2024

Planar Transformer Systems for Modular Power Electronics in Long-Haul, Low-Cost PV Systems

This project successfully developed and verified a new approach for medium voltage (MV) planar transformers for use in emerging, utility-scale, modular PV systems. This approach simplifies their manufacture, improves their isolation capability, lowers their cost, and reduces their volume and loss, while also creating flexibility in the materials that can be used.

14 SOLAR ENERGY↗
NASA NTRS2001

Electronics for Extreme Environments

Most of the NASA missions involve extreme environments comprising radiation and low or high temperatures. Current practice of providing friendly ambient operating environment to electronics costs considerable power and mass (for shielding). Immediate missions such as the Europa orbiter and lander and Mars landers require the electronics to perform reliably in extreme conditions during the most critical part of the mission. Some other missions planned in the future also involve substantial surface activity in terms of measurements, sample collection, penetration through ice and crust and the analysis of samples. Thus it is extremely critical to develop electronics that could reliably operate under extreme space environments. Silicon On Insulator (SOI) technology is an extremely attractive candidate for NASA's future low power and high speed electronic systems because it offers increased transconductance, decreased sub-threshold slope, reduced short channel effects, elimination of kink effect, enhanced low field mobility, and immunity from radiation induced latch-up. A common belief that semiconductor devices function better at low temperatures is generally true for bulk devices but it does not hold true for deep sub-micron SOI CMOS devices with microscopic device features of 0.25 micrometers and smaller. Various temperature sensitive device parameters and device characteristics have recently been reported in the literature. Behavior of state of the art technology devices under such conditions needs to be evaluated in order to determine possible modifications in the device design for better performance and survivability under extreme environments. Here, we present a unique approach of developing electronics for extreme environments to benefit future NASA missions as described above. This will also benefit other long transit/life time missions such as the solar sail and planetary outposts in which electronics is out open in the unshielded space at the ambient space temperatures and always exposed to radiation. Additional information is contained in the original extended abstract.

Patel, J. U.↗
NASA NTRS2007

CMOS Ultra Low Power Radiation Tolerant (CULPRiT) Microelectronics

Space Electronics needs Radiation Tolerance or hardness to withstand the harsh space environment: high-energy particles can change the state of the electronics or puncture transistors making them disfunctional. This viewgraph document reviews the use of CMOS Ultra Low Power Radiation Tolerant circuits for NASA's electronic requirements.

Yeh, Penshu↗