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At least 91 records · Page 5

Field Programmable Gate Array Failure Rate Estimation Guidelines for Launch Vehicle Fault Tree Models

Today's launch vehicles complex electronic and avionics systems heavily utilize Field Programmable Gate Array (FPGA) integrated circuits (IC) for their superb speed and reconfiguration capabilities. Consequently, FPGAs are prevalent ICs in communication protocols such as MILSTD- 1553B and in control signal commands such as in solenoid valve actuations. This paper will identify reliability concerns and high level guidelines to estimate FPGA total failure rates in a launch vehicle application. The paper will discuss hardware, hardware description language, and radiation induced failures. The hardware contribution of the approach accounts for physical failures of the IC. The hardware description language portion will discuss the high level FPGA programming languages and software/code reliability growth. The radiation portion will discuss FPGA susceptibility to space environment radiation.

Al Hassan, Mohammad↗

Estimating Rates Of Single-Event Upsets

Mathematical model yields estimates of upper and lower bounds on rates of single-event upsets (SEU's) in logic circuits. SEU's are reversible changes in logic states, caused by single high-energy ions. Energetic ions passed through device along tracks perpendicular to surface, to determine parameters of model. Used to estimate rates caused by ions of various energies incident at arbitrary angles. Useful in design of integrated circuits as high-density memories for minimal susceptibility to bit errors.

Zoutendyk, John A.↗

Optimizing costs of VLSI circuits

Report analyzes costs of developing and producing low-production-volume, customized VLSI (very large-scale, integrated) circuits. Relationship is developed between IC cost and electronic system cost using IC cost models based on design/fabrication approach. Emphasis is on development of understanding between cost and volume for custom circuits to be used by NASA. Reliability is major cost component in models. Report is divided into five sections and includes four appendices with useful reference literature.

Cook, K. B., Jr.↗

Accelerators for critical experiments involving single-particle upset in solid-state microcircuits

Charged-particle interactions in microelectronic circuit chips (integrated circuits) present a particularly insidious problem for solid-state electronic systems due to the generation of soft errors or single-particle event upset (SEU) by either cosmic rays or other radiation sources. Particle accelerators are used to provide both light and heavy ions in order to assess the propensity of integrated circuit chips for SEU. Critical aspects of this assessment involve the ability to analytically model SEU for the prediction of error rates in known radiation environments. In order to accurately model SEU, the measurement and prediction of energy deposition in the form of an electron-hole plasma generated along an ion track is of paramount importance. This requires the use of accelerators which allow for ease in both energy control (change of energy) and change of ion species. This and other aspects of ion-beam control and diagnostics (e.g., uniformity and flux) are of critical concern for the experimental verification of theoretical SEU models.

Zoutendyk, J. A.↗

Full-Wave Analysis Of MMICs Using A Generalized Yee Algorithm

Improved method of temporal analysis of propagation of electro-magnetic waves in monolithic microwave integrated circuits (MMICs) implemented by generalized version of traditional Yee algorithm. Provides more accurate mathematical modeling for analysis and design of MMICs. Based on unstructured and otherwise irregular grids. Grids readily fitted to conductive and dielectric circuit elements having realistically complex three-dimensional shapes. Better for modeling important and geometrically complex phenomena like fringing fields.

Lansing, Faiza S.↗

Design and performance of a high-Tc superconductor coplanar waveguide filter

The design of a coplanar waveguide low-pass filter made of YBa2Cu3O(7-delta) (YBCO) on an LaAlO3 substrate is described. Measurements were incorporated into simple models for microwave CAD analysis to develop a final design. The patterned and packaged coplanar waveguide low-pass filter of YBCO, with dimensions suited for integrated circuits, exhibited measured insertion losses when cooled in liquid nitrogen superior to those of a similarly cooled thin-film copper filter throughout the 0 to 9.5 GHz passband. Coplanar waveguide models for use with thin-film normal metal (with thickness either greater or less than the skin depth) and YBCO are discussed and used to compare the losses of the measured YBCO and copper circuits.

Chew, Wilbert↗

DC Modeling of 4H-SiC JFET Gate Length Reduction at 500°C

The development of robust, high-performance integrated circuits (ICs) will enable numerous potential NASA missions of current interest, including long-duration robotic missions exploring the 460 °C surface of Venus. Currently, NASA is looking towards SiC-based devices to provide such a solution. However, the current NASA silicon carbide (SiC) JFET device with a channel length of 6μm (for recently fabricated Gen. 11 ICs) limits on mission relevant circuit capabilities [1]. In this study, we combined experiments with simulations to explore two straightforward fabrication strategies to reduce the SiC JFET channel length while maintaining turn-off behavior (Fig. 1a) needed to realize 500 °C circuit operation. The first fabrication strategy uses a shallow self-align nitrogen implant (Figure 1b) along the device's top surface but not below the gate combined with a high-dose phosphorous implant directly below the source and drain contacts. For the second fabrication strategy (Figure 1c), the high-dose phosphorous implants extended from below the contacts all the way up to the gate edges. Simulations guided gate length reductions without significant degradation in the turn-off performance. In total 12 SiC JFET variants implementing using the different fabrication strategies, gate lengths, and n-channel epilayer thickness were implemented in our simulation framework implemented in COMSOL. Since the COMSOL database does not have the material properties for 4H-SiC, these parameters were taken from the literature and implemented in COMSOL. The empirical models [2] for incomplete ionization, Auger recombination, low field mobility, and Shockley-Read-Hall recombination were implemented to account for material-specific device behavior.

4H-SiC JFET↗

Field Programmable Gate Array Failure Rate Estimation Guidelines for Launch Vehicle Fault Tree Models

Today's launch vehicles complex electronic and avionic systems heavily utilize the Field Programmable Gate Array (FPGA) integrated circuit (IC). FPGAs are prevalent ICs in communication protocols such as MIL-STD-1553B, and in control signal commands such as in solenoid/servo valves actuations. This paper will demonstrate guidelines to estimate FPGA failure rates for a launch vehicle, the guidelines will account for hardware, firmware, and radiation induced failures. The hardware contribution of the approach accounts for physical failures of the IC, FPGA memory and clock. The firmware portion will provide guidelines on the high level FPGA programming language and ways to account for software/code reliability growth. The radiation portion will provide guidelines on environment susceptibility as well as guidelines on tailoring other launch vehicle programs historical data to a specific launch vehicle.

Al Hassan, Mohammad↗

JMOSFET: A MOSFET parameter extractor with geometry-dependent terms

The parameters from metal-oxide-silicon field-effect transistors (MOSFETs) that are included on the Combined Release and Radiation Effects Satellite (CRRES) test chips need to be extracted to have a simple but comprehensive method that can be used in wafer acceptance, and to have a method that is sufficiently accurate that it can be used in integrated circuits. A set of MOSFET parameter extraction procedures that are directly linked to the MOSFET model equations and that facilitate the use of simple, direct curve-fitting techniques are developed. In addition, the major physical effects that affect MOSFET operation in the linear and saturation regions of operation for devices fabricated in 1.2 to 3.0 mm CMOS technology are included. The fitting procedures were designed to establish single values for such parameters as threshold voltage and transconductance and to provide for slope matching between the linear and saturation regions of the MOSFET output current-voltage curves. Four different sizes of transistors that cover a rectangular-shaped region of the channel length-width plane are analyzed.

Buehler, M. G.↗

Improved Li/TiS2 cell cycling in ether-based electrolytes with synergistic additives

Based on an extensive series of normalized full cell Li/TiS2 cycling studies, open-circuit storage tests, microcalorimetry and AC impedance studies, and chemical precedent, we propose an integrated chemical model consistent with experimental observations concerning the behavior of numerous LiAsF6/cyclic ether electrolytes. The particularly striking potency of certain additives such as 2-methylfuran and the hydroxide action resides in their ability to intercept several different adverse catalytic processes concurrently in the bulk electrolyte as well as the Li anode and TiS2 cathode.

Dominey, L. A.↗

Accurate Cold-Test Model of Helical TWT Slow-Wave Circuits

Recently, a method has been established to accurately calculate cold-test data for helical slow-wave structures using the three-dimensional (3-D) electromagnetic computer code, MAxwell's equations by the Finite Integration Algorithm (MAFIA). Cold-test parameters have been calculated for several helical traveLing-wave tube (TWT) slow-wave circuits possessing various support rod configurations, and results are presented here showing excellent agreement with experiment. The helical models include tape thickness, dielectric support shapes and material properties consistent with the actual circuits. The cold-test data from this helical model can be used as input into large-signal helical TWT interaction codes making It possible, for the first time, to design complete TWT via computer simulation.

Kory, Carol L.↗

DC Modeling of 4H-SiC nJFET Gate Length Reduction at 500°C

The development of robust, high-performance integrated circuits (ICs) will enable numerous potential NASA missions of current interest, including long-duration robotic missions exploring the 460°C surface of Venus. Currently, NASA is looking towards SiC-based devices to provide such a solution. However, the current NASA silicon carbide (SiC) JFET device with a channel length of 6 μm (recently fabricated Gen. 11 ICs) limits mission-relevant circuit capabilities. In this study, we combined experiments with simulations to explore two straightforward fabrication strategies (shallow n− and deep n+) to reduce the SiC JFET channel length while maintaining turn-off behavior needed to realize 500 °C circuit operation. First, the material properties for 4H-SiC were implemented in COMSOL and the Poisson equation was solved for twelve 2D device designs. Then, based on the insights gained from the distribution of the electron concentration, electrostatic potential, and electric field for twelve designs (with three fabrication strategies), simulation for a 1 μm gate length nJFET with the turn-off performance comparable to the state-of-the-art.

4H-SiC nJFET↗

DC Modeling of 4H-SiC nJFET Gate Length Reduction at 500°C

The development of robust, high-performance integrated circuits (ICs) will enable numerous potential NASA missions of current interest, including long-duration robotic missions exploring the 460°C surface of Venus. Currently, NASA is looking towards SiC-based devices to provide such a solution. However, the current NASA silicon carbide (SiC) JFET device with a channel length of 6 μm (recently fabricated Gen. 11 ICs) limits mission-relevant circuit capabilities. In this study, we combined experiments with simulations to explore two straightforward fabrication strategies (shallow n− and deep n+) to reduce the SiC JFET channel length while maintaining turn-off behavior needed to realize 500 °C circuit operation. First, the material properties for 4H-SiC were implemented in COMSOL and the Poisson equation was solved for twelve 2D device designs. Then, based on the insights gained from the distribution of the electron concentration, electrostatic potential, and electric field for twelve designs (with three fabrication strategies), simulation for a 1 μm gate length nJFET with the turn-off performance comparable to the state-of-the-art.

4H-SiC nJFET↗

Intelligent fuzzy controller for event-driven real time systems

Most of the known linguistic models are essentially static, that is, time is not a parameter in describing the behavior of the object's model. In this paper we show a model for synchronous finite state machines based on fuzzy logic. Such finite state machines can be used to build both event-driven, time-varying, rule-based systems and the control unit section of a fuzzy logic computer. The architecture of a pipelined intelligent fuzzy controller is presented, and the linguistic model is represented by an overall fuzzy relation stored in a single rule memory. A VLSI integrated circuit implementation of the fuzzy controller is suggested. At a clock rate of 30 MHz, the controller can perform 3 MFLIPS on multi-dimensional fuzzy data.

Grantner, Janos↗

Coilgun Acceleration Model Containing Interactions Between Multiple Coils

Electromagnetic (EM) accelerators have the potential to fill a performance range not currently being met by conventional chemical and electric propulsion systems by providing a specific impulse of 600-1000 seconds and a thrust-to-power ratio greater than 200 mN/kW. A propulsion system based on EM acceleration of small projectiles has the traditional advantages of using a pulsed system, including precise control over a range of thrust and power levels as well as rapid response and repetition rates. Furthermore, EM accelerators have lower power requirements than conventional electric propulsion systems since no plasma creation is necessary. A coilgun is a specific type of EM device where a high-current pulse through a coil of wire interacts with a conductive projectile via an induced magnetic field to accelerate the projectile. There are no physical or electrical connections to the projectile, which leads to less system degradation and a longer life expectancy. Multi-staging a coilgun by adding multiple turns on a single coil or on the projectile increases the inductance, thus permitting acceleration of the projectile to higher velocities. Previously, a simplified problem of modeling an inductively-coupled, single-coil coilgun using a circuit-based analysis coupled to the one-dimensional momentum equation through Lenz's law was solved; however, the analysis was only conducted on uncoupled coils. The problem is significantly more complicated when multiple, independently-powered coils simultaneously operate and interact with each other and the projectile through induced magnetic fields. This paper presents a multi-coil model developed with the magnetostatic finite element solver QuickField. In the model, mutual inductance values between pairs of conductors were found by first computing the magnetic field energy for different cases where individual coils or multiple coils carry current, then integrating over the entire finite element domain for each case, and finally using the definition of inductive energy storage to solve for the self and mutual inductance. The electric circuit model is coupled to the projectile through Lenz's law, with the coils coupled through mutual inductance but able to be independently triggered at different times to optimize the acceleration profile. This initial model to predict the behavior of a projectile's acceleration through a coupled, multi-coil coilgun increases the potential of building a highly efficient coilgun thruster with key advantages over other EM thruster systems, thus making it a promising candidate for satellite main propulsion or attitude control thrusters.

Liu, Connie↗

Cost as a technology driver

Cost managment as a guiding factor in optimum development of technology, and proper timing of cost-saving programs in the development of a system or technology with payoffs in development and operational advances are discussed and illustrated. Advances enhancing the performance of hardware or software advances raising productivity or reducing cost, are outlined, with examples drawn from: thermochemical thrust maximization, development of cryogenic storage tanks, improvements in fuel cells for Space Shuttle, design of a spacecraft pyrotechnic initiator, cost cutting by reduction in the number of parts to be joined, and cost cutting by dramatic reductions in circuit component number with small-scale double-diffused integrated circuitry. Program-focused supporting research and technology models are devised to aid judicious timing of cost-conscious research programs.

Fitzgerald, P. E., Jr.↗

Spiking Neurons for Analysis of Patterns

Artificial neural networks comprising spiking neurons of a novel type have been conceived as improved pattern-analysis and pattern-recognition computational systems. These neurons are represented by a mathematical model denoted the state-variable model (SVM), which among other things, exploits a computational parallelism inherent in spiking-neuron geometry. Networks of SVM neurons offer advantages of speed and computational efficiency, relative to traditional artificial neural networks. The SVM also overcomes some of the limitations of prior spiking-neuron models. There are numerous potential pattern-recognition, tracking, and data-reduction (data preprocessing) applications for these SVM neural networks on Earth and in exploration of remote planets. Spiking neurons imitate biological neurons more closely than do the neurons of traditional artificial neural networks. A spiking neuron includes a central cell body (soma) surrounded by a tree-like interconnection network (dendrites). Spiking neurons are so named because they generate trains of output pulses (spikes) in response to inputs received from sensors or from other neurons. They gain their speed advantage over traditional neural networks by using the timing of individual spikes for computation, whereas traditional artificial neurons use averages of activity levels over time. Moreover, spiking neurons use the delays inherent in dendritic processing in order to efficiently encode the information content of incoming signals. Because traditional artificial neurons fail to capture this encoding, they have less processing capability, and so it is necessary to use more gates when implementing traditional artificial neurons in electronic circuitry. Such higher-order functions as dynamic tasking are effected by use of pools (collections) of spiking neurons interconnected by spike-transmitting fibers. The SVM includes adaptive thresholds and submodels of transport of ions (in imitation of such transport in biological neurons). These features enable the neurons to adapt their responses to high-rate inputs from sensors, and to adapt their firing thresholds to mitigate noise or effects of potential sensor failure. The mathematical derivation of the SVM starts from a prior model, known in the art as the point soma model, which captures all of the salient properties of neuronal response while keeping the computational cost low. The point-soma latency time is modified to be an exponentially decaying function of the strength of the applied potential. Choosing computational efficiency over biological fidelity, the dendrites surrounding a neuron are represented by simplified compartmental submodels and there are no dendritic spines. Updates to the dendritic potential, calcium-ion concentrations and conductances, and potassium-ion conductances are done by use of equations similar to those of the point soma. Diffusion processes in dendrites are modeled by averaging among nearest-neighbor compartments. Inputs to each of the dendritic compartments come from sensors. Alternatively or in addition, when an affected neuron is part of a pool, inputs can come from other spiking neurons. At present, SVM neural networks are implemented by computational simulation, using algorithms that encode the SVM and its submodels. However, it should be possible to implement these neural networks in hardware: The differential equations for the dendritic and cellular processes in the SVM model of spiking neurons map to equivalent circuits that can be implemented directly in analog very-large-scale integrated (VLSI) circuits.

Huntsberger, Terrance↗

Finite Ground Coplanar (FGC) Waveguide: Characteristics and Advantages Evaluated for Radiofrequency and Wireless Communication Circuits

Researchers in NASA Lewis Research Center s Electron Device Technology Branch are developing transmission lines for radiofrequency and wireless circuits that are more efficient, smaller, and make lower cost circuits possible. Traditionally, radiofrequency and wireless circuits have employed a microstrip or coplanar waveguide to interconnect the various electrical elements that comprise a circuit. Although a coplanar waveguide (CPW) is widely viewed as better than a microstrip for most applications, it too has problems. To solve these problems, NASA Lewis and the University of Michigan developed a new version of a coplanar waveguide with electrically narrow ground planes. Through extensive numerical modeling and experimental measurements, we have characterized the propagation constant of the FGC waveguide, the lumped and distributed circuit elements integrated in the FGC waveguide, and the coupling between parallel transmission lines. Although the attenuation per unit length is higher for the FGC waveguide because of higher conductor loss, the attenuation is comparable when the ground plane width is twice the center conductor width as shown in the following graph. An upper limit to the line width is derived from observations that when the total line width is greater than ld/2, spurious resonances due to the parallel plate waveguide mode are established. Thus, the ground plane width must be less than ld/4 where ld is the wavelength in the dielectric. Since the center conductor width S is typically less than l/10 to maintain good transverse electromagnetic mode characteristics, it follows that a ground plane width of B = 2S would also be electrically narrow. Thus, we can now treat the ground strips of the FGC waveguide the same way that the center conductor is treated.

Ponchak, George E.↗