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NASA NTRS2009

Digital Beamforming Scatterometer

This paper discusses scatterometer measurements collected with multi-mode Digital Beamforming Synthetic Aperture Radar (DBSAR) during the SMAP-VEX 2008 campaign. The 2008 SMAP Validation Experiment was conducted to address a number of specific questions related to the soil moisture retrieval algorithms. SMAP-VEX 2008 consisted on a series of aircraft-based.flights conducted on the Eastern Shore of Maryland and Delaware in the fall of 2008. Several other instruments participated in the campaign including the Passive Active L-Band System (PALS), the Marshall Airborne Polarimetric Imaging Radiometer (MAPIR), and the Global Positioning System Reflectometer (GPSR). This campaign was the first SMAP Validation Experiment. DBSAR is a multimode radar system developed at NASA/Goddard Space Flight Center that combines state-of-the-art radar technologies, on-board processing, and advances in signal processing techniques in order to enable new remote sensing capabilities applicable to Earth science and planetary applications [l]. The instrument can be configured to operate in scatterometer, Synthetic Aperture Radar (SAR), or altimeter mode. The system builds upon the L-band Imaging Scatterometer (LIS) developed as part of the RadSTAR program. The radar is a phased array system designed to fly on the NASA P3 aircraft. The instrument consists of a programmable waveform generator, eight transmit/receive (T/R) channels, a microstrip antenna, and a reconfigurable data acquisition and processor system. Each transmit channel incorporates a digital attenuator, and digital phase shifter that enables amplitude and phase modulation on transmit. The attenuators, phase shifters, and calibration switches are digitally controlled by the radar control card (RCC) on a pulse by pulse basis. The antenna is a corporate fed microstrip patch-array centered at 1.26 GHz with a 20 MHz bandwidth. Although only one feed is used with the present configuration, a provision was made for separate corporate feeds for vertical and horizontal polarization. System upgrades to dual polarization are currently under way. The DBSAR processor is a reconfigurable data acquisition and processor system capable of real-time, high-speed data processing. DBSAR uses an FPGA-based architecture to implement digitally down-conversion, in-phase and quadrature (I/Q) demodulation, and subsequent radar specific algorithms. The core of the processor board consists of an analog-to-digital (AID) section, three Altera Stratix field programmable gate arrays (FPGAs), an ARM microcontroller, several memory devices, and an Ethernet interface. The processor also interfaces with a navigation board consisting of a GPS and a MEMS gyro. The processor has been configured to operate in scatterometer, Synthetic Aperture Radar (SAR), and altimeter modes. All the modes are based on digital beamforming which is a digital process that generates the far-field beam patterns at various scan angles from voltages sampled in the antenna array. This technique allows steering the received beam and controlling its beam-width and side-lobe. Several beamforming techniques can be implemented each characterized by unique strengths and weaknesses, and each applicable to different measurement scenarios. In Scatterometer mode, the radar is capable to.generate a wide beam or scan a narrow beam on transmit, and to steer the received beam on processing while controlling its beamwidth and side-lobe level. Table I lists some important radar characteristics

Rincon, Rafael F.↗

NASA NTRS1991

Digital Signal Conditioning for Flight Test, Volume 19 [Le Traitement du Signal Numérique pour les Essais en Vol]

This volume in the AGARD Flight Instrumentation Series provides flight test instrumentation engineers with an introduction to digital processes on aircraft. Flight test instrumentation systems are rapidly evolving from analog intensive to digital intensive systems, including the use of onboard digital computers. Topics include: measurements that are digital in origin, sampling, encoding, transmitting, and storing of data. Particular emphasis is placed on modem avionic data bus architectures and what to be aware of when extracting data from them. Some example data extraction techniques are given. Tradeoffs between digital logic families, trends in digital development, and design testing techniques are discussed. An introduction to digital filtering is also covered.

Flight instruments↗

NASA NTRS2026

Integrated Computational Materials Engineering (ICME) Capability Maturity Levels for Ecosystems Enabling Digital Transformation

Digital engineering (DE) and integrated computational materials engineering (ICME) are widely recognized as critical enablers of faster, more affordable, and more reliable aerospace systems. However, many organizations have struggled to realize the promised return on investment (ROI) from digital initiatives. A primary reason is the absence of a shared, decision-focused framework that distinguishes simple digitization of existing workflows from true digital transformation that fundamentally changes how engineering decisions are made. This paper introduces an ICME capability maturity framework that fills this gap. The framework defines six cumulative ICME capability maturity levels (CMLs), explicitly tied to decision authority, engineering integration, optimization, and uncertainty management across material, process, structure, and performance scales. It is designed to complement established readiness metrics such as technology readiness levels (TRLs), manufacturing readiness levels (MRLs), and integration readiness levels (IRLs), by addressing a missing dimension: the conditions required for model-informed decision authority across scales. A unifying figure and capability table illustrate the six-level ICME Capability Maturity Framework, showing how organizations progress from digitization—with limited or negative ROI—to true digital transformation, where ICME-enabled workflows deliver measurable improvements in decision quality, cycle time, risk reduction, and reuse. The framework is intended for both technical practitioners and executive leadership, providing a common language to assess current state, guide roadmaps, align software ecosystem investments, and set realistic expectations for digital transformation outcomes. A regulatory-relevant statement clarifying the relationship between ICME capability and existing certification frameworks is provided.

ICME↗

NASA NTRS1991

Digital Signal Conditioning for Flight Test Instrumentation

This volume in the AGARD Flight Instrumentation Series provides flight test instrumentation engineers with an introduction to digital measurement processes on aircraft. Flight test instrumentation systems are rapidly evolving from analog-intensive to digital-intensive systems, including the use of onboard digital computers. Topics include measurements that are digital in origin, as well as sampling, encoding, transmitting, and storing of data. Particular emphasis is placed on modern avionic data bus architectures and what to be aware of when extracting data from them. Examples of data extraction techniques are given. Tradeoffs between digital logic families, trends in digital development, and design testing techniques are discussed. An introduction to digital filtering is also covered.

Data acquisition↗

NASA NTRS2016

Nisar L-band Digital Electronics Subsystem

The NASA-ISRO Synthetic Aperture Radar (NISAR) L-band SAR instrument employs multiple digital channels to optimize resolution while keeping a large swath on a single pass. High-speed digitization with fine synchronization and digital beam forming are necessary in order to facilitate this new technique called SweepSAR. An architecture employing multiple FPGA based digital signal processors has been conceived to facilitate digital calibration on an individual channel basis as well as digital signal processing to optimize the receive signal. On-board processing and data compression has been implemented to reduce the volume of data in order to satisfy the operational requirements of near global coverage for the desired science targets. A novel command and timing architecture was developed to manage this complex system to meet the challenging project requirements. The NISAR L-band Digital Electronics Subsystem is the combination of the hardware, firmware and software components architected and implemented to operate this radar and return the desired quantity and quality of data for the science community.

SweepSAR↗

NASA NTRS2023

Digital Engineering Design Center (DEDC): Modelling an ISRU System

The DEDC provides immersive project-based learning on digital engineering toolsets and processes supporting NASA’s digital transformation goals: - Digital Engineering uses authoritative sources of systems' data and models as a continuum across disciplines to support integrated digital approach life cycle activities from concept through disposal. - The digital environment provided includes the state-of-the-art digital engineering suite, Siemens Xcelerator. The pilot project is developing an end-to-end integrated model of an In-Situ Resource Utilization (ISRU) system for commodities production: - ISRU uses local resources to provide mission consumables to enable a sustainable Moon or Mars surface presence. - The final digital twin product will include a methanation reactor, condenser, and electrolyzer subsystem.

Digital Engineering Design Center↗

NASA NTRSDate not supplied

TIE02. IGARSS’2024 Townhall on “Digital Twins for Earth Science

NASA, ESA, NOAA, CNES and several other international organizations have started programs to design and develop Digital Twins of the Earth and/or Earth systems. Earth Systems Digital Twins (ESDTs) are dynamic and interactive information systems for understanding, forecasting, and conjecturing the complex interconnections among Earth systems, including anthropomorphic forcings and impacts to humanity. Organized around interconnected, multi-domain, high-scale modeling capabilities, the three major components of an Earth System Digital Twin are a continuously updated Digital Replica of the Earth System of interest (or “What Now”), dynamic Forecasting models (or “What Next”), and Impact Assessment capabilities (or “What If”). ESDTs provide unified, comprehensive representations and predictions that can be utilized for monitoring the health of the Planet, as well as for developing actionable information to support decision making. More generally, Digital Twins will help researchers better understand the fundamental Earth systems that impact everything from wildfires to climate change. This Townhall will provide a status of Destination Earth as well as ESA’s, NASA’s, CNES’s and NOAA’s current independent and common efforts in Digital Twins; then the four organizations will provide information about community building before engaging a dialogue about Digital Twins of the Earth with the IGARSS community.

Earth Science Remote Sensing; Information Systems;↗

NASA NTRSDate not supplied

Discovering Digital Engineering Needs Through Human-Centered Approaches

Digital engineering has the power to transform organizations in profound ways, but digitizing legacy workflows and infusing new technologies into existing practices may not yield the intended results or address the underlying problems or bottlenecks. This paper describes the human-centered approaches used to understand stakeholder challenges and identify digital engineering needs during the design-build-test portion of the systems development lifecycle. Through a series of interactive stakeholder workshops and need-finding activities, key stakeholder needs were identified to help guide the integration of digital engineering technologies. The overarching need was for downstream system development steps to be considered further upstream in the project lifecycle in a manner that allows for proactive and interactive co-constructive idea exploration, problem resolution, and requirements considerations in a collective engagement with engineers and technicians from multiple disciplines to increase efficiency and reduce risks while offering opportunities to improve the final engineered system. Supporting this need was a wide-ranging desire from stakeholders for digital and non-digital support structures for efficient rapid iteration during system development. This work yielded several improvements for system development processes and for digital engineering infusion.

Human-centered Design↗

NASA NTRSDate not supplied

Discovering Digital Engineering Needs Through Human-Centered Approaches

Design Science↗

NASA NTRS1986

Input-output characterization of an ultrasonic testing system by digital signal analysis

Ultrasonic test system input-output characteristics were investigated by directly coupling the transmitting and receiving transducers face to face without a test specimen. Some of the fundamentals of digital signal processing were summarized. Input and output signals were digitized by using a digital oscilloscope, and the digitized data were processed in a microcomputer by using digital signal-processing techniques. The continuous-time test system was modeled as a discrete-time, linear, shift-invariant system. In estimating the unit-sample response and frequency response of the discrete-time system, it was necessary to use digital filtering to remove low-amplitude noise, which interfered with deconvolution calculations. A digital bandpass filter constructed with the assistance of a Blackman window and a rectangular time window were used. Approximations of the impulse response and the frequency response of the continuous-time test system were obtained by linearly interpolating the defining points of the unit-sample response and the frequency response of the discrete-time system. The test system behaved as a linear-phase bandpass filter in the frequency range 0.6 to 2.3 MHz. These frequencies were selected in accordance with the criterion that they were 6 dB below the maximum peak of the amplitude of the frequency response. The output of the system to various inputs was predicted and the results were compared with the corresponding measurements on the system.

Williams, J. H., Jr.↗

NASA NTRS1992

Test and control computer user's guide for a digital beam former test system

A Digital Beam Former Test System was developed to determine the effects of noise, interferers and distortions, and digital implementations of beam forming as applied to the Tracking and Data Relay Satellite 2 (TDRS 2) architectures. The investigation of digital beam forming with application to TDRS 2 architectures, as described in TDRS 2 advanced concept design studies, was conducted by the NASA/Lewis Research Center for NASA/Goddard Space Flight Center. A Test and Control Computer (TCC) was used as the main controlling element of the digital Beam Former Test System. The Test and Control Computer User's Guide for a Digital Beam Former Test System provides an organized description of the Digital Beam Former Test System commands. It is written for users who wish to conduct tests of the Digital Beam forming Test processor using the TCC. The document describes the function, use, and syntax of the TCC commands available to the user while summarizing and demonstrating the use of the commands wtihin DOS batch files.

Alexovich, Robert E.↗

NASA NTRS1993

Digital mammography, cancer screening: Factors important for image compression

The use of digital mammography for breast cancer screening poses several novel problems such as development of digital sensors, computer assisted diagnosis (CAD) methods for image noise suppression, enhancement, and pattern recognition, compression algorithms for image storage, transmission, and remote diagnosis. X-ray digital mammography using novel direct digital detection schemes or film digitizers results in large data sets and, therefore, image compression methods will play a significant role in the image processing and analysis by CAD techniques. In view of the extensive compression required, the relative merit of 'virtually lossless' versus lossy methods should be determined. A brief overview is presented here of the developments of digital sensors, CAD, and compression methods currently proposed and tested for mammography. The objective of the NCI/NASA Working Group on Digital Mammography is to stimulate the interest of the image processing and compression scientific community for this medical application and identify possible dual use technologies within the NASA centers.

Clarke, Laurence P.↗

NASA NTRS1993

Issues for bringing digital libraries into public use

In much the same way that the field of artificial intelligence produced a cult which fervently believed that computers would soon think like human beings, the existence of electronic books has resurrected the paperless society as a utopian vision to some, an apocalyptic horror to others. In this essay we have attempted to provide realistic notions of what digital libraries are likely to become if they are a popular success. E-books are capable of subsuming most of the media we use today and have the potential for added functionality by being interactive. The environmental impact of having millions more computers will be offset to some degree, perhaps even exceeded, by the fact that televisions, stereos, VCR's, CD players, newspapers, magazines, and books will become part of the computer system or be made redundant. On the whole, large-scale use of digital libraries is likely to be a winning proposition. Whether or not this comes to pass depends on the directions taken by today's researchers and software developers. By involving the public, the effort being put into digital libraries can be leveraged into something which is big enough to make a real change for the better. If digital libraries remain the exclusive property of government, universities, and large research firms, then large parts of the world will remain without digital libraries for years to come, just as they have remained without digital phone service for far too long. If software companies try to scuttle the project by patenting crucial algorithms and using proprietary data formats, all of us will suffer. Let us reverse the errors of the past and create a truly open digital library system.

Flater, David W.↗

NASA NTRS1998

High Rate Digital Demodulator ASIC

The architecture of High Rate (600 Mega-bits per second) Digital Demodulator (HRDD) ASIC capable of demodulating BPSK and QPSK modulated data is presented in this paper. The advantages of all-digital processing include increased flexibility and reliability with reduced reproduction costs. Conventional serial digital processing would require high processing rates necessitating a hardware implementation in other than CMOS technology such as Gallium Arsenide (GaAs) which has high cost and power requirements. It is more desirable to use CMOS technology with its lower power requirements and higher gate density. However, digital demodulation of high data rates in CMOS requires parallel algorithms to process the sampled data at a rate lower than the data rate. The parallel processing algorithms described here were developed jointly by NASA's Goddard Space Flight Center (GSFC) and the Jet Propulsion Laboratory (JPL). The resulting all-digital receiver has the capability to demodulate BPSK, QPSK, OQPSK, and DQPSK at data rates in excess of 300 Mega-bits per second (Mbps) per channel. This paper will provide an overview of the parallel architecture and features of the HRDR ASIC. In addition, this paper will provide an over-view of the implementation of the hardware architectures used to create flexibility over conventional high rate analog or hybrid receivers. This flexibility includes a wide range of data rates, modulation schemes, and operating environments. In conclusion it will be shown how this high rate digital demodulator can be used with an off-the-shelf A/D and a flexible analog front end, both of which are numerically computer controlled, to produce a very flexible, low cost high rate digital receiver.

Ghuman, Parminder↗

NASA NTRS2002

Implementation of Adaptive Digital Controllers on Programmable Logic Devices

Much has been made of the capabilities of FPGA's (Field Programmable Gate Arrays) in the hardware implementation of fast digital signal processing. Such capability also makes an FPGA a suitable platform for the digital implementation of closed loop controllers. Other researchers have implemented a variety of closed-loop digital controllers on FPGA's. Some of these controllers include the widely used proportional-integral-derivative (PID) controller, state space controllers, neural network and fuzzy logic based controllers. There are myriad advantages to utilizing an FPGA for discrete-time control functions which include the capability for reconfiguration when SRAM-based FPGA's are employed, fast parallel implementation of multiple control loops and implementations that can meet space level radiation tolerance requirements in a compact form-factor. Generally, a software implementation on a DSP (Digital Signal Processor) or microcontroller is used to implement digital controllers. At Marshall Space Flight Center, the Control Electronics Group has been studying adaptive discrete-time control of motor driven actuator systems using digital signal processor (DSP) devices. While small form factor, commercial DSP devices are now available with event capture, data conversion, pulse width modulated (PWM) outputs and communication peripherals, these devices are not currently available in designs and packages which meet space level radiation requirements. In general, very few DSP devices are produced that are designed to meet any level of radiation tolerance or hardness. The goal of this effort is to create a fully digital, flight ready controller design that utilizes an FPGA for implementation of signal conditioning for control feedback signals, generation of commands to the controlled system, and hardware insertion of adaptive control algorithm approaches. An alternative is required for compact implementation of such functionality to withstand the harsh environment encountered on spacecraft. Radiation tolerant FPGA's are a feasible option for reaching this goal.

Gwaltney, David A.↗

NASA NTRS2004

Performance Effects of Display Incogruity in a Digital and Analog Clock Reading Task

In an era of increasing automation, it is important to design displays and input devices that minimize human error. In this context, information concerning the human response to the detection of incongruous information is important. Such incongruous information can be operationalized as unexpected (perhaps erroneous) information on which a decision by the human or operation by an automated system is based. In the aviation environment, decision making when faced with inadequate, incomplete, or incongruous information may occur in a failure scenario. An additional challenge facing the human operator in automated environments is maintaining alertness or vigilance. The vigilance issue is of particular concern as a factor that may interact with performance when faced with inadequate, incomplete, or incongruous information. From the literature on eye-scan behavior we know that the time spent looking at a particular display or indicator is a function of the type of information one is trying to discern from the display. For example, quick glances are all it takes for confirming that an indicator is in a normal position or range, whereas a continuous look of several seconds may be required for confirmation that a complex control input is having the desired effect. Important to consider is that while an extended look takes place, visual input from other sources may be missed. Much like an extended look, the interpretation of incongruous information may require extra time. The present experiment was designed to explore the performance consequences of a decision making task when incongruous information was presented. For this experiment a display incongruity was created on a subset of trials of a clock reading laboratory task. Display incongruity was made possible through presentation of 'impossible' times (e.g. 1:65 or 11:90). Subjects made 'same' 'different' decisions and keyboard responses to pairings of Analog-Analog (AA), Digital-Digital (DD), and Analog- Digital (AD), display combinations. For trials during which display incongruities were not presented, based on prior research comparing digital and analog clock displays, it would be expected that the Digital-Digital condition would result in the shortest response times and the Analog-Analog and Analog-Digital conditions would have longer response times. The performance consequence expected on trials with incongruous times would be very long response times.

J. Raymond Comstock, Jr.↗

NASA NTRS2008

Customizable Digital Receivers for Radar

Compact, highly customizable digital receivers are being developed for the system described in 'Radar Interferometer for Topographic Mapping of Glaciers and Ice Sheets' (NPO-43962), NASA Tech Briefs, Vol. 31, No. 7 (August 2007), page 72. The receivers are required to operate in unison, sampling radar returns received by the antenna elements in a digital beam-forming (DBF) mode. The design of these receivers could also be adapted to commercial radar systems. At the time of reporting the information for this article, there were no commercially available digital receivers capable of satisfying all of the operational requirements and compact enough to be mounted directly on the antenna elements. A provided figure depicts the overall system of which the digital receivers are parts. Each digital receiver includes an analog-to-digital converter (ADC), a demultiplexer (DMUX), and a field-programmable gate array (FPGA). The ADC effects 10-bit band-pass sampling of input signals having frequencies up to 3.5 GHz. The input samples are demultiplexed at a user-selectable rate of 1:2 or 1:4, then buffered in part of the FPGA that functions as a first-in/first-out (FIFO) memory. Another part of the FPGA serves as a controller for the ADC, DMUX, and FIFO memory and as an interface between (1) the rest of the receiver and (2) a front-panel data port (FPDP) bus, which is an industry-standard parallel data bus that has a high data-rate capability and multichannel configuration suitable for DBF. Still other parts of the FPGA in each receiver perform signal-processing functions. The digital receivers can be configured to operate in a stand-alone mode, or in a multichannel mode as needed for DBF. The customizability of the receiver makes it applicable to a broad range of system architectures. The capability for operation of receivers in either a stand-alone or a DBF mode enables the use of the receivers in an unprecedentedly wide variety of radar systems.

Moller, Delwyn↗

NASA NTRS2011

Architecture for a 1-GHz Digital RADAR

An architecture for a Direct RF-digitization Type Digital Mode RADAR was developed at GSFC in 2008. Two variations of a basic architecture were developed for use on RADAR imaging missions using aircraft and spacecraft. Both systems can operate with a pulse repetition rate up to 10 MHz with 8 received RF samples per pulse repetition interval, or at up to 19 kHz with 4K received RF samples per pulse repetition interval. The first design describes a computer architecture for a Continuous Mode RADAR transceiver with a real-time signal processing and display architecture. The architecture can operate at a high pulse repetition rate without interruption for an infinite amount of time. The second design describes a smaller and less costly burst mode RADAR that can transceive high pulse repetition rate RF signals without interruption for up to 37 seconds. The burst-mode RADAR was designed to operate on an off-line signal processing paradigm. The temporal distribution of RF samples acquired and reported to the RADAR processor remains uniform and free of distortion in both proposed architectures. The majority of the RADAR's electronics is implemented in digital CMOS (complementary metal oxide semiconductor), and analog circuits are restricted to signal amplification operations and analog to digital conversion. An implementation of the proposed systems will create a 1-GHz, Direct RF-digitization Type, L-Band Digital RADAR--the highest band achievable for Nyquist Rate, Direct RF-digitization Systems that do not implement an electronic IF downsample stage (after the receiver signal amplification stage), using commercially available off-the-shelf integrated circuits.

Mallik, Udayan↗