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At least 91 records · Page 5

Field-Deployable Acoustic Digital Systems for Noise Measurement

Langley Research Center (LaRC) has for years been a leader in field acoustic array measurement technique. Two field-deployable digital measurement systems have been developed to support acoustic research programs at LaRC. For several years, LaRC has used the Digital Acoustic Measurement System (DAMS) for measuring the acoustic noise levels from rotorcraft and tiltrotor aircraft. Recently, a second system called Remote Acquisition and Storage System (RASS) was developed and deployed for the first time in the field along with DAMS system for the Community Noise Flight Test using the NASA LaRC-757 aircraft during April, 2000. The test was performed at Airborne Airport in Wilmington, OH to validate predicted noise reduction benefits from alternative operational procedures. The test matrix was composed of various combinations of altitude, cutback power, and aircraft weight. The DAMS digitizes the acoustic inputs at the microphone site and can be located up to 2000 feet from the van which houses the acquisition, storage and analysis equipment. Digitized data from up to 10 microphones is recorded on a Jaz disk and is analyzed post-test by microcomputer system. The RASS digitizes and stores acoustic inputs at the microphone site that can be located up to three miles from the base station and can compose a 3 mile by 3 mile array of microphones. 16-bit digitized data from the microphones is stored on removable Jaz disk and is transferred through a high speed array to a very large high speed permanent storage device. Up to 30 microphones can be utilized in the array. System control and monitoring is accomplished via Radio Frequency (RF) link. This paper will present a detailed description of both systems, along with acoustic data analysis from both systems.

Shams, Qamar A.↗

Characterization of a 16-bit Digitizer System for Lidar Data Acquisition

A new 16-bit 6-MHz compact, lightweight waveform digitizer module has been tested using actual 300-nm lidar atmospheric returns. The noise level of this digitizer was tested and found to be substantially below the ozone number density to be measured. The digitizer is inexpensive and compact enough to be deployed in UAV aircraft and spacecraft environments. With 16-bit digitizers a resolution of 0.046 mV/step can be achieved, substantially improving resolution over 12-bit systems. This digitizer will find widespread use in future DIAL receiver systems.

Williamson, Cynthia K.↗

NASA Earth Science Technology Office (ESTO) Advanced Information Systems Technology (AIST) Program: Earth Systems Digital Twins (ESDT) Standards for Interoperable Digital Twins Workshop Presentations

On September 18, 2023, NASA Earth Science Technology Office (ESTO) Advanced Information Systems Technology (AIST) Program conducted a mini-workshop that brought together seven experts to survey and discuss "Standards for Interoperable Digital Twins". Since three years, the AIST Program has been developing technologies and prototypes for Earth System Digital Twins (ESDT). During those developments and after the ESDT Workshop held in October 2022, it became clear that standard for ESDT interoperability were needed and should be defined as soon as possible. To address this challenge, the AIST program will survey ongoing development for Digital Twins standards in various domains and the September 18, 2023 Workshop represented the first step towards this understanding. Speakers during this event included: Michael Grieves (Digital Twin Institute), Siri Jodha Singh Khalsa (IEEE GRSS Standards), Trent Tinker (OGC), Ryan Berkheimer (NOAA), John Stone (NVIDIA), Thomas Geenen (ECMWF-DestinE) and Arne Berre (SINTEF-Iliad DTO and EDITO). This presentation regroups all the speakers' presentations.

Earth Science Remote Sensing; Information Systems↗

Logic redundancy improves digital system reliability

Redundant-channel system automatically corrects any single error in a set of three binary signal channels. This system is especially applicable to digital computers where data is transmitted in parallel channels.

Source record↗

Digital system bus integrity

This report summarizes and describes the results of a study of current or emerging multiplex data buses as applicable to digital flight systems, particularly with regard to civil aircraft. Technology for pre-1995 and post-1995 timeframes has been delineated and critiqued relative to the requirements envisioned for those periods. The primary emphasis has been an assured airworthiness of the more prevalent type buses, with attention to attributes such as fault tolerance, environmental susceptibility, and problems under continuing investigation. Additionally, the capacity to certify systems relying on such buses has been addressed.

Eldredge, Donald↗

Procedure for estimating stability and control parameters from flight test data by using maximum likelihood methods employing a real-time digital system

A maximum likelihood parameter estimation procedure and program were developed for the extraction of the stability and control derivatives of aircraft from flight test data. Nonlinear six-degree-of-freedom equations describing aircraft dynamics were used to derive sensitivity equations for quasilinearization. The maximum likelihood function with quasilinearization was used to derive the parameter change equations, the covariance matrices for the parameters and measurement noise, and the performance index function. The maximum likelihood estimator was mechanized into an iterative estimation procedure utilizing a real time digital computer and graphic display system. This program was developed for 8 measured state variables and 40 parameters. Test cases were conducted with simulated data for validation of the estimation procedure and program. The program was applied to a V/STOL tilt wing aircraft, a military fighter airplane, and a light single engine airplane. The particular nonlinear equations of motion, derivation of the sensitivity equations, addition of accelerations into the algorithm, operational features of the real time digital system, and test cases are described.

Grove, R. D.↗

A digital system to produce imagery from SAR data

This paper describes a digital processing algorithm and its associated system design for producing images from Synthetic Aperture Radar (SAR) data. The proposed system uses the Fast Fourier Transform (FFT) approach to perform the two-dimensional correlation process. The range migration problem, which is often a major obstacle to efficient processing, can be alleviated by approximating the locus of echoes from a point target by several linear segments. SAR data corresponding to each segment is correlated separately, and the results are coherently summed to produce full-resolution images. This processing approach exhibits greatly improved computation efficiency relative to conventional digital processing methods.

Wu, C.↗

Representation and matching of knowledge to design digital systems

A knowledge-based expert system is described that provides an approach to solve a problem requiring an expert with considerable domain expertise and facts about available digital hardware building blocks. To design digital hardware systems from their high level VHDL (Very High Speed Integrated Circuit Hardware Description Language) representation to their finished form, a special data representation is required. This data representation as well as the functioning of the overall system is described.

Jones, J. U.↗

Apollo experience report: Guidance and control systems - Digital autopilot design development

The development of the Apollo digital autopilots (the primary attitude control systems that were used for all phases of the lunar landing mission) is summarized. This report includes design requirements, design constraints, and design philosophy. The development-process functions and the essential information flow paths are identified. Specific problem areas that existed during the development are included. A discussion is also presented on the benefits inherent in mechanizing attitude-controller logic and dynamic compensation in a digital computer.

Peters, W. H.↗

Digital system for structural dynamics simulation

State-of-the-art digital hardware and software for the simulation of complex structural dynamic interactions, such as those which occur in rotating structures (engine systems). System were incorporated in a designed to use an array of processors in which the computation for each physical subelement or functional subsystem would be assigned to a single specific processor in the simulator. These node processors are microprogrammed bit-slice microcomputers which function autonomously and can communicate with each other and a central control minicomputer over parallel digital lines. Inter-processor nearest neighbor communications busses pass the constants which represent physical constraints and boundary conditions. The node processors are connected to the six nearest neighbor node processors to simulate the actual physical interface of real substructures. Computer generated finite element mesh and force models can be developed with the aid of the central control minicomputer. The control computer also oversees the animation of a graphics display system, disk-based mass storage along with the individual processing elements.

Krauter, A. I.↗

Fermilab PIP II Machine Protection System Digitized Data Noise Elimination Scheme and Its FPGA Implementation

In Fermilab's PIP-II machine protection system, beam loss signals from various detectors are digitized at 125 MS/s. Noise from both high-frequency sources and low-frequency 60 Hz AC power equipment can con-taminate the data. To suppress noise across these ranges especially 60 Hz and its harmonics, which overlap with beam loss signal frequencies advanced digital processing beyond standard filtering is re-quired. Several real-time functional blocks were simu-lated and tested on an FPGA: (1) a dual time-constant discharging integrator filter, (2) a de-ripple baseline extraction and storage block, and (3) a fast-recovery discharging integrator. The nonlinear IIR integrator filter removes high-frequency noise and feeds into the baseline extractor. Upon detecting abrupt beam loss, it switches to a longer time constant to prevent baseline distortion. The de-ripple block calculates a valid base-line by averaging over multiple 60 Hz periods, storing results in a 4096-word FPGA RAM. This baseline is subtracted from raw data before integration by the fast-recovery block, which resets quickly after use. All blocks achieved expected performance.

Wu, Jinyuan [Fermilab] (ORCID:0000000344329521)↗