Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “digital circuits designs”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 91 records · Page 5

Short Circuit Detection and Voltage Sense for High Voltage Ionization Tube Power Supplies

Fermilab's PIP-II upgrade requires new rack-mounted power supplies for Beam Loss Monitor (BLM) ionization tubes compatible with the microTCA 4.1 standard, supporting high-side current measurement for short circuit detection, voltage sense telemetry, and low-side current measurement for beam loss readout. This work presents the design and preliminary schematic of such a supply. A resistive current sensing approach was chosen over inductive, optical, and Hall-effect alternatives for its independence from cable length and component availability. A 500 mΩ inline shunt steps the 2 kV common mode voltage down to roughly 70 V, producing a ~27 μV pulse during a short, which is amplified 500x, compared against a 14-bit DAC threshold, and latched to drive a fault line. Voltage sense steps the 2 kV output down at a 1V/1000V ratio, buffers it with a low bias current amplifier, and digitizes it via a 24-bit ADC over SPI. Onboard power is regulated from 12 V down to isolated 5 V and 3.3 V rails, with capacitive isolation on FPGA communication lines. Lumped parameter models were developed for the ionization tube (0.327 nF, 20 to 200 GΩ dynamic resistance) and the RG-58 coaxial cable to support the design. Component selection is complete and a preliminary schematic has been drawn in Altium Designer, forming the foundation for future prototyping and validation.

Yu, Kellen [Cornell U.]↗

Integrated Spatial, Spectral, & Temporal Optical Reflectance System for Precision Occupancy & Location Sensing to Improve Building Energy Efficiency

Buildings consume approximately 35% of the electricity used in the U.S. and building owners can significantly reduce this energy use by providing services like heating, electrical power and lighting only when people are present. The ARPAe funded program titled “INTEGRATED SPATIAL, SPECTRAL, & TEMPORAL OPTICAL REFLECTANCE SYSTEM FOR PRECISION OCCUPANCY & LOCATION SENSING TO IMPROVE BUILDING ENERGY EFFICIENCY” demonstrates how a low cost sensor technology developed for measuring distances can be used to count and locate occupants with a high degree of precision with a very low error rates. This platform tells a building control system where occupants are located (but not who they are) so that energy consuming services can be provided only when the services are needed by building occupants. The original proof of concept involved using low cost, commercially available time-of-flight (TOF) sensors that measure distance, but the performance of these existing sensors was lacking, as they could not operate properly in the presence of sunlight, which blinded the simple TOF sensors and limited their utility in buildings. This project proposed a powerful new class of TOF sensors that used state-of-the-art integrated circuit (IC) fabrication processes that combined advanced photonics with conventional silicon chip circuitry for improved sensor performance. An equally important part of this project was to find ways to maximize occupant count and location accuracy while using the fewest number of sensors possible, in order to keep costs low. By using building blueprints to create digital twins of commercial building spaces, the team developed new algorithms to maximize occupant count and tracking accuracy by properly locating the minimum number of sensors at just the right spots in the building. This capability not only minimizes system costs but also simplified sensor installation and system commissioning. Our simulations of our sensor networks for a range of commercial floorplan designs demonstrated that our installed cost target of $0.08/sqft was attainable, though not fully demonstrated during the project. Finally, we noted that the TOF sensor concept could provide a valuable role in health and eldercare by tracking patients without the need for worn sensors and would be useful for fall detection and other patient safety metrics, including tracking healthcare/patient interactions. We feel that, when fully developed, this new class of sophisticated TOF sensors and support software will be a powerful new approach to improving building energy efficiency based on occupant centric control platforms and will also open new levels of patient safety in healthcare operations. To realize this potential, the team formed the Troy Sensor Company LLC to oversee licensing of the programs patents and continue to seek commercialization of this program’s activity sensing technologies.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗

The SparkPix-S ASIC for the sparsified readout of 1 MHz frame-rate X-ray cameras at LCLS-II: pixel design and simulation results

Exploiting the “sparse” nature of the information in XPCS (X-ray Photon Correlation Spectroscopy) and XSVS (Speckle Visibility Spectroscopy) experiments, we present the SparkPix-S, a 3-sides buttable Application Specific Integrated Circuit (ASIC) based on a sparsified readout strategy for large-format hybrid detectors. The SparkPix-S architecture, based on the successful ePix family, will be composed as follows: a front-end 2-D matrix of 384×352 square pixels with 50 µm pitch is arranged to match the dimensions of a PIN Si-sensor matrix; charge readout, signal shaping and amplitude discrimination is performed at pixel-level, by means of a low-power (<18 µW) analog processor, which, in case of an event, negotiates access to an analog bus placed every other column; on the chip periphery (balcony), the information on each bus is digitized by an array of successive approximation analog-to-digital converters (SAR-ADCs) running at 10 Msps; on the digital back-end the global logic will generate the output data stream using low-voltage differential signalling (LVDS). A first prototype of the SparkPix-S, with a reduced matrix size of 96×96 pixels, is currently under production on a 130 nm CMOS technology. Simulated performance results show an equivalent noise charge <60 el. r.m.s. at 1 MHz repetition rate, with a maximum input energy of 60 keV and capability to discriminate charge signals with equivalent energy as low as 900 eV.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Upgrade of the helically symmetric experiment Thomson scattering diagnostic suite

The Helically Symmetric eXperiment (HSX) Thomson Scattering (TS) diagnostic is being upgraded to decrease uncertainty in electron temperature and density measurements. Upgrades to the HSX TS diagnostic will consist of a novel redesign of polychromator electronics and digitization of the TS output signal. Here, we also present a study of the benefits of an additional spectral channel that will sample the red-shifted band of the scattered spectrum. In conclusion, to maximize system bandwidth (BW) and gain, while minimizing noise, the existing low-BW polychromator electronics on HSX will be replaced by high-BW, high gain circuitry designed in-house.

47 OTHER INSTRUMENTATION↗

The VMM3a ASIC

The VMM3a is a custom low-noise Application Specific Integrated Circuit. It is intended to be used in the front end readout electronics of both the Micromegas and sTGC detectors of the ATLAS New Small Wheels upgrade project at CERN. It is fabricated in the 130 nm GlobalFoundries 8RF-DM process. Here, the 64 channels with highly configurable parameters, although designed for a specific project, can meet the processing needs of signals from various detector types in several other applications. In this note, the VMM3a, which is the production version of the VMM family, will be presented along with the features incorporated and its performance.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗

ETROC1: the first full chain precision timing prototype ASIC for CMS MTD endcap timing layer upgrade

We present the design and characterization of the first fullchain precision timing prototype ASIC, named ETL Readout Chipversion 1 (ETROC1) for the CMS MTD endcap timing layer (ETL)upgrade. The ETL utilizes Low Gain Avalanche Diode (LGAD) sensors todetect charged particles, with the goal to achieve a time resolutionof 40–50 ps per hit, and 30–40 ps per track with hits from twodetector layers. The ETROC1 is composed of a 5 × 5 pixelarray and peripheral circuits. The pixel array includes a4 × 4 active pixel array with an H-tree shaped networkdelivering clock and charge injection signals. Each active pixel iscomposed of various components, including a bump pad, a chargeinjection circuit, a pre-amplifier, a discriminator, adigital-to-analog converter, and a time-to-digital converter. Thesecomponents play essential roles as the front-end link in processingLGAD signals and measuring timing-related information. Theperipheral circuits provide clock signals and readoutfunctionalities. The size of the ETROC1 chip is7 mm× 9 mm. ETROC1 has been fabricated in a 65 nmCMOS process, and extensively tested under stimuli of chargeinjection, infrared laser, and proton beam. The time resolution ofbump-bonded ETROC1 + LGAD chipsets reaches 42–46 ps per hit in thebeam test.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Design and Optimization of a Gas-Cooled, Airfoil Fin Microchannel Heat Exchanger

High-performance microchannel heat exchangers are needed to supply heat for power conversion for nuclear microreactors. An airfoil fin microchannel design, constructed of Alloy 617 with helium as the working fluid, was analyzed and optimized using a design of experiments with artificial intelligence and machine learning techniques. The use of airfoil fins offers the potential to reduce pressure drop across the heat exchanger, as compared to other types of channel configurations. A framework for topology optimization of airfoil fin PCHEs has been developed that can be readily extended to different fin sizes and shapes, as well as different inlet and operating conditions, materials of construction, and working fluids. An optimization procedure was developed that employs computational fluid dynamics for a set of design points identified using Latin hypercube sampling. STAR-CCM+ was used to analyze a simplified two-channel configuration where five parameters were varied – inlet angle, fin scale, extent of staggering, transverse and longitudinal pitches. Two methods were compared for generating surrogate models – a 5D polynomial and a regression neural network. A response surface approximation was created from the surrogate models and input to a genetic algorithm. The genetic algorithm identified a set of optimal points on the Pareto front. The optimal geometry was found across six channel Reynolds numbers ranging from 1000 to 5000 to analyze how varying inlet conditions affects the optimal design. A set of optimal designs that maximizes heat transfer and minimizes pressure drop was identified, and a thermal stress analysis was performed on the optimal design. This work has developed a digital framework for the expedient topology design and evaluation of PCHE designs for gas-cooled microreactor applications. Correlations for the Nusselt number and Darcy friction factor were developed that can be useful for thermal hydraulic analyses using system codes. A thermal stress analysis was conducted and a brief discussion of the status of code cases of PCHEs for nuclear applications is given. Testing and thermomechanical modeling is needed to facilitate future code compliance of PCHEs for high pressure and high temperature applications.

42 ENGINEERING↗

A Cryogenic readout integrated circuit with analog pile-up and in-Pixel ADC for high frame rate Skipper CCD-in-CMOS Sensors

The Skipper CCD-in-CMOS Parallel Read-Out Circuit V2 (SPROCKET2) is designed to enable high frame rate readout of Skipper CCD-in-CMOS image sensors. The SPROCKET2 pixel is fabricated in a 65 nm CMOS process and occupies a 60$\mu$m $\times$ 60$\mu$m footprint. SPROCKET2 is intended to be heterogeneously integrated with a pixelated Skipper CCD-in-CMOS sensor, such that one readout pixel is connected to a multiplexed array of 16 active image sensor pixels, to match their spatial geometry. Our design benefits from the Skipper CCD-in-CMOS sensor's non-destructive readout capability to achieve exceptionally low noise through multi-sampling and averaging while optimizing for total power consumption. The pixel readout utilizes correlated double sampling to minimize 1/f noise and includes "pile-up" of ten successive samples in the analog domain before digitizing at a rate of 66.7 ksps. Measurement results of in-pixel serial SAR ADC show DNL and INL of ~0. 44 LSB and 0.58 LBS respectively. A large area array of 20,000 SPROCKET2 ADC pixels (multiplexed 1:16 to 320,000 sensor pixels) is currently under test. By reading out data over a 10 Gbps optical link, this pixel design enables a frame rate of $\sim$ 4 kfps for large sensing areas with minimal sensing deadtime. In the highest gain mode, the pixelated ADC has an input-referred resolution of 10$\mu$V with a simulated power consumption of 50$\mu$W. The pixel operates with constant current draw to minimize power-rail crosstalk.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Testing of Instrumentation and Control Sensors and Cables for Small Modular Reactors

As advanced reactor concepts like small modular reactors (SMRs) progress towards design maturity and commercial deployment, it is important to assess their instrumentation and control (I&C) system sensors and cables to assure their safe, reliable, and efficient operation throughout their service lifetimes. The I&C system of any nuclear power plant (NPP) is the central nervous system of the plant and is made up of field devices such as sensors which are connected via cables to analog and/or digital systems. These systems are responsible for control and/or protection of the plant. The performance of I&C sensors and cables is dependent on several factors, including plant operating conditions. In particular, the plant operation can affect the static (accuracy) and dynamic (response) performance of the sensor, whereas the surrounding ambient environment can impact the remaining useful life of the cables, connectors, and other associated components within I&C sensor circuits.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Medium Voltage Energy Hub Based on Multilevel Cascaded H Bridge-Dual Active Bridge Back-to-Back Converter for Power Distribution Feeders Interconnection and Multiple Simultaneous Grid Services

This paper presents a medium voltage energy hub based on a modular design of a multilevel cascaded H bridge (CHB)-dual active bridge (DAB) converter. The energy hub composed of the two CHB-DAB modules with a back-to-back topology can be utilized as a grid interconnection component between distribution feeders. The energy hub can provide multiple simultaneous grid services such as voltage regulation, power factor correction, as well as active power flow control between the connected feeders, contributing to grid flexibility, efficiency, reliability, and resilience. Circuit structure and control schemes for the energy hub including both local controllers for each converter and outer loop controllers are proposed to enable simultaneous grid services with coordination to prevent the overloading of the hub. To validate the performance of the hub, the hub system is interconnected between two IEEE 4-bus feeders and provides voltage regulation for both feeders, while controlling active power flow between them. The system and the feeders are implemented in Real-Time Digital Simulator (RTDS) for real-time simulation verification.

Choi, Jongchan↗

Cryogenic Front-End ASICs for Low-Noise Readout of Charge Signals

This paper presents design details and measurement results of LArASIC, a front-end application specific integrated circuit (ASIC) designed for low-noise readout of charge signals generated in neutrino study experiments within liquid argon time projection chambers. LArASIC comprises of 16-channels of programmable charge amplification and pulse shaping stages that provide a voltage readout proportional to the input charge and was optimized for operation at liquid argon temperature, i.e., 89 K. The chip was fabricated in a 180 nm CMOS process. Measurements at liquid nitrogen temperature, i.e., 77 K, indicate that the channel outputs have high linearity (INL < 0.1%) within the operating range, an equivalent noise charge of 534 electrons for a peaking time of 1 µs and a detector capacitance of 150 pF, and a worst-case inter-channel cross-talk of 0.35%. The paper also presents design choices made in the process of migrating LArASIC to CHARMS, an ASIC to be fabricated in a 65 nm process that includes all features provided by LArASIC, along with additional digital programmability for improved robustness and flexibility. CHARMS is intended for use in future high-energy physics experiments that require high-resolution charge or light readout with shorter pulse peaking times.

47 OTHER INSTRUMENTATION↗

A sub-picosecond digital clock monitoring system

We describe a low-cost system designed to monitor wander in digital clocks with a precision of ≤ 1 ps. With this system we have shown that it is possible to track phase variations at the sub-picosecond level by adding noise to a reference clock. As in many cases where a clock is part of a complex distribution network small changes in temperature and other effects can lead to small changes in the clock's phase. As a further demonstration of the system, we have used it to measure the phase changes induced in optical signals in fibers.

47 OTHER INSTRUMENTATION↗

An integer- N frequency synthesizer for flexible on-chip clock generation

A low-power integer-N frequency synthesizer for flexible on-chip clock generation has been designed in a 65 nm CMOS process. The circuit can be programmed to generate two independent low-jitter clocks between 30 MHz and 3 GHz that are locked to a 10–50 MHz reference input. The design uses a phase-locked loop (PLL) with a dual-tuned LC voltage-controlled oscillator (VCO), programmable feedback divider, and dual output dividers. The total power consumption from 1.2 V and 0.8 V supplies is 4.0 mW. In conclusion, experimental results confirm the functionality of the proposed synthesizer over a wide range of output frequencies.

47 OTHER INSTRUMENTATION↗

AstroPix4 — a novel HV-CMOS sensor developed for space based experiments

For the proposed space based gamma-ray observatory All-sky Medium-Energy Gamma-ray Observatory eXplorer (AMEGO-X), a silicon tracker based on a novel High Voltage-CMOS (HV-CMOS) sensor called AstroPix, is currently being developed. Preliminary measurements with the first full reticle prototype AstroPix3 show that the power target of 1.5 mW/cm 2 can currently not be reached due to the digital consumption of 3.08 mW/cm 2 , while the analog power consumption of 1.04 mW/cm 2 and a break down voltage of over 350 V look promising. Based on these results, the design changes in AstroPix4, submitted in May 2023, are presented, containing changes to the time stamp generation and readout architecture. A digital power consumption below 0.25 mW/cm 2 is expected by removing the fast 200 MHz clock used to measure the time-over-threshold (ToT) and an LVDS receiver. A maximum resolution of 3.125 ns for time-of-arrival (ToA) and ToT is reached by adding per-pixel Flash-Time-to-Digital Converter (TDCs) controlled by a global delay-locked loop (DLL).

47 OTHER INSTRUMENTATION↗

Harnessing ionic complexity: A modeling approach for hierarchical ionic circuit design

Since the 1950s, soft ionic devices have evolved from individual components to an expanding library of sensors, actuators, signal transmitters, and processors. However, integrating these components into complex, multifunctional systems remains challenging due to the nonintuitive and nonlinear interactions between ionic elements. In this work, we address these fundamental challenges by developing a lumped element model that enables interrogation of the physics that governs ionic circuits, as well as rapid design and optimization. Our model captures features specific to ionic charge carriers, while preserving the hierarchical design flexibility and computational efficiency of traditional circuit modeling. We demonstrate that our model can not only fit individual device behavior but also accurately predict the behavior of larger circuits formed by combining those devices. Additionally, we show how our tool utilizes the intrinsic nonlinearities of ionic systems to enable extended functionality, revealing how factors such as ion enrichment, ion leakage, and polymer charge density influence performance. Lastly, we present a fully ionic power supply, sensor, control system, and actuator for a soft robot that adapts its motion in response to environmental salt, illustrating the tool’s potential to accelerate advancements in chemical sensing, biointerfacing, biomimetic systems, and adaptive materials.

42 ENGINEERING↗

GRAPH — an readout ASIC for large MCP based detectors

We present a programmable 16 channel, mixed signal, low power readout ASIC, having the project historically named Gigasample Recorder of Analog waveforms from a PHotodetector (GRAPH). It is designed to read large aperture single photon imaging detectors using micro channel plates for charge multiplication, and measuring the detector's response on crossed strips anodes to extrapolate the incoming photon position. Each channel consists of a fast, low power and low noise charge sensitive amplifier, which provides a myriad of coarse and fine programmable options for gain and shaping settings. Further, the amplified signal is recorded using, to our knowledge novel, the Hybrid Universal sampLing Architecture (HULA) ADC. A kind of mixed signal double buffer memory, that enables concurrent waveform recording, and selected event digitized data extraction. The sampling frequency is freely adjustable between few kHz up to 125 MHz, while the chip's internal digital memory holds a history 2048 samples for each channel, with a digital headroom of 12 bits. An optimized region of interest sample-read algorithm allows to extract the information just around the event pulse peak, while selecting the next event, thus substantially reducing the operational dead time. The chip is designed in 130 nm TSMC CMOS technology, and its power consumption is around 47 mW per channel.

47 OTHER INSTRUMENTATION↗

The AMACStar ASIC for the HL-LHC ATLAS ITk Strip detector: design, verification, testing, and quality assurance

For the high-luminosity upgrade to the LHC (HL-LHC), the ATLAS detector at CERN requires an all-new inner detector, the Inner Tracker (ITk). The ITk Strip subdetector is made up of silicon modules, which include three types of radiation-hard ASICs. One of these is the Autonomous Monitor and Control (AMAC). The AMAC is manufactured by Global Foundries using 130 nm CMOS8RF DM technology and is approximately 3 by 5 mm in size. This ASIC autonomously monitors the temperatures, voltages, and currents in the module components while controlling critical values in order to prevent these quantities from reaching dangerous levels. The final design, AMACStar, was verified, tested, and ensured to perform all necessary functions. A quality control procedure using an in-house probe station set-up was developed in order to ensure that every individual chip on each wafer of AMACStars required by the ITk Strip project met performance requirements. The average per wafer yield of usable AMACStars is 92.33%, exceeding the design-specific 90% yield estimated for project costing. This estimate was based on actual yields for similar designs in this process.

Analogue electronic circuits↗

Real-time dynamic wavelength tuning and intensity modulation of metal-clad nanolasers

To realize ubiquitously used photonic integrated circuits, on-chip nanoscale sources are essential components. Subwavelength nanolasers, especially those based on a metal-clad design, already possess many desirable attributes for an on-chip source such as low thresholds, room-temperature operation and ultra-small footprints accompanied by electromagnetic isolation at pitch sizes down to ∼50 nm. Another valuable characteristic for a source would be control over its emission wavelength and intensity in real-time. Most efforts on tuning/modulation thus far report static changes based on irreversible techniques not suited for high-speed operation. In this study, we demonstrate in-situ dynamical tuning of the emission wavelength of a metallo-dielectric nanolaser at room temperature by applying an external DC electric field. Using an AC electric field, we show that it is also possible to modulate the output intensity of the nanolaser at high speeds. The nanolaser’s emission wavelength in the telecom band can be altered by as much as 8.35 nm with a tuning sensitivity of ∼1.01 nm/V. Additionally, the output intensity can be attenuated by up to 89%, a contrast sufficient for digital data communication purposes. Finally, we achieve an intensity modulation speed up to 400 MHz, limited only by the photodetector bandwidth used in this study, which underlines the capability of high-speed operation via this method. This is the first demonstration of a telecom band nanolaser source with dynamic spectral tuning and intensity modulation based on an external E-field to the best of our knowledge.

Deka, Suruj S. (ORCID:0000000297812317)↗