Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “circuit faults”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 91 records · Page 5

Robust Disturbance Rejection Rotor Current Control of Doubly-Fed Induction Generators

This article proposes a robust transient disturbance rejection current controller (TDRCC) to improve the transient performance of doubly-fed induction generators (DFIGs) in wind turbines during grid disturbances, such as short circuits. Here, the proposed robust TDRCC replaces the proportional-integral-derivative (PID) current controllers conventionally used in the vector control scheme of the DFIG rotor side converter (RSC). The TDRCC estimates the transient disturbances caused by grid faults or other external disturbances and provides compensation to the DFIG rotor voltage in the current control loops of the RSC to improve the robustness of the controller to disturbance. A sliding-mode current controller (SMCC) is also designed to highlight the transient performance improvement of the DFIG using the TDRCC over the state-of-the-art control methods during grid short circuit faults. Simulation studies are conducted in PSCAD/EMTDC for a 3.6-MW DFIG wind turbine with the proposed TDRCC, the conventional PI controller, and the SMCC, respectively during the most severe balanced three-phase grid short circuit fault specified by the U.S. grid code as well as an unbalance single-phase grid short circuit fault. Hardware experiments are conducted on a 200-W DFIG wind turbine emulator with the three different controllers for the same three-phase short circuit fault. Simulation and hardware experiment results show that the TDRCC reduces the peak rotor current significantly when compared with the PI and SMCC controlled DFIG system and, therefore, would help prolong the lifespan of the DFIG's power electronics and reduce maintenance costs.

42 ENGINEERING↗

Solovay-Kitaev algorithm and randomized compilation

This paper discusses a technique for randomizing over synthesized one-qubit gate sequences in order to mitigate coherent errors in fault-tolerant circuits. We present simulated and experimental data showing that randomization can reduce the trace distance to the target state.

Widzowski Maupin, Oliver Gabriel [Sandia National ↗

Influence of Inverter-Based Resources on Microgrid Protection: Part 1: Microgrids in Radial Distribution Systems

Microgrids are being deployed at a rising rate, primarily as a means of increasing power system resilience. Commonly, a microgrid today includes at least some inverter-based resources (IBRs), and many microgrids have modes or conditions under which they are entirely energized by IBRs. Also, most microgrids today are deployed on radial distribution circuits, but it is conceivable that they could also be considered for deployment on secondary network systems.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Postfault Operation of Three-Level Inverter Driven Six-Phase PMSM With Enhanced Torque–Speed Region

This article presents an open-switch postfault operational technique with enhanced torque–speed region for three-level (3L) active neutral point clamped (ANPC) inverter-driven symmetrical six-phase (SSP) permanent magnet synchronous machines (PMSMs). Maximum torque (MT), minimum loss (ML), and single three-phase (STP) operations are commonly used for the postfault operations of six-phase drives. The maximum possible torque and speed in these operations are generally limited by voltage, current ratings, and the neutral point configuration of the motor. To enhance the postfault torque and speed operating region, the torque and speed limits in different postfault operational techniques are determined based on the voltage, current constraints, and neutral point configuration of the SSP-PMSM. In this work, a unified postfault operation is proposed that increases the postfault operational limits by combining MT, ML, and STP operations and modifying the neutral point configuration of the SSP-PMSM. In addition, a technique is also presented that modifies the pulsewidth modulation technique to enable full torque operation below 0.5 p.u. speed. The proposed postfault operational technique enables full-speed (1 p.u.) operation by operating in STP mode and full torque operation (1 p.u.) below 0.5 p.u. speed. Furthermore, the postfault operational technique is experimentally validated using a Gallium Nitride (GaN) device-based3L-ANPC inverter-driven SSP-PMSM.

42 ENGINEERING↗

Photovoltaic array reliability optimization

An overview of the photovoltaic array reliability problem is presented, and a high reliability/minimum cost approach to this problem is presented. Design areas covered are cell failure, interconnect fatigue, and electrical insulation breakdown, and three solution strategies are discussed. The first involves controlling component failures in the solar cell (cell cracking, cell interconnects) and at the module level (must be statistically treated). Second, a fault tolerant circuit is designed which reduces array degradation, improves module yield losses, and controls hot-spot heating. Third, cost optimum module replacement strategies are also effective in reducing array degradation. This can be achieved by minimizing the life-cycle energy cost of the photovoltaic system. The integration of these solutions is aimed at reducing the 0.01% failure rate.

Ross, R. G., Jr.↗

Development of photovoltaic array and module safety requirements

Safety requirements for photovoltaic module and panel designs and configurations likely to be used in residential, intermediate, and large-scale applications were identified and developed. The National Electrical Code and Building Codes were reviewed with respect to present provisions which may be considered to affect the design of photovoltaic modules. Limited testing, primarily in the roof fire resistance field was conducted. Additional studies and further investigations led to the development of a proposed standard for safety for flat-plate photovoltaic modules and panels. Additional work covered the initial investigation of conceptual approaches and temporary deployment, for concept verification purposes, of a differential dc ground-fault detection circuit suitable as a part of a photovoltaic array safety system.

Source record↗

Hall-Effect Ground-Fault Interruptor

Tested ground-fault interruption circuit utilizing Hall-effect device to sense differential current in magnetic core tips and opens circuit.

Okin, L.↗

Electrical safety requirements: Implications for the module designer

Commercial photovoltaic array installations, which include residential and intermediate applications, are subject to building and electrical codes and to product safety standards. The National Electrical Code (NEC) Article 690, titled Solar Photovoltaic Systems, contains provisions defining acceptable levels of system safety and emphasizes the system design and its installation. The Underwriters Laboratories, Inc. (UL), document titled: Proposed First Edition of the Standard for Flat Plate Photovoltaic Modules and Panels, UL-1703, identifies module and panel construction requirements that ensure product safety. Together these documents describe requirements intended to minimize hazards such as shock and fire. Although initial focus of these requirements is on single crystal silicon modules, they are generic in nature, and are equally applicable to high voltage ( 30 Vdc), multikilowatt, thin film systems. A major safety concern is insulation breakdown within the module or array wiring system, or discontinuities within the electrical conductors. These failures can result in ground faults, in circuit arcs, or exposure to hazardous electrical parts. Safeguards are discussed.

Sugimura, R. S.↗

Fault detection in digital and analog circuits using an i(DD) temporal analysis technique

An i(sub DD) temporal analysis technique which is used to detect defects (faults) and fabrication variations in both digital and analog IC's by pulsing the power supply rails and analyzing the temporal data obtained from the resulting transient rail currents is presented. A simple bias voltage is required for all the inputs, to excite the defects. Data from hardware tests supporting this technique are presented.

Beasley, J.↗

Estimation of Faults in DC Electrical Power System

This paper demonstrates a novel optimization-based approach to estimating fault states in a DC power system. Potential faults changing the circuit topology are included along with faulty measurements. Our approach can be considered as a relaxation of the mixed estimation problem. We develop a linear model of the circuit and pose a convex problem for estimating the faults and other hidden states. A sparse fault vector solution is computed by using 11 regularization. The solution is computed reliably and efficiently, and gives accurate diagnostics on the faults. We demonstrate a real-time implementation of the approach for an instrumented electrical power system testbed, the ADAPT testbed at NASA ARC. The estimates are computed in milliseconds on a PC. The approach performs well despite unmodeled transients and other modeling uncertainties present in the system.

Gorinevsky, Dimitry↗

DALG: A program for test pattern generation in combinational logical circuits

A user's manual for a computer program DALG which generates test patterns for detecting faults in combinational logic circuits containing up to 200 logical gates is presented. The gates may be of logical types AND, OR, NAND, NOR, NOT, or Exclusive OR is presented. The faults may be any one gate or input struck at a fixed value (0 or 1). In addition to test pattern generation DALG will also determine whether or not the given test pattern will detect given faults in a circuit. Sample problems are given along with input data sheets and printed output to illustrate the capabilities of the program.

Source record↗

Fault Location Using the Natural Frequency of Oscillation of Current Discharge in MTdc Networks

This paper discusses a novel offline-fault location approach using single ended measurements. The natural dissipation of the circuit parameters are considered for fault location. A relationship between the damped natural frequency of oscillation of the transmission line current and fault location is established. The hybrid dc circuit breaker (dcCB) interrupts the fault current, whereby the transmission line current attenuates under the absence of any driving voltage source. The line capacitance discharges into the fault at a specific frequency of oscillation and rate of attenuation. Utilizing this information, the fault location in a multi-terminal direct current (MTdc) network can be obtained. A three terminal radial model of a MTdc is used for performance evaluation of the proposed method using Power System Computer Aided Design (PSCAD)/Electromagnetic Transients including dc (EMTdc).

42 ENGINEERING↗

Dust-Tolerant Intelligent Electrical Connection System

Faults in wiring systems are a serious concern for the aerospace and aeronautic (commercial, military, and civilian) industries. Circuit failures and vehicle accidents have occurred and have been attributed to faulty wiring created by open and/or short circuits. Often, such circuit failures occur due to vibration during vehicle launch or operation. Therefore, developing non-intrusive fault-tolerant techniques is necessary to detect circuit faults and automatically route signals through alternate recovery paths while the vehicle or lunar surface systems equipment is in operation. Electrical connector concepts combining dust mitigation strategies and cable diagnostic technologies have significant application for lunar and Martian surface systems, as well as for dusty terrestrial applications. The dust-tolerant intelligent electrical connection system has several novel concepts and unique features. It combines intelligent cable diagnostics (health monitoring) and automatic circuit routing capabilities into a dust-tolerant electrical umbilical. It retrofits a clamshell protective dust cover to an existing connector for reduced gravity operation, and features a universal connector housing with three styles of dust protection: inverted cap, rotating cap, and clamshell. It uses a self-healing membrane as a dust barrier for electrical connectors where required, while also combining lotus leaf technology for applications where a dust-resistant coating providing low surface tension is needed to mitigate Van der Waals forces, thereby disallowing dust particle adhesion to connector surfaces. It also permits using a ruggedized iris mechanism with an embedded electrodynamic dust shield as a dust barrier for electrical connectors where required.

Lewis, Mark↗

Functional requirements for an intelligent RPC

An intelligent remote power controller (RPC) based on microcomputer technology can implement advanced functions for the accurate and secure detection of all types of faults on a spaceborne electrical distribution system. The intelligent RPC will implement conventional protection functions such as overcurrent, under-voltage, and ground fault protection. Advanced functions for the detection of soft faults, which cannot presently be detected, can also be implemented. Adaptive overcurrent protection changes overcurrent settings based on connected load. Incipient and high-impedance fault detection provides early detection of arcing conditions to prevent fires, and to clear and reconfigure circuits before soft faults progress to a hard-fault condition. Power electronics techniques can be used to implement fault current limiting to prevent voltage dips during hard faults. It is concluded that these techniques will enhance the overall safety and reliability of the distribution system.

Aucoin, B. M.↗