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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 91 records · Page 5

Floating-point function generation routines for 16-bit microcomputers

Several computer subroutines have been developed that interpolate three types of nonanalytic functions: univariate, bivariate, and map. The routines use data in floating-point form. However, because they are written for use on a 16-bit Intel 8086 system with an 8087 mathematical coprocessor, they execute as fast as routines using data in scaled integer form. Although all of the routines are written in assembly language, they have been implemented in a modular fashion so as to facilitate their use with high-level languages.

Mackin, M. A.↗

New results in fault latency modelling

The test design and results from assessment of the performance of the self-test program and the extent of fault latency in a redundant flight control system (FCS) are reported. Assembly language programming generated gate-level faults directed to every avionics component. Details of the fault-simulation software are described, noting the input needed to match the five control-surface parameters managed by the FCS. Most faults were immediately detected, and component-level faults, occurring at pins, were more easily noted than gate-level faults. The results indicated that a 200-word self-test program is sufficient to obtain a fault coverage of 85 percent. Minor hardware changes are required to reach levels over 90 percent.

Mcgough, J. G.↗

A survey of the state of the art and focused research in range systems, task 2

Many communication, control, and information processing subsystems are modeled by linear systems incorporating tapped delay lines (TDL). Such optimized subsystems result in full precision multiplications in the TDL. In order to reduce complexity and cost in a microprocessor implementation, these multiplications can be replaced by single-shift instructions which are equivalent to powers of two multiplications. Since, in general, the obvious operation of rounding the infinite precision TDL coefficients to the nearest powers of two usually yield quite poor system performance, the optimum powers of two coefficient solution was considered. Detailed explanations on the use of branch-and-bound algorithms for finding the optimum powers of two solutions are given. Specific demonstration of this methodology to the design of a linear data equalizer and its implementation in assembly language on a 8080 microprocessor with a 12 bit A/D converter are reported. This simple microprocessor implementation with optimized TDL coefficients achieves a system performance comparable to the optimum linear equalization with full precision multiplications for an input data rate of 300 baud. The philosophy demonstrated in this implementation is dully applicable to many other microprocessor controlled information processing systems.

Yao, K.↗

A 3-component laser-Doppler velocimeter data acquisition and reduction system

A laser doppler velocimeter capable of measuring all three components of velocity simultaneously in low-speed flows is described. All the mean velocities, Reynolds stresses, and higher-order products can be evaluated. The approach followed is to split one of the two colors used in a 2-D system, thus creating a third set of beams which is then focused in the flow from an off-axis direction. The third velocity component is computed from the known geometry of the system. The laser optical hardware and the data acquisition electronics are described in detail. In addition, full operating procedures and listings of the software (written in BASIC and ASSEMBLY languages) are also included. Some typical measurements obtained with this system in a vortex/mixing layer interaction are presented and compared directly to those obtained with a cross-wire system.

Rodman, L. C.↗

A 3-component laser-Doppler velocimeter data acquisition and reduction system

This report describes a laser Doppler velocimeter capable of measuring all three components of velocity simultaneously in low-speed flows. All the mean velocities, Reynolds stresses, and higher-order products can then be evaluated. The approach followed is to split one of the colors used in a 2-D system, thus creating a third set of beams which is then focused in the flow from an off-axis direction. The third velocity component is computed from the known geometry of the system. In this report, the laser optical hardware and the data acquisition electronics are described in detail. In addition, full operating procedures and listings of the software (written in BASIC and assembly languages) are also included. Some typical measurements obtained with this system in a vortex/mixing layer interaction are presented and compared directly to those obtained with a cross-wire system.

Rodman, L. C.↗

Image processing on the IBM personal computer

An experimental, personal computer image processing system has been developed which provides a variety of processing functions in an environment that connects programs by means of a 'menu' for both casual and experienced users. The system is implemented by a compiled BASIC program that is coupled to assembly language subroutines. Image processing functions encompass subimage extraction, image coloring, area classification, histogramming, contrast enhancement, filtering, and pixel extraction.

Myers, H. J.↗

Massively parallel processor

A brief description is given of the Massively Parallel Processor (MPP). Major applications of the MPP are in the area of image processing (where the operands are often very small integers) from very high spatial resolution passive image sensors, signal processing of radar data, and numerical modeling simulations of climate. The system can be programmed in assembly language or a high level language. Information on background, status, architecture, programming, hardware reliability, applications, and the MPP's development as a national resource for parallel algorithm research are presented in outline form.

Source record↗

Event time recorder

Accurate timing of sounding rocket payload events is critical for successful missions. The payload event timers used must be checked numerous times to verify proper settings. A cost-effective time event recorder was developed which will store up to 32 time events and provide a hard copy printout. The event recorder consists of an AIM 65 microcomputer with a custom hardware interface and assembly language software. The 32 input lines can be triggered by voltage changes or current sensing.

Stuchlik, D. W.↗

Unified Robot-Control System

Robot-joint motors integrated with control computer or computers. Robot controller uses only 1 microprocessor to control as many as 16 joint-actuating motors. Control system uses high-speed bus to communicate with joint-interface circuits, addressing scheme to write commands to several motors simultaneously, and efficient assembly-language servo code. Features enable control of 16 joints at 1-kHz servo rate. Suitable for control of motors in numerically-controlled manufacturing systems. Use of single joint-control processor results in few components, lower cost, and simpler architecture.

Szakaly, Zoltan F.↗

System Decommutes And Displays Telemetry Data

TDPlus computer program software system for decommutation of pulse-code-modulation (PCM) telemetry signals. Provides synchronization, conversion into engineering units, and display of serial bit streams. Transforms IBM PC-compatible computer into PCM-telemetry-decommutation system. Synchronizes telemetric signals data and enables conversion back into such meaningful forms as voltage, current, pressure, and the like. Also controls operation of digital-to-analog converters to ship data to paper strip charts or to parallel digital ports for offloading to other computers. Software used to process actual data only when telemetry-data-processing computer modified in accordance with specifications contained in "TDPlus TM Data Processor" (GSC-13291). Written in Turbo C and 8088 Assembly language.

Massey, D. E.↗

Development of SEDS data system flight software

The Small Expendable-tether Deployer System (SEDS) is being built for a 1991 flight on a Delta launch vehicle. SEDS will deploy a 50 lb instrument satellite as an end mass at the end of a 20 km tether. The objective of the experiment is to test the SEDS design concept by demonstrating that the system will satisfactorily deploy the full 20 km tether without stopping prematurely, come to a smooth stop on application of the brake, and cut the tether at the proper time after it swings to the vertical. SEDS will also collect data that will be used to test the accuracy of tether dynamics models for this type of deployment. Radar tracking is planned. In addition, the SEDS on-board computer system will record, store, and continuously transmit data over the Delta II S-band telemetry channel. Initial testing of the software under simulated flight conditions was performed. These tests used both assembly language routines running on SEDS data systems and C-language routines on an IBM-PC. As the software now stands relatively few additions are needed before the entire set of flight software is complete.

Pierson, William E.↗

Efficient Two-Dimensional-FFT Program

Program computes 64 X 64-point fast Fourier transform in less than 17 microseconds. Optimized 64 X 64 Point Two-Dimensional Fast Fourier Transform combines performance of real- and complex-valued one-dimensional fast Fourier transforms (FFT's) to execute two-dimensional FFT and coefficients of power spectrum. Coefficients used in many applications, including analyzing spectra, convolution, digital filtering, processing images, and compressing data. Source code written in C, 8086 Assembly, and Texas Instruments TMS320C30 Assembly languages.

Miko, J.↗

Stable isotope analysis using tunable diode laser spectroscopy

Ratios of C-12/C-13 in CO2 have been measured using a tunable diode laser (TDL) spectrometer to an accuracy of better than 0.4 percent. These results were made possible by the use of state-of-the-art high-temperature TDLs, an etalon and wavenumber calibration technique, high-speed assembly language controlled data acquisition, and the ratioing of absorbances from simultaneously acquired sample and reference data scans. The dual beam spectrometer that is employed uses the sweep integration technique in a spectral region where adjacent spectral lines are of approximately equal absorbance at the expected isotopic abundances.

Becker, Joseph F.↗

Program For Workload And Performance Experiments

Multi-Attribute Task (MAT) battery of computer programs gives researcher capability of performing experiments in multitask workloads and performances. Provides benchmark set of tasks for use in wide range of laboratory studies of operator performance and workload. Incorporates tasks analogous to activities aircraft crewmembers perform in flight, while providing high degree of experiment control, performance data on each subtask, and freedom to use nonpilot test subjects. Designed to use serially linked second computer to generate voice messages for communication task. Also used independently of voice computer if no computer-synthesized voice messages desired or if some other method of presenting auditory messages devised. Written in QuickBasic and Assembly language for IBM PC(R) series.

Comstock, J. Raymond, Jr.↗

Address tracing of parallel systems via TRAPEDS

Trace-driven simulation is an important aid in performance analysis of computer systems. Capturing address traces to use in these simulations, however, is a difficult problem for parallel processor architectures. A technique termed TRAPEDS modifies executable code (at the assembly language level) to dynamically collect the address trace from executing code. TRAPEDS has recently been implemented on both a hypercube multicomputer and a shared-memory multiprocessor. Particular attention is focused on strategies for efficiently and accurately collecting traces from both classes of parallel machines. The iPSC/2 hypercube multicomputer implementation traces both user and system code, and performs simulation on-the-fly to avoid large storage costs. Strategies are detailed for mitigating address trace distortion when collecting operating system traces. The Encore Multimax multiprocessor implementation uses a timer-based approach to reflect the interleaving of the processor traces and stores the traces to disc. Time and space overhead results are presented for both TRAPEDS implementations. Experimental cache simulation results derived from iPSC/2 address traces are presented to illustrate the importance of tracing operating system references.

Stunkel, Craig B.↗

FORTH direct execution processors in the Hopkins ultraviolet telescope

Engineers at the Johns Hopkins University Applied Physics Laboratory have designed and built two computers which will control and monitor the Hopkins Ultraviolet Telescope, a 1986 Space Shuttle experiment. These computers implement a microcoded FORTH nucleus in a word-addressed AMD 2900 series bit-slice architecture. All programs for them are written in FORTH, which takes the place of assembly language in this architecture.

Ballard, Ben↗

Myths and realities: Defining re-engineering for a large organization

This paper describes the background and results of three studies concerning software reverse engineering, re-engineering, and reuse (R3) hosted by the Internal Revenue Service in 1991 and 1992. The situation at the Internal Revenue--aging, piecemeal computer systems and outdated technology maintained by a large staff--is familiar to many institutions, especially among management information systems. The IRS is distinctive for the sheer magnitude and diversity of its problems; the country's tax records are processed using assembly language and COBOL and spread across tape and network DBMS files. How do we proceed with replacing legacy systems? The three software re-engineering studies looked at methods, CASE tool support, and performed a prototype project using re-engineering methods and tools. During the course of these projects, we discovered critical issues broader than the mechanical definitions of methods and tool technology.

Yin, Sandra↗

The VLBA correlator: Real-time in the distributed era

The correlator is the signal processing engine of the Very Long Baseline Array (VLBA). Radio signals are recorded on special wideband (128 Mb/s) digital recorders at the 10 telescopes, with sampling times controlled by hydrogen maser clocks. The magnetic tapes are shipped to the Array Operations Center in Socorro, New Mexico, where they are played back simultaneously into the correlator. Real-time software and firmware controls the playback drives to achieve synchronization, compute models of the wavefront delay, control the numerous modules of the correlator, and record FITS files of the fringe visibilities at the back-end of the correlator. In addition to the more than 3000 custom VLSI chips which handle the massive data flow of the signal processing, the correlator contains a total of more than 100 programmable computers, 8-, 16- and 32-bit CPUs. Code is downloaded into front-end CPU's dependent on operating mode. Low-level code is assembly language, high-level code is C running under a RT OS. We use VxWorks on Motorola MVME147 CPU's. Code development is on a complex of SPARC workstations connected to the RT CPU's by Ethernet. The overall management of the correlation process is dependent on a database management system. We use Ingres running on a Sparcstation-2. We transfer logging information from the database of the VLBA Monitor and Control System to our database using Ingres/NET. Job scripts are computed and are transferred to the real-time computers using NFS, and correlation job execution logs and status flow back by the route. Operator status and control displays use windows on workstations, interfaced to the real-time processes by network protocols. The extensive network protocol support provided by VxWorks is invaluable. The VLBA Correlator's dependence on network protocols is an example of the radical transformation of the real-time world over the past five years. Real-time is becoming more like conventional computing. Paradoxically, 'conventional' computing is also adopting practices from the real-time world: semaphores, shared memory, light-weight threads, and concurrency. This appears to be a convergence of thinking.

Wells, D. C.↗