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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 91 records · Page 5
All sourcesNASA NTRSDOE OSTI
DOE OSTI2022

Progress in three-terminal heterojunction bipolar transistor solar cells

Conventional solar cells, including multijunction solar cells, are based on pn junctions as building blocks. In contrast, the three-terminal heterojunction bipolar transistor solar cell (3T-HBTSC) explores the use of a bipolar transistor structure to build a solar cell. The limiting efficiency of this transistor structure equals that of a double-junction solar cell. However, since the 3T-HBTSC does not require tunnel junctions, its minimal structure has only three semiconductor layers, while the minimal structure of a double junction solar cell has six. This work reviews the operation principles of this solar cell and the steps carried out towards its practical implementation. Experimental results on a GaInP/GaAs HBTSC prototype with bottom interdigitated contacts are presented.

14 SOLAR ENERGY↗
DOE OSTI2024

Investigation of Interlayer Dielectric in BaTiO 3 /III–Nitride Transistors

In this paper, the impact of varying the thickness of the Al 2 O 3 interlayer dielectric on the electrical characteristics of BaTiO 3 /III-nitride transistors is investigated. In the findings, it is revealed that a minimum thickness of 8 nm for the Al 2 O 3 layer is crucial to maintain high device performance and protect against sputtering-induced damage during BaTiO 3 deposition. The fabricated BaTiO 3 /Al 2 O 3 /AlGaN/GaN high electron mobility transistors exhibit exceptional electrical properties, including a maximum current density of 700 mA mm –1 , an on-resistance of 5 Ω mm, an I ON /I OFF ratio of 10 7 , a subthreshold slope of 119 mV dec –1 , and significantly reduced gate leakage current. The devices with the optimal 8 nm Al 2 O 3 thickness demonstrates excellent agreement between theoretical and experimental values for effective mobility, achieving a value of 1188 cm 2 V –1 ·s at a 2D electron gas density of 10 13 cm –2 . Furthermore, in the study, it is confirmed that increasing the Al 2 O 3 thickness also improves the quality of interface charge density, as evidenced by the results obtained from capacitance–voltage measurements. In these findings, the critical role of controlling the Al 2 O 3 thickness in optimizing the electrical characteristics and overall performance of BaTiO 3 /III-nitride transistors are highlighted.

42 ENGINEERING↗
DOE OSTI2024

Atomically Precise Graphene Nanoribbon Transistors with Long-Term Stability and Reliability

Atomically precise graphene nanoribbons (GNRs) synthesized from the bottom-up exhibit promising electronic properties for high-performance field-effect transistors (FETs). The feasibility of fabricating FETs with GNRs (GNRFETs) has been demonstrated, with ongoing efforts aimed at further improving their performance. However, their long-term stability and reliability remain unexplored, which is as important as their performance for practical applications. In this work, we fabricated short-channel FETs with nine-atom-wide armchair GNRs (9-AGNRFETs). We revealed that the on-state (/ ON ) current performance of the 9-AGNRFETs deteriorates significantly over consecutive full transistor on and off logic cycles, which has neither been demonstrated nor previously considered. To address this issue, we deposited a thin ~10 nm thick atomic layer deposition (ALD) layer of aluminum oxide (Al 2 O 3 ) directly on these devices. The integrity, compatibility, electrical performance, stability, and reliability, of the GNRFETs before and/or after Al 2 O 3 deposition were comprehensively studied. The results indicate that the observed decline in electrical device performance is most likely due to the degradation of contact resistance over multiple measurement cycles. We successfully demonstrated that the devices with the Al 2 O 3 layer operate well up to several thousand continuous full cycles without any degradation. Our study offers valuable insights into the stability and reliability of GNR transistors, which could facilitate their large-scale integration into practical applications.

36 MATERIALS SCIENCE↗
DOE OSTI2024

Al-rich AlGaN high electron mobility transistor gate metallization study up to 600 °C in air

Here we report a comparative study of three rectifying gate metals, W, Pd, and Pt/Au, on ultrawide bandgap Al 0.86 Ga 0.14 N barrier/Al 0.7 Ga 0.3 N channel high electron mobility transistors for use in extreme temperatures. The transistors were electrically characterized from 30 to 600 °C in air. Of the three gate metals, the Pt/Au stack exhibited the smallest change in threshold voltage (0.15 V, or 9% change between the 30 and 600 °C values, and a maximum change of 42%), the highest on/off current ratio (1.5 × 10 6 ) at 600 °C, and a modest forward gate leakage current (0.39 mA/mm for a 3,V gate bias) at 600 °C. These favorable results showcase AlGaN channel high electron mobility transistors' ability to operate in extreme temperature environments.

36 MATERIALS SCIENCE↗
DOE OSTI2017

Degradation of the parameters of transistor temperature sensors under the effect of ionizing radiation

The influence of the effective concentration of an impurity specifying the conduction type of the base region and the base thickness on the radiation resistance of transistor temperature sensors is investigated. The dependences of the forward voltage drop at the emitter transistor junction and current amplification factor on the magnitude of electron, neutron, and γ-quanta flows are revealed. It is found that degradation of the forward voltage drop under the effect of ionizing radiation begins at doses higher by almost two orders of magnitude than the current amplification factor depending on the transistor’s design features. The reproducibility of the temperature-sensitive parameter, which increases the yield percentage of suitable devices, increases after annealing of the electron-irradiated structures.

36 MATERIALS SCIENCE↗
DOE OSTI2017

Degradation of the characteristics of GaAs bipolar transistors with a thin base due to the formation in them of nanometer-sized clusters of radiation-induced defects as a result of irradiation with neutrons

Calculation is performed for a flux of charge carriers in the structure of a GaAs bipolar transistor with a thin base in the case where a single cluster of radiation-induced defects is formed in the operating region of a transistor. It is shown that the site of the appearance of a cluster of radiation-induced defects greatly affects the degree of degradation of the gain of a bipolar transistor. The probabilistic assessment of radiation-induced puncture of the base in relation to its thickness and to the neutron fluence is obtained.

36 MATERIALS SCIENCE↗
DOE OSTI2018

Wafer-Scale Fabrication of High-Performance n-Type Polymer Monolayer Transistors Using a Multi-Level Self-Assembly Strategy

Wafer–scale fabrication of high–performance uniform organic electronic materials is of great challenge and has rarely been realized before. Previous large–scale fabrication methods always lead to different layer thickness and thereby poor film and device uniformity. Herein, the first demonstration of 4 in. wafer–scale, uniform, and high–performance n–type polymer monolayer films is reported, enabled by controlling the multi–level self–assembly process of conjugated polymers in solution. Since the self–assembly process happened in solution, the uniform 2D polymer monolayers can be facilely deposited on various substrates, and theoretically without size limitations. Polymer monolayer transistors exhibit high electron mobilities of up to 1.88 cm 2 V –1 s –1 , which is among the highest in n–type monolayer organic transistors. This method allows to easily fabricate n–type conjugated polymers with wafer–scale, high uniformity, low contact resistance, and excellent transistor performance (better than the traditional spin–coating method). Furthermore this work provides an effective strategy to prepare large–scale and uniform 2D polymer monolayers, which could enable the application of conjugated polymers for wafer–scale sophisticated electronics.

2D organic materials↗
DOE OSTI2018

Improved Performance of Zinc Oxide Thin Film Transistor Pressure Sensors and a Demonstration of a Commercial Chip Compatibility with the New Force Sensing Technology

Abstract A zinc oxide thin film transistor is developed and optimized that simultaneously functions as a transistor and a force sensor, thus allowing for scalable integration of sensors into arrays without the need for additional addressing elements. Through systematic material deposition, microscopy, and piezoelectric characterization, it is determined that an O 2 rich deposition condition improves the transistor performance and pressure sensing characteristics. With these optimizations, a sensitivity of 4 nA kPa −1 and a latency of below 1 ms are achieved, exceeding the criteria for successful commercialization of arrayed pressure sensors. The functionality of 16 × 16 pressure sensor arrays on thin bendable glass substrates for integrated low weight and flexible touchscreen displays is fabricated and demonstrated and read‐out electronics to interface with the arrays and to record their response in real‐time are developed. Finally, the application of these sensors for mobile displays via their operation with an existing commercial touch integrated circuit controller is demonstrated.

Vishniakou, Siarhei↗
DOE OSTI2018

Enhanced Charge Transport and Stability Conferred by Iron(III)‐Coordination in a Conjugated Polymer Thin‐Film Transistors

Abstract A high performance diketopyrrolopyrrole (DPP)–based semiconducting polymer is modified with ligands to enable metal coordination, and its subsequent effect as field‐effect transistors is investigated. In specific, pyridine‐2,6‐dicarboxamide (PDCA) units are incorporated in a DPP–based polymer backbone with a content from 0 to 30 mol%, and the resulting polymers are then mixed with Fe(II) ions. The coordination and spontaneous oxidation converts Fe(II) to Fe(III) ions to result in Fe(III)‐containing metallopolymers. The resulting metallopolymers are observed to show good solubility in organic solvents and can be easily processed as thin films. The charge transport characteristics are subsequently investigated through the fabrication of field–effect transistor devices, in which an enhanced charge carrier mobility with the Fe(III)‐containing metallopolymers is observed. In specific, an almost twofold improvement in the charge carrier mobility is obtained for the 20% PDCA‐containing polymer after Fe coordination (from 0.96 to 1.84 cm 2 V −1 s −1 ). Furthermore, the operation stability of the metallopolymer‐based devices is found to be significantly improved with low bias stress. Its superior electrical characteristics are attributed to the doping effect of the Fe ions. This study indicates that incorporation of appropriate metallic ions to polymer presents a viable approach to enhance the performance of polymer–based transistor devices.

Wu, Hung‐Chin↗
DOE OSTI2020

Molybdenum Contacts to MoS 2 Field‐Effect Transistors: Schottky Barrier Extraction, Electrical Transport, and Low‐Frequency Noise

MoS 2 has great interest for nanoscale electronic devices, including transistors and sensors. Defect‐free structure, clean interface with the gate dielectric, and metals with suitable metal–semiconductor junctions are key for reliable devices. Molybdenum is shown as an excellent electrode for MoS 2 field‐effect transistors (FETs), but the correlation among device current, field‐effect mobility, and the low‐frequency noise (LFN) with number of atomic layers is not studied. Furthermore, the impact of Mo/MoS 2 Schottky barrier on electronic injection and scattering in the device needs to be understood. Herein, by studying the FETs with channels of different numbers of atomic‐layer thicknesses, it is shown that a molybdenum metal contact to MoS 2 provides reliable current injection with low Schottky barrier height, low contact resistance, low electron–phonon scattering, and negligible impurity scattering. The mobility and LFN are optimal at a channel thickness of ≈12 atomic layers, which is consistent with the “mobility maximum window” in MoS 2 transistors with prior studies using other contact metals.

Kwon, Jiseok↗
DOE OSTI2020

Ultra‐Steep Slope Impact Ionization Transistors Based on Graphene/InAs Heterostructures

With the continued scaling of transistors, there is a growing trend for developing steep slope transistors with subthreshold swing (SS) below Boltzmann limitation ( k T/ q ). To this end, impact ionization metal oxide semiconductor (I‐MOS) transistors are attractive for a unique combination of high ON‐state current density, small hysteresis, and ultra‐steep SS slope. However, the performance of I‐MOS is generally limited by the relatively thick depletion region and large operation voltage required for the activation of impact ionization (typically >5 V). Herein, a high‐performance I‐MOS is constructed by van der Waals integrating single‐crystal InAs film with graphene. Due to the low bandgap of InAs as well as the semi‐metallic nature of graphene, the InAs/graphene I‐MOS demonstrates a low operation voltage of 1.5 V, high ON‐state current of 230 μA μm −1 , steep SS <0.6 mV dec −1 , and large ON–OFF ratio >10 6 at temperature below 200 K. Furthermore, a negative transconductance and steep current oscillation is observed in the subthreshold regime, and a device working mechanism is proposed for this novel phenomenon. This study not only pushes the performance limit of I‐MOS but also defines a general pathway to van der Waals heterostructures between conventional III–V compound semiconductors and novel 2D materials for unconventional device functions.

Liu, Yuan↗
DOE OSTI2026

Enhancing mobility and interface state engineering via UV-ozone treatment in BEOL-compatible ultrathin TiO 2 transistors

It has emerged as a potential candidate to improve the performance of monolithic-three-dimensional (M3D) integration of fused logic and memories through low-temperature in situ synthesis of high-performance metal–oxide–semiconductor (MOS) transistors. Here, we report the demonstration of the BEOL-compatible low thermal budget (350 °C) fabrication process of ultrathin-TiO2 transistors by the combination of RTA and UV-ozone treatment (RTA-UVOz). UV–ozone (UVOz) treatment of TiO2 anatase films significantly enhances stability, boosting ION current and field effect mobility (μ FE ) by two times of magnitude in TiO2 TFTs. UV ozone treatment helps to eliminate pre-existing oxygen vacancies and carbon contamination on TiO2 channels even at low temperature (100 °C), resulting in high-quality channel/dielectric interfaces with low interface states (D it ). During UVOz treatment, oxygen species (O x ) passivate the oxygen vacancies ($V$$^{2+}_{o}$), and hence low concentration of $V$$^{2+}_{o}$ would be left for ionization/de-ionization under PBS/NBS, leading to improved bias stress stability. Furthermore, the TiO 2 TFTs with thin ZrO 2 gate dielectric exhibited excellent performance including a lower subthreshold swing (SS) of 98 mV/dec with high drive I ON current ∼ 4.5 μA/μm, a high I ON /I OFF > 10 9 , and mobility μFE of 7 cm 2 /V-s under a battery powered voltage of 1 V. UV–ozone treatment enables high-performance, CMOS-compatible TiO 2 transistors with a low thermal budget, ideal for next-generation flexible, energy-efficient electronics.

BEOL↗
DOE OSTI2025

Thermally Stable Ruthenium Contact for Robust p‑Type Tellurium Transistors

Tellurium (Te) is attractive for p-channel transistors due to its high hole mobility. Despite having a low thermal budget suitable for back-end-of-line (BEOL) monolithic integration, the practical realization of Te transistors is hindered by its thermal stability. In this work, we investigate thermal stability for Te thin films grown via scalable thermal evaporation. Our findings identify ruthenium as a more thermally stable contact for p-type Te transistors, capable of withstanding temperatures up to 250 °C. Ruthenium exhibits significantly lower diffusivity in Te compared to other contact metals commonly used such as nickel and palladium. Using the transfer-length method, we measured a contact resistance of 1.25 kΩ·μm at the ruthenium-tellurium interface. Additionally, the incorporation of high-κ ZrO2 encapsulation not only suppresses the sublimation of the Te channel at elevated temperatures but also serves as the gate dielectric in top-gate devices operating at 1 V, achieving an on/off current ratio of 105.

Rahman, I K M Reaz↗
DOE OSTI2019

The Effect of Ring Expansion in Thienobenzo[ b ]indacenodithiophene Polymers for Organic Field-Effect Transistors

A fused donor, thienobenzo[b]indacenodithiophene (TBIDT), was designed and synthesized using a novel acid-promoted cascade ring closure strategy, and then copolymerized with a benzothiadiazole (BT) monomer. The backbone of TBIDT is an expansion of the well-known indacenodithiophene (IDT) unit and was expected to enhance the charge carrier mobility by improving backbone planarity and facilitating short contacts between polymer chains. However, the optimized field-effect transistors demonstrated an average saturation hole mobility of 0.9 cm 2 V -1 s -1 , lower than the performance of IDT-BT (~1.5 cm 2 V -1 s -1 ). Mobilities extracted from time-resolved microwave conductivity measurements were consistent with the trend in hole mobilities in organic field-effect transistor devices. Scanning tunneling microscopy measurements and computational modeling illustrated that TBIDT-BT exhibits a less ordered microstructure in comparison to IDT-BT. This reveals that a regular side-chain packing density, independent of conformational isomers, is critical to avoid local free volume due to irregular packing, which can host trapping impurities. DFT calculations indicated that TBIDT-BT, despite containing a larger, planar unit, showed less stabilization of planar backbone geometries in comparison to IDT-BT. This is due to the reduced electrostatic stabilizing interactions between the peripheral thiophene of the fused core and the BT unit, resulting in a reduction of the barrier to rotation around the single bond. Finally, these insights provide a greater understanding of the general structure-property relationships required for semiconducting polymer repeat units to ensure optimal backbone planarization, as illustrated with IDT-type units, guiding the design of novel semiconducting polymers with extended fused backbones for high-performance field-effect transistors.

36 MATERIALS SCIENCE↗
DOE OSTI2022

Highly stretchable organic electrochemical transistors with strain-resistant performance

Realizing fully stretchable electronic materials is central to advancing new types of mechanically agile and skin-integrable optoelectronic device technologies. Here we demonstrate a materials design concept combining an organic semiconductor film with a honeycomb porous structure with biaxially prestretched platform that enables high-performance organic electrochemical transistors with a charge transport stability over 30-140% tensional strain, limited only by metal contact fatigue. In this work, the prestretched honeycomb semiconductor channel of donor-acceptor polymer poly(2,5-bis(2-octyldodecyl)-3,6-di(thiophen-2-yl)-2,5-diketo-pyrrolopyrrole-alt-2,5-bis(3-triethyleneglycoloxy-thiophen-2-yl) exhibits high ion uptake and completely stable electrochemical and mechanical properties over 1,500 redox cycles with 10(4) stretching cycles under 30% strain. Invariant electrocardiogram recording cycles and synapse responses under varying strains, along with mechanical finite element analysis, underscore that the present stretchable organic electrochemical transistor design strategy is suitable for diverse applications requiring stable signal output under deformation with low power dissipation and mechanical robustness. Highly stretchable organic electrochemical transistors with stable charge transport under severe tensional strains are demonstrated using a honeycomb semiconducting polymer morphology, thereby enabling controllable signal output for diverse stretchable bioelectronic applications.

36 MATERIALS SCIENCE↗
DOE OSTI2019

Evaporated tellurium thin films for p-type field-effect transistors and circuits

There is an emerging need for semiconductors that can be processed at near ambient temperature with high mobility and device performance. Although multiple n-type options have been identified, the development of their p-type counterparts remains limited. In this paper, we report the realization of tellurium thin films through thermal evaporation at cryogenic temperatures for fabrication of high-performance wafer-scale p-type field-effect transistors. We achieve an effective hole mobility of ~35 cm 2 V –1 s –1 , on/off current ratio of ~10 4 and subthreshold swing of 108 mV dec –1 on an 8-nm-thick film. High-performance tellurium p-type field-effect transistors are fabricated on a wide range of substrates including glass and plastic, further demonstrating the broad applicability of this material. Significantly, three-dimensional circuits are demonstrated by integrating multi-layered transistors on a single chip using sequential lithography, deposition and lift-off processes. Finally, various functional logic gates and circuits are demonstrated.

42 ENGINEERING↗
DOE OSTI2022

Ultrathin ferroic HfO 2 –ZrO 2 superlattice gate stack for advanced transistors

With the scaling of lateral dimensions in advanced transistors, an increased gate capacitance is desirable both to retain the control of the gate electrode over the channel and to reduce the operating voltage. This led to a fundamental change in the gate stack in 2008, the incorporation of high-dielectric-constant HfO 2 , which remains the material of choice to date. Here we report HfO 2 –ZrO 2 superlattice heterostructures as a gate stack, stabilized with mixed ferroelectric–antiferroelectric order, directly integrated onto Si transistors, and scaled down to approximately 20 ångströms, the same gate oxide thickness required for high-performance transistors. The overall equivalent oxide thickness in metal–oxide–semiconductor capacitors is equivalent to an effective SiO 2 thickness of approximately 6.5 ångströms. Such a low effective oxide thickness and the resulting large capacitance cannot be achieved in conventional HfO 2 -based high-dielectric-constant gate stacks without scavenging the interfacial SiO 2 , which has adverse effects on the electron transport and gate leakage current. Accordingly, our gate stacks, which do not require such scavenging, provide substantially lower leakage current and no mobility degradation. This work demonstrates that ultrathin ferroic HfO 2 –ZrO 2 multilayers, stabilized with competing ferroelectric–antiferroelectric order in the two-nanometre-thickness regime, provide a path towards advanced gate oxide stacks in electronic devices beyond conventional HfO 2 -based high-dielectric-constant materials.

36 MATERIALS SCIENCE↗
DOE OSTI2018

Development of a Physical-Topological Model for the Response of a High-Power Vertical DMOS Transistor to the Effect of Pulsed Gamma-Radiation

A method for developing models of semiconductor devices with two-dimensional nonuniform concentration profiles of donors and acceptors in working regions of a semiconductor device structure is for the first time proposed based on a complex of physical-topological modeling of charge carrier transport and process simulation of the forming processes of the device structure. The application of process simulation is due to the need to correctly define the parameters of the semiconductor device structure, which are used as initial data to calculate the electron transport according to the physical-topological model. The parameters of production processes of ion implantation, diffusion, and lithography, which were refined during process simulation, are determined for a high-power metal—oxide—semiconductor (MOS) transistor forming by the double diffusion method in accordance with known electrical characteristics and measured geometrical sizes of the structure. This results in two-dimensional distribution profiles of donors and acceptors in p–n junctions necessary to calculate the transistor breakdown under the effect of pulsed γ radiation. Breakdown processes are modeled with the help of the physical-topological model based on the Poisson and continuity equations as well as expressions for the diffusion and drift current densities in the transistor. Accounting for carriers formed at the instant of γ irradiation is implemented by the introduction of the dependence of the generation coefficient of electron–hole pairs on the radiation-dose power. The results of calculations correlate well with the experimental data, which makes it possible to give a conclusion regarding the adequacy of the proposed complex model.

36 MATERIALS SCIENCE↗