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All sourcesNASA NTRSDOE OSTI
NASA NTRS2007

High Temperature Wireless Communication And Electronics For Harsh Environment Applications

In order for future aerospace propulsion systems to meet the increasing requirements for decreased maintenance, improved capability, and increased safety, the inclusion of intelligence into the propulsion system design and operation becomes necessary. These propulsion systems will have to incorporate technology that will monitor propulsion component conditions, analyze the incoming data, and modify operating parameters to optimize propulsion system operations. This implies the development of sensors, actuators, and electronics, with associated packaging, that will be able to operate under the harsh environments present in an engine. However, given the harsh environments inherent in propulsion systems, the development of engine-compatible electronics and sensors is not straightforward. The ability of a sensor system to operate in a given environment often depends as much on the technologies supporting the sensor element as the element itself. If the supporting technology cannot handle the application, then no matter how good the sensor is itself, the sensor system will fail. An example is high temperature environments where supporting technologies are often not capable of operation in engine conditions. Further, for every sensor going into an engine environment, i.e., for every new piece of hardware that improves the in-situ intelligence of the components, communication wires almost always must follow. The communication wires may be within or between parts, or from the engine to the controller. As more hardware is added, more wires, weight, complexity, and potential for unreliability is also introduced. Thus, wireless communication combined with in-situ processing of data would significantly improve the ability to include sensors into high temperature systems and thus lead toward more intelligent engine systems. NASA Glenn Research Center (GRC) is presently leading the development of electronics, communication systems, and sensors capable of prolonged stable operation in harsh 500C environments. This has included world record operation of SiC-based transistor technology (including packaging) that has demonstrated continuous electrical operation at 500C for over 2000 hours. Based on SiC electronics, development of high temperature wireless communication has been on-going. This work has concentrated on maturing the SiC electronic devices for communication purposes as well as the passive components such as resistors and capacitors needed to enable a high temperature wireless system. The objective is to eliminate wires associated with high temperature sensors which add weight to a vehicle and can be a cause of sensor unreliability. This paper discusses the development of SiC based electronics and wireless communications technology for harsh environment applications such as propulsion health management systems and in Venus missions. A brief overview of the future directions in sensor technology is given including maturing of near-room temperature "Lick and Stick" leak sensor technology for possible implementation in the Crew Launch Vehicle program. Then an overview of high temperature electronics and the development of high temperature communication systems is presented. The maturity of related technologies such as sensor and packaging will also be discussed. It is concluded that a significant component of efforts to improve the intelligence of harsh environment operating systems is the development and implementation of high temperature wireless technology

Hunter, G. W.↗
NASA NTRS2014

Structural Characterization of Lateral-grown 6H-SiC am-plane Seed Crystals by Hot Wall CVD Epitaxy

The performance of commercially available silicon carbide (SiC) power devices is limited due to inherently high density of screw dislocations (SD), which are necessary for maintaining polytype during boule growth and commercially viable growth rates. The NASA Glenn Research Center (GRC) has recently proposed a new bulk growth process based on axial fiber growth (parallel to the c-axis) followed by lateral expansion (perpendicular to the c-axis) for producing multi-faceted m-plane SiC boules that can potentially produce wafers with as few as one SD per wafer. In order to implement this novel growth technique, the lateral homoepitaxial growth expansion of a SiC fiber without introducing a significant number of additional defects is critical. Lateral expansion is being investigated by hot wall chemical vapor deposition (HWCVD) growth of 6H-SiC am-plane seed crystals (0.8mm x 0.5mm x 15mm) designed to replicate axially grown SiC single crystal fibers. The post-growth crystals exhibit hexagonal morphology with approximately 1500 m (1.5 mm) of total lateral expansion. Preliminary analysis by synchrotron white beam x-ray topography (SWBXT) confirms that the growth was homoepitaxial, matching the polytype of the respective underlying region of the seed crystal. Axial and transverse sections from the as grown crystal samples were characterized in detail by a combination of SWBXT, transmission electron microscopy (TEM) and Raman spectroscopy to map defect types and distribution. X-ray diffraction analysis indicates the seed crystal contained stacking disorders and this appears to have been reproduced in the lateral growth sections. Analysis of the relative intensity for folded transverse acoustic (FTA) and optical (FTO) modes on the Raman spectra indicate the existence of stacking faults. Further, the density of stacking faults is higher in the seed than in the grown crystal. Bundles of dislocations are observed propagating from the seed in m-axis lateral directions. Contrast extinction analysis of these dislocation lines reveals they are edge type basal plane dislocations that track the growth direction. Polytype phase transition and stacking faults were observed by high-resolution TEM (HRTEM), in agreement with SWBXT and Raman scattering.

Single Crystal↗
NASA NTRS2006

Silicon Carbide Technology

Silicon carbide based semiconductor electronic devices and circuits are presently being developed for use in high-temperature, high-power, and high-radiation conditions under which conventional semiconductors cannot adequately perform. Silicon carbide's ability to function under such extreme conditions is expected to enable significant improvements to a far-ranging variety of applications and systems. These range from greatly improved high-voltage switching for energy savings in public electric power distribution and electric motor drives to more powerful microwave electronics for radar and communications to sensors and controls for cleaner-burning more fuel-efficient jet aircraft and automobile engines. In the particular area of power devices, theoretical appraisals have indicated that SiC power MOSFET's and diode rectifiers would operate over higher voltage and temperature ranges, have superior switching characteristics, and yet have die sizes nearly 20 times smaller than correspondingly rated silicon-based devices [8]. However, these tremendous theoretical advantages have yet to be widely realized in commercially available SiC devices, primarily owing to the fact that SiC's relatively immature crystal growth and device fabrication technologies are not yet sufficiently developed to the degree required for reliable incorporation into most electronic systems. This chapter briefly surveys the SiC semiconductor electronics technology. In particular, the differences (both good and bad) between SiC electronics technology and the well-known silicon VLSI technology are highlighted. Projected performance benefits of SiC electronics are highlighted for several large-scale applications. Key crystal growth and device-fabrication issues that presently limit the performance and capability of high-temperature and high-power SiC electronics are identified.

Neudeck, Philip G.↗
NASA NTRS1999

Study of Bulk and Elementary Screw Dislocation Assisted Reverse Breakdown in Low-Voltage (< 250 V) 4H-SiC p(sup +)n Junction Diodes--Part II: Dynamic Breakdown Properties: Dynamic Breakdown Properties - Part 2

This paper outlines the dynamic reverse-breakdown characteristics of low-voltage (<250 V) small-area <5 x 10(exp -4) sq cm 4H-SiC p(sup +)n diodes subjected to nonadiabatic breakdown-bias pulsewidths ranging from 0.1 to 20 microseconds. 4H-SiC diodes with and without elementary screw dislocations exhibited positive temperature coefficient of breakdown voltage and high junction failure power densities approximately five times larger than the average failure power density of reliable silicon pn rectifiers. This result indicates that highly reliable low-voltage SiC rectifiers may be attainable despite the presence of elementary screw dislocations. However, the impact of elementary screw dislocations on other more useful 4H-SiC power device structures, such as high-voltage (>1 kV) pn junction and Schottky rectifiers, and bipolar gain devices (thyristors, IGBT's, etc.) remains to be investigated.

Neudeck, Philip G.↗
NASA NTRS2009

Characterization of 6H-SiC JFET Integrated Circuits Over A Broad Temperature Range from -150 C to +500 C

The NASA Glenn Research Center has previously reported prolonged stable operation of simple prototype 6H-SiC JFET integrated circuits (logic gates and amplifier stages) for thousands of hours at +500 C. This paper experimentally investigates the ability of these 6H-SiC JFET devices and integrated circuits to also function at cold temperatures expected to arise in some envisioned applications. Prototype logic gate ICs experimentally demonstrated good functionality down to -125 C without changing circuit input voltages. Cascaded operation of gates at cold temperatures was verified by externally wiring gates together to form a 3-stage ring oscillator. While logic gate output voltages exhibited little change across the broad temperature range from -125 C to +500 C, the change in operating frequency and power consumption of these non-optimized logic gates as a function of temperature was much larger and tracked JFET channel conduction properties.

Neudeck, Philip G.↗
NASA NTRS2014

Dielectric Performance of a High Purity HTCC Alumina at High Temperatures - a Comparison Study with Other Polycrystalline Alumina

A very high purity (99.99+%) high temperature co-fired ceramic (HTCC) alumina has recently become commercially available. The raw material of this HTCC alumina is very different from conventional HTCC alumina, and more importantly there is no glass additive in this alumina material for co-firing processing. Previously, selected HTCC and LTCC (low temperature co-fired ceramic) alumina materials were evaluated at high temperatures as dielectric and compared to a regularly sintered 96% polycrystalline alumina (96% Al2O3), where 96% alumina was used as the benchmark. A prototype packaging system based on regular 96% alumina with Au thickfilm metallization successfully facilitated long term testing of high temperature silicon carbide (SiC) electronic devices for over 10,000 hours at 500 C. In order to evaluate this new high purity HTCC alumina for possible high temperature packaging applications, the dielectric properties of this HTCC alumina substrate were measured and compared with those of 96% alumina and a previously tested LTCC alumina from room temperature to 550 C at frequencies of 120 Hz, 1 KHz, 10 KHz, 100 KHz, and 1 MHz. A parallel-plate capacitive device with dielectric of the HTCC alumina and precious metal electrodes were used for measurements of the dielectric constant and dielectric loss of the co-fired alumina material in the temperature and frequency ranges. The capacitance and AC parallel conductance of the capacitive device were directly measured by an AC impedance meter, and the dielectric constant and parallel AC conductivity of the dielectric were calculated from the capacitance and conductance measurement results. The temperature and frequency dependent dielectric constant, AC conductivity, and dissipation factor of the HTCC alumina substrate are presented and compared to those of 96% alumina and a selected LTCC alumina. Other technical advantages of this new co-fired material for possible high packaging applications are also discussed.

Electronic packaging↗
NASA NTRS2012

Dielectric Performance of High Purity HTCC Alumina at High Temperatures - A Comparison Study with Other Polycrystalline Alumina

A very high purity (99.99+) high temperature co-fired ceramic (HTCC) alumina has recently become commercially available. The raw material of this HTCC alumina is very different from conventional HTCC alumina, and more importantly there is no glass additive in this co-fired material. Previously, selected HTCC and LTCC (low temperature co-fired ceramic) alumina materials were evaluated at high temperatures as dielectric and compared to a regularly sintered 96 polycrystalline alumina (96 Al2O3), where 96 alumina was used as the benchmark. A prototype packaging system based on regular 96 alumina with Au thick-film metallization successfully facilitated long term testing of high temperature silicon carbide (SiC) electronic devices for over 10,000 hours at 500C. In order to evaluate this new HTCC alumina for possible high temperature packaging applications, the dielectric properties of this HTCC alumina substrate were measured and compared with those of 96 alumina and a LTCC alumina from room temperature to 550C at frequencies of 120 Hz, 1 KHz, 10 KHz, 100 KHz, and 1 MHz. A parallel-plate capacitive device with dielectric of the HTCC alumina and precious metal electrodes were used for measurements of the dielectric constant and dielectric loss of the co-fired alumina material in the temperature and frequency ranges. The capacitance and AC parallel conductance of the capacitive device were directly measured by an AC impedance meter, and the dielectric constant and parallel AC conductivity of the dielectric were calculated from the capacitance and conductance measurement results. The temperature and frequency dependent dielectric constant, AC conductivity, and dissipation factor of the HTCC alumina substrate are presented and compared to those of 96 alumina. Other technical advantages of this new co-fired material for possible high packaging applications are also discussed.

High temperature↗
NASA NTRS2001

Homoepitaxial "Web Growth" of SiC to Terminate C-Axis Screw Dislocations and Enlarge Step-Free Surfaces

Homoepitaxial CVD growth of thin lateral cantilevers emanating from the edges of mesa patterns dry-etched into on-axis commercial 4H-SiC substrates prior to growth is reported. Cantilevers on the order of a micrometer thick extending tens of micrometers from the edge of a mesa have been grown. The termination of vertically propagating screw dislocations, including a micropipe, that are overgrown by the cantilevers has been demonstrated, in large part because the crystal structure of the cantilevers is established laterally from the mesa sidewalls. This technique could help reduce performance-degrading dislocations in SiC electrical devices.

Neudeck, Philip G.↗
NASA NTRS1999

Electrical Impact of SiC Structural Crystal Defects on High Electric Field Devices

Commercial epilayers are known to contain a variety of crystallographic imperfections. including micropipes, closed core screw dislocations. low-angle boundaries, basal plane dislocations, heteropolytypic inclusions, and non-ideal surface features like step bunching and pits. This paper reviews the limited present understanding of the operational impact of various crystal defects on SiC electrical devices. Aside from micropipes and triangular inclusions whose densities have been shrinking towards manageably small values in recent years, many of these defects appear to have little adverse operational and/or yield impact on SiC-based sensors, high-frequency RF, and signal conditioning electronics. However high-power switching devices used in power management and distribution circuits have historically (in silicon experience) demanded the highest material quality for prolonged safe operation, and are thus more susceptible to operational reliability problems that arise from electrical property nonuniformities likely to occur at extended crystal defects. A particular emphasis is placed on the impact of closed-core screw dislocations on high-power switching devices, because these difficult to observe defects are present in densities of thousands per cm,in commercial SiC epilayers. and their reduction to acceptable levels seems the most problematic at the present time.

Neudeck, Philip G.↗
NASA NTRS1992

An overview of silicon carbide device technology

Recent progress in the development of silicon carbide (SiC) as a semiconductor is briefly reviewed. This material shows great promise towards providing electronic devices that can operate under the high-temperature, high-radiation, and/or high-power conditions where current semiconductor technologies fail. High quality single crystal wafers have become available, and techniques for growing high quality epilayers have been refined to the point where experimental SiC devices and circuits can be developed. The prototype diodes and transistors that have been produced to date show encouraging characteristics, but by the same token they also exhibit some device-related problems that are not unlike those faced in the early days of silicon technology development. Although these problems will not prevent the implementation of some useful circuits, the performance and operating regime of SiC electronics will be limited until these device-related issues are solved.

Neudeck, Philip G.↗
NASA NTRS1991

Advances in silicon carbide Chemical Vapor Deposition (CVD) for semiconductor device fabrication

Improved SiC chemical vapor deposition films of both 3C and 6H polytypes were grown on vicinal (0001) 6H-SiC wafers cut from single-crystal boules. These films were produced from silane and propane in hydrogen at one atmosphere at a temperature of 1725 K. Among the more important factors which affected the structure and morphology of the grown films were the tilt angle of the substrate, the polarity of the growth surface, and the pregrowth surface treatment of the substrate. With proper pregrowth surface treatment, 6H films were grown on 6H substrates with tilt angles as small as 0.1 degrees. In addition, 3C could be induced to grow within selected regions on a 6H substrate. The polarity of the substrate was a large factor in the incorporation of dopants during epitaxial growth. A new growth model is discussed which explains the control of SiC polytype in epitaxial growth on vicinal (0001) SiC substrates.

Powell, J. Anthony↗
NASA NTRS2005

Static and Turn-on Switching Characteristics of 4H-Silicon Carbide SITs to 200 deg C

Test results are presented for normally-off 4H-SiC Static Induction Transistors (SITs) intended for power switching and are among the first normally-off such devices realized in SiC. At zero gate bias, the gate p-n junction depletion layers extend far enough into the conduction channel to cut off the channel. Application of forward gate bias narrows the depletion regions, opening up the channel to conduction by majority carriers. In the present devices, narrow vertical channels get pinched by depletion regions from opposite sides. Since the material is SiC, the devices are usable at temperatures above 150 C. Static curve and pulse mode switching observations were done at selected temperatures up to 200 C on a device with average static characteristics from a batch of similar devices. Gate and drain currents were limited to about 400 mA and 3.5 A, respectively. The drain voltage was limited to roughly 300 V, which is conservative for this 600 V rated device. At 23 C, 1 kW, or even more, could be pulse mode switched in 65 ns (10 to 90 percent) into a 100 load. But at 200 C, the switching capability is greatly reduced in large part by the excessive gate current required. Severe collapse of the saturated drain-to-source current was observed at 200 C. The relation of this property to channel mobility is reviewed.

Niedra, Janis M.↗
NASA NTRS2016

Experimental Durability Testing of 4H SiC JFET Integrated Circuit Technology at 727 C

We have reported SiC integrated circuits (IC's) with two levels of metal interconnect that have demonstrated prolonged operation for thousands of hours at their intended peak ambient operational temperature of 500 C [1, 2]. However, it is recognized that testing of semiconductor microelectronics at temperatures above their designed operating envelope is vital to qualification. Towards this end, we previously reported operation of a 4H-SiC JFET IC ring oscillator on an initial fast thermal ramp test through 727 C [3]. However, this thermal ramp was not ended until a peak temperature of 880 C (well beyond failure) was attained. Further experiments are necessary to better understand failure mechanisms and upper temperature limit of this extreme-temperature capable 4H-SiC IC technology. Here we report on additional experimental testing of custom-packaged 4H-SiC JFET IC devices at temperatures above 500 C. In one test, the temperature was ramped and then held at 727 C, and the devices were periodically measured until electrical failure was observed. A 4H-SiC JFET on this chip electrically functioned with little change for around 25 hours at 727 C before rapid increases in device resistance caused failure. In a second test, devices from our next generation 4H-SiC JFET ICs were ramped up and then held at 700 C (which is below the maximum deposition temperature of the dielectrics). Three ring oscillators functioned for 8 hours at this temperature before degradation. In a third experiment, an alternative die attach of gold paste and package lid was used, and logic circuit operation was demonstrated for 143.5 hours at 700 C.

JFET↗
NASA NTRS2016

Experimental Durability Testing of 4H SiC JFET Integrated Circuit Technology at 727 Degrees Centigrade

We have reported SiC integrated circuits (ICs) with two levels of metal interconnect that have demonstrated prolonged operation for thousands of hours at their intended peak ambient operational temperature of 500 degrees Centigrade. However, it is recognized that testing of semiconductor microelectronics at temperatures above their designed operating envelope is vital to qualification. Towards this end, we previously reported operation of a 4H-SiC JFET IC ring oscillator on an initial fast thermal ramp test through 727 degrees Centigrade. However, this thermal ramp was not ended until a peak temperature of 880 degrees Centigrade (well beyond failure) was attained. Further experiments are necessary to better understand failure mechanisms and upper temperature limit of this extreme-temperature capable 4H-SiC IC technology.Here we report on additional experimental testing of custom-packaged 4H-SiC JFET IC devices at temperatures above 500 degrees Centigrade. In one test, the temperature was ramped and then held at 727 degrees Centigrade, and the devices were periodically measured until electrical failure was observed. A 4H-SiC JFET on this chip electrically functioned with little change for around 25 hours at 727 degrees Centigrade before rapid increases in device resistance caused failure. In a second test, devices from our next generation 4H-SiC JFET ICs were ramped up and then held at 700 degrees Centigrade (which is below the maximum deposition temperature of the dielectrics). Three ring oscillators functioned for 8 hours at this temperature before degradation. In a third experiment, an alternative die attach of gold paste and package lid was used, and logic circuit operation was demonstrated for 143.5 hours at 700 degrees Centigrade.

Silicon Carbide↗
NASA NTRS2000

Temperature Distribution Within a Defect-Free Silicon Carbide Diode Predicted by a Computational Model

Most solid-state electronic devices diodes, transistors, and integrated circuits are based on silicon. Although this material works well for many applications, its properties limit its ability to function under extreme high-temperature or high-power operating conditions. Silicon carbide (SiC), with its desirable physical properties, could someday replace silicon for these types of applications. A major roadblock to realizing this potential is the quality of SiC material that can currently be produced. Semiconductors require very uniform, high-quality material, and commercially available SiC tends to suffer from defects in the crystalline structure that have largely been eliminated in silicon. In some power circuits, these defects can focus energy into an extremely small area, leading to overheating that can damage the device. In an effort to better understand the way that these defects affect the electrical performance and reliability of an SiC device in a power circuit, the NASA Glenn Research Center at Lewis Field began an in-house three-dimensional computational modeling effort. The goal is to predict the temperature distributions within a SiC diode structure subjected to the various transient overvoltage breakdown stresses that occur in power management circuits. A commercial computational fluid dynamics computer program (FLUENT-Fluent, Inc., Lebanon, New Hampshire) was used to build a model of a defect-free SiC diode and generate a computational mesh. A typical breakdown power density was applied over 0.5 msec in a heated layer at the junction between the p-type SiC and n-type SiC, and the temperature distribution throughout the diode was then calculated. The peak temperature extracted from the computational model agreed well (within 6 percent) with previous first-order calculations of the maximum expected temperature at the end of the breakdown pulse. This level of agreement is excellent for a model of this type and indicates that three-dimensional computational modeling can provide useful predictions for this class of problem. The model is now being extended to include the effects of crystal defects. The model will provide unique insights into how high the temperature rises in the vicinity of the defects in a diode at various power densities and pulse durations. This information also will help researchers in understanding and designing SiC devices for safe and reliable operation in high-power circuits.

Kuczmarski, Maria A.↗
NASA NTRS2014

5.8kV SiC PiN Diode for Switching of High-Efficiency Inductive Pulsed Plasma Thruster Circuits

Inductive Pulsed Plasma Thruster (IPPT) pulse circuits, such as those needed to operate the Pulsed Inductive Thruster (PIT), are required to quickly switch capacitor banks operating at a period of μs while conducting current at levels on the order of at least 10 kA. [1,2] For all iterations of the PIT to date, spark gaps have been used to discharge the capacitor bank through an inductive coil. Recent availability of fast, high‐power solid state switching devices makes it possible to consider the use of semiconductor switches in modern IPPTs. In addition, novel pre‐ionization schemes have led to a reduction in discharge energy per pulse for electric thrusters of this type, relaxing the switching requirements for these thrusters. [3,4] Solid state switches offer the advantage of greater controllability and reliability, as well as decreased drive circuit dimensions and mass relative to spark gap switches. The use of solid state devices such as Integrated Gate Bipolar Transistors (IGBTs), Gate Turn‐off Thyristors (GTOs) and Silicon‐Controlled Rectifiers (SCRs) often involves the use of power diodes. These semiconductor devices may be connected antiparallel to the switch for protection from reverse current, or used to reduce power loss in a circuit by clamping off current ringing. In each case, higher circuit efficiency may be achieved by using a diode that is able to transition, or 'switch,' from the forward conducting state ('on' state) to the reverse blocking state ('off' state) in the shortest amount of time, thereby minimizing current ringing and switching losses. Silicon Carbide (SiC) PiN diodes offer significant advantages to conventional fast‐switching Silicon (Si) diodes for high power and fast switching applications. A wider band gap results in a breakdown voltage 10 times that of Si, so that a SiC device may have a thinner drift region for a given blocking voltage. [5] This leads to smaller, lighter devices for high voltage applications, as well as reduced forward conduction losses, faster reverse recovery time (faster turn‐off), and lower‐magnitude reverse recovery current. In addition, SiC devices have lower leakage current as compared to their Si counterparts, and a high thermal conductivity, potentially allowing the former to operate at higher temperatures with a smaller, lighter heatsink (or no heatsink at all).

Toftul, Alexandra↗
NASA NTRS2015

Packaging Technologies for 500 C SiC Electronics and Sensors: Challenges in Material Science and Technology

This paper presents ceramic substrates and thick-film metallization based packaging technologies in development for 500C silicon carbide (SiC) electronics and sensors. Prototype high temperature ceramic chip-level packages and printed circuit boards (PCBs) based on ceramic substrates of aluminum oxide (Al2O3) and aluminum nitride (AlN) have been designed and fabricated. These ceramic substrate-based chip-level packages with gold (Au) thick-film metallization have been electrically characterized at temperatures up to 550C. The 96 alumina packaging system composed of chip-level packages and PCBs has been successfully tested with high temperature SiC discrete transistor devices at 500C for over 10,000 hours. In addition to tests in a laboratory environment, a SiC junction field-effect-transistor (JFET) with a packaging system composed of a 96 alumina chip-level package and an alumina printed circuit board was tested on low earth orbit for eighteen months via a NASA International Space Station experiment. In addition to packaging systems for electronics, a spark-plug type sensor package based on this high temperature interconnection system for high temperature SiC capacitive pressure sensors was also developed and tested. In order to further significantly improve the performance of packaging system for higher packaging density, higher operation frequency, power rating, and even higher temperatures, some fundamental material challenges must be addressed. This presentation will discuss previous development and some of the challenges in material science (technology) to improve high temperature dielectrics for packaging applications.

dielectric properties↗
NASA NTRS1990

High-temperature electronics

To meet the needs of the aerospace propulsion and space power communities, the high temperature electronics program at the Lewis Research Center is developing silicon carbide (SiC) as a high temperature semiconductor material. This program supports a major element of the Center's mission - to perform basic and developmental research aimed at improving aerospace propulsion systems. Research is focused on developing the crystal growth, characterization, and device fabrication technologies necessary to produce a family of SiC devices.

Matus, Lawrence G.↗