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A description of a working single chip implementation of a Reed-Solomon encoder. The code used is the Consultative Committee on Space Data Systems (CCSDS) standard (255,223) code. The architecture that leads to this single very large scale integration chip design makes use of a bit-serial finite field multiplication algorithm of E. R. Berlekamp.
A new VLSI design of a pipeline Reed-Solomon decoder is presented. The transform decoding technique used in a previous design is replaced by a time domain algorithm. A new architecture that implements such an algorithm permits efficient pipeline processing with minimum circuitry. A systolic array is also developed to perform erasure corrections in the new design. A modified form of Euclid's algorithm is implemented by a new architecture that maintains the throughput rate with less circuitry. Such improvements result in both enhanced capability and a significant reduction in silicon area, therefore making it possible to build a pipeline (31,15)RS decoder on a single VLSI chip.
A single-chip implementation of a Reed-Solomon encoder with interleaving capability is described. The code used was adapted by the CCSDS (Consulative Committee on Space Data Systems). It forms the outer code of the NASA standard concatenated coding system which includes a convolutional inner code of rate 1/2 and constraint length 7. The architecture, leading to this single VLSI chip design, makes use of a bit-serial finite field multiplication algorithm due to E.R. Berlekamp.
It is well known that the Euclidean algorithm or its equivalent, continued fractions, can be used to find the error locator polynomial and the error evaluator polynomial in Berlekamp's key equation needed to decode a Reed-Solomon (RS) code. A simplified procedure is developed and proved to correct erasures as well as errors by replacing the initial condition of the Euclidean algorithm by the erasure locator polynomial and the Forney syndrome polynomial. By this means, the errata locator polynomial and the errata evaluator polynomial can be obtained, simultaneously and simply, by the Euclidean algorithm only. With this improved technique the complexity of time domain RS decoders for correcting both errors and erasures is reduced substantially from previous approaches. As a consequence, decoders for correcting both errors and erasures of RS codes can be made more modular, regular, simple, and naturally suitable for both VLSI and software implementation. An example illustrating this modified decoding procedure is given for a (15, 9) RS code.
A new very large scale integration (VLSI) design of a pipeline Reed-Solomon decoder is presented. The transform decoding technique used in a previous article is replaced by a time domain algorithm through a detailed comparison of their VLSI implementations. A new architecture that implements the time domain algorithm permits efficient pipeline processing with reduced circuitry. Erasure correction capability is also incorporated with little additional complexity. By using a multiplexing technique, a new implementation of Euclid's algorithm maintains the throughput rate with less circuitry. Such improvements result in both enhanced capability and significant reduction in silicon area.
A new very large scale integration (VLSI) design of a pipeline Reed-Solomon decoder is presented. The transform decoding technique used in a previous article is replaced by a time domain algorithm through a detailed comparison of their VLSI implementations. A new architecture that implements the time domain algorithm permits efficient pipeline processing with reduced circuitry. Erasure correction capability is also incorporated with little additional complexity. By using multiplexing technique, a new implementation of Euclid's algorithm maintains the throughput rate with less circuitry. Such improvements result in both enhanced capability and significant reduction in silicon area.
Size, weight, and susceptibility to burst errors reduced. Encoding system built on single very-large-scale integrated (VLSI) circuit chip produces (255,223) Reed-Solomon (RS) code with programmable interleaving up to depth of 5. (225,223) RS encoder includes new remainder-and-interleaver unit providing programmable interleaving of code words. Remainder-and-interleaver unit contains shift registers and modulo-2 adders. Signals on "turn" and "no-turn" lines control depth of interleaving. Based on E. R. Berlekamp's bit-serial multiplication algorithm for (225,223) RS encoder over Galois Field (2 to the 8th power).
Modification of decoding algorithms leads to simplified conceptual designs for time- and transform-domain Reed-Soloman (RS) decoders suitable for implementation as very-large-scale integrated (VLSI) circuits. New conceptual decoders determine simultaneously errata-locator and errata-evaluator polynomials as part of simplified scheme for corrections of errors and erasures in RS codes. Highly suitable for implementation in both VLSI circuitry and in software on general-purpose computer.
A Reed-Solomon (RS) code is considered to be a special case of a redundant residue polynomial (RRP) code, and a fast transform decoding algorithm to correct both errors and erasures is presented. This decoding scheme is an improvement of the decoding algorithm for the RRP code suggested by Shiozaki and Nishida, and can be realized readily on very large scale integration chips.
Remote-sensing methods are of great value in assessing the stratigraphy and geologic structure of inaccessible terrains, especially where lithologic contrasts are marked. In this report, we show that such techniques can be successfully applied to a massive carbonate unit, the Reed Dolomite, exposed in the Wacuoba Mountain, Blanco Mountain, and Mount Barcroft quadrangles of east-central California.
Abstract To effectively use local available grass resources to cover the winter feed shortage on the Qinghai‐Tibetan Plateau, direct‐cut and wilted reed canary grass (RCG) silages were prepared by using a rolled‐bale system, and their ensiling characteristics and in vitro digestibility were studied. Silages were treated without (control) or with inoculants including LP ( Lactobacillus plantarum ), LPLB ( L. plantarum , L. buchneri ), and LPLBc ( L. plantarum , L. buchneri , and cellulase), and were stored at ambient temperature (5.7–14.6°C) for 90 days. Compared with control, the inoculated silages increased ( p < .05) lactic acid and acetic acid contents, and reduced ( p < .05) final pH value and ammonia‐N ratio of total N. The highest WSC content (41.2 g/kg DM) occurred for LPLB‐inoculated silage, whereas LPLBc‐treated silage displayed the lowest contents of NDF (522.9 g/kg DM) and ADF (275.5 g/kg DM). In addition, LPLBc‐inoculated silage had the highest in vitro gas production (51.0 ml/g DM), in vitro DM digestibility (619.3 g/kg DM), and metabolic energy (9.6 kJ/kg DM). These results confirmed that treatments with inoculants at ensiling could improve silage fermentation and in vitro digestibility of RCG, and this could be a potential winter feed for animals on the Qinghai‐Tibetan Plateau.
R2X is a tool that allows modeler to convert input/output models to other input/out models (e.g., ReEDS™ to Plexos). This is tools is built as a parser of inputs that uses infrasys to create a network representation that then is used to create custom files as input for other models.
The Regional Energy Deployment System (ReEDS) model is a capacity expansion and dispatch model that is primarily used for the contiguous U.S. electric power sector. The model relies on system-wide least cost optimization to estimate the type and location of future generation and transmission capacity. This document describes details of how the model is formulated, how it functions, and many of the key inputs.
The Regional Energy Deployment System (ReEDS) model is a capacity expansion and dispatch model that is primarily used for the contiguous U.S. electric power sector. The model relies on system-wide least cost optimization to estimate the type and location of future generation and transmission capacity. This document describes details of how the model is formulated, how it functions, and many of the key inputs.
Capacity expansion modeling tools are increasingly being utilized to investigate a wide range of potential future scenarios, particularly with high penetrations of variable and energy-constrained resources that may be operated differently than current dispatch paradigms. While capacity expansion models are particularly adept at making investment decisions for future years, they must make compromises in operational aspects to maintain computational tractability. However, it is of high interest to determine if such future systems would be able to maintain reliability during a variety of grid conditions, and to identify any potential operational challenges for these systems at finer temporal resolution than is typically captured in CEMs. As such, there is value in having an automated tool that can convert many CEM investment pathways into inputs for a more detailed production cost model, in this case the PLEXOS commercial software package. This paper describes the methodology used to make that translation for the NREL-developed ReEDS model, making use of two internally developed tools - PIDG and beetle - along with a set of processing scripts. We describe the current assumptions, data sets, and important operational characteristics of these translations along with an example of the extended analyses that may be done through this connection.
Encoding algorithms generate a 32 x 64-bit matrix Reed-Muller code from a 6-bit orthogonal code-word. This increases error-free reception by a high rate telemetry channel under adverse signal noise with minimal use of additional hardware.
Weights in third-order Reed-Muller codes applied to space communication
Explicit formulas for Euclidean geometry and Berlekamp subcodes weight enumerators for second order binary Reed-Muller codes