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At least 91 records · Page 5

Enhanced fatigue and retention in ferroelectric thin film memory capacitors by post-top electrode anneal treatment

Thin film ferroelectric capacitors (10) comprising a ferroelectric film (18) sandwiched between electrodes (16 and 20) for nonvolatile memory operations are rendered more stable by subjecting the capacitors to an anneal following deposition of the top electrode (20). The anneal is done so as to form the interface (22) between the ferroelectric film and the top electrode. Heating in an air oven, laser annealing, or electron bombardment may be used to form the interface. Heating in an air oven is done at a temperature at least equal to the crystallization temperature of the ferroelectric film. Where the ferroelectric film comprises lead zirconate titanate, annealing is done at about 550.degree. to 600.degree. C. for about 10 to 15 minutes. The formation treatment reduces the magnitude of charge associated with the non-switching pulse in the thin film ferroelectric capacitors. Reduction of this charge leads to significantly more stable nonvolatile memory operations in both digital and analog memory devices. The formation treatment also reduces the ratio of change of the charge associated with the non-switching pulse as a function of retention time. These improved memory devices exhibit greater performance in retention and reduced fatigue in memory arrays.

Thakoor, Sarita↗

Ferroelectric Memory Capacitors For Neural Networks

Thin-film ferroelectric capacitors proposed as nonvolatile analog memory devices. Intended primarily for use as synaptic connections in electronic neural networks. Connection strengths (synaptic weights) stored as nonlinear remanent polarizations of ferroelectric films. Ferroelectric memory and interrogation capacitors combined into memory devices in vertical or lateral configurations. Photoconductive layer modulated by light provides variable resistance to alter bias signal applied to memory capacitor. Features include nondestructive readout, simplicity, and resistance to ionizing radiation. Interrogated without destroying stored analog data. Also amenable to very-large-scale integration. Allows use of ac coupling, eliminating errors caused by dc offsets in amplifier circuits of neural networks.

Thakoor, Sarita↗

Fast Initialization of Bubble-Memory Systems

Improved scheme several orders of magnitude faster than normal initialization scheme. State-of-the-art commercial bubble-memory device used. Hardware interface designed connects controlling microprocessor to bubblememory circuitry. System software written to exercise various functions of bubble-memory system in comparison made between normal and fast techniques. Future implementations of approach utilize E2PROM (electrically-erasable programable read-only memory) to provide greater system flexibility. Fastinitialization technique applicable to all bubble-memory devices.

Looney, K. T.↗

Two-terminal electronic charge resistance switching device

A two-terminal memory device and methods for its use are provided. In the device, a bottom electrode is electrically continuous with a first operating terminal, and a control gate electrode is electrically continuous with a second operating terminal. A stack of insulator layers comprising a hopping conduction layer and a tunnel layer is contactingly interposed between the bottom electrode and the control gate electrode. The tunnel layer is thinner than the hopping conduction layer, and it has a wider bandgap than the hopping conduction layer. The hopping conduction layer consists of a material that supports electron hopping transport.

Marinella, Matthew↗

Development of Next Generation Memory Test Experiment for Deployment on a Small Satellite

The original Memory Test Experiment successfully flew on the FASTSAT satellite launched in November 2010. It contained a single Ramtron 512K ferroelectric memory. The memory device went through many thousands of read/write cycles and recorded any errors that were encountered. The original mission length was schedule to last 6 months but was extended to 18 months. New opportunities exist to launch a similar satellite and considerations for a new memory test experiment should be examined. The original experiment had to be designed and integrated in less than two months, so the experiment was a simple design using readily available parts. The follow-on experiment needs to be more sophisticated and encompass more technologies. This paper lays out the considerations for the design and development of this follow-on flight memory experiment. It also details the results from the original Memory Test Experiment that flew on board FASTSAT. Some of the design considerations for the new experiment include the number and type of memory devices to be used, the kinds of tests that will be performed, other data needed to analyze the results, and best use of limited resources on a small satellite. The memory technologies that are considered are FRAM, FLASH, SONOS, Resistive Memory, Phase Change Memory, Nano-wire Memory, Magneto-resistive Memory, Standard DRAM, and Standard SRAM. The kinds of tests that could be performed are read/write operations, non-volatile memory retention, write cycle endurance, power measurements, and testing Error Detection and Correction schemes. Other data that may help analyze the results are GPS location of recorded errors, time stamp of all data recorded, radiation measurements, temperature, and other activities being perform by the satellite. The resources of power, volume, mass, temperature, processing power, and telemetry bandwidth are extremely limited on a small satellite. Design considerations must be made to allow the experiment to not interfere with the satellite s primary mission.

MacLeod, Todd↗

Autonomous Multistate Nanoencoding Using Combinatorial Ferroelectric Closure Domains in BiFeO 3

Recent advances in ferroic materials have identified topological defects as promising candidates for enabling additional functionalities in future electronic systems. The generation of stable and customizable polar topologies is needed to achieve multistates that enable beyond-binary device architectures. Here, in this study, we show how to autonomously pattern on-demand highly tunable striped closure domains in pristine rhombohedral-phase BiFeO 3 thin films through precise scanning of a biased atomic force microscopy tip along carefully designed paths. By employing this strategy, we generate and manipulate closed-loop structures with high spatial resolution in an automated manner, allowing the creation of highly tunable and intricate topological domain structures that exhibit distinct polarization configurations without the need for electrode deposition or complex heterostructure growth. As a proof-of-concept for ferroelectric beyond-binary memory devices, we use such topological domains as multistates, engineering an alphabet and automating the symbolic writing/reading process using autonomous microscopy. The resulting information density is compared with that of current commercially available memory devices, demonstrating the potential of ferroelectric topological domains for multistate information storage applications.

BiFeO3↗

A new era of ferroelectric thin films for nonvolatile memories

Ferroelectric films have potential applications in nonvolatile memory devices. In addition to the well-established perovskite-structure oxide ferroelectrics, hafnia- and wurtzite-based ferroelectrics have recently attracted considerable attention because of the improved scalability of the ferroelectric response (down to nanometer thicknesses), their compatibility with silicon fabrication processes, and the availability of deposition methods that realize three-dimensional structures. Furthermore, due to their high compatibility with silicon processes, these are also expected to be used in emerging energy-efficient applications, such as neuromorphic computing and reservoir computing. In this article, we review the fundamentals of hafnia- and wurtzite-based ferroelectrics and their advantages and issues for developing in nonvolatile memory devices. Then, possible emerging applications are discussed.

36 MATERIALS SCIENCE↗

Rare-earth substitution in (BiYCa)3(FeSiGe)5O12 bubble films

The substitution of Y by Sm, Tb, Gd, and Ho in (BiYCa)3 FeSiGe)5O12 bubble garnet is shown to have large effects on the growth-induced anisotropy (GIA). The presently accepted film composition intended for 6-or 8-micron-period bubble memory devices demands partial substitution of Y by Gd and Ho. However, comparing films grown under the same growth conditions, it is observed that YGdHoBilG films posess less (GIA) than their Gd, Ho-free counterparts. Thus, to satisfy (GIA) requirements, the supercooling during growth must be increased by 20 K to 80 K with undesirable effects on defect densities. A new film composition containing Sm, Tb, and Gd has been formulated to satisfy all known material property specifications for 6- or 8-micron-period memory devices. It can be grown with only 45-50 K supercooling.

Luther, L. C.↗

Shape memory embolectomy devices and systems

An embolectomy device comprised of an expansion unit and a support unit is disclosed. The expansion unit can be actuated in response to one or more external stimuli, and the support unit, located proximately to the expansion unit, provides a force to hold the expansion unit in place and to further induce the expansion unit's radial expansion. The radial expansion of the expansion unit causes the expansion unit to physically contact a blood clot, enabling the blood clot to be removed. In some embodiments, the expansion unit can be fabricated from a shape memory polymer foam. In some embodiments the support unit can be fabricated from any elastic material including, without limitation, shape memory alloys.

59 BASIC BIOLOGICAL SCIENCES↗

Field-free switching of perpendicular magnetization in a ferrimagnetic insulator with spin reorientation transition

Writing magnetic bits through spin-orbit torque (SOT) switching is promising for fast and efficient magnetic random-access memory devices. While SOT switching of out-of-plane (OOP) magnetized states requires lateral symmetry breaking, in-plane (IP) magnetized states suffer from low storage density. Here, we demonstrate a field-free switching scheme using a 5-nanometer europium iron garnet film grown with a (110) orientation that shows a spin reorientation transition from OOP to IP above room temperature. This scheme combines the benefits of high-density storage in the OOP states at room temperature and the efficient field-free SOT switching in the IP states at elevated temperatures. While conventional switching of OOP bits faces the dilemma that high OOP anisotropy is required to improve bit stability and low OOP anisotropy is required to lower switching current density, this scheme disentangles this interdependence, allowing for low switching currents to be possible without sacrificing the bit stability, offering opportunities for future memory devices.

Science & Technology - Other Topics↗

Magnetic Switching in Monolayer 2D Diluted Magnetic Semiconductors via Spin‐to‐Spin Conversion

Abstract The integration of 2D van der Waals (vdW) magnets with topological insulators or heavy metals holds great potential for realizing next‐generation spintronic memory devices. However, achieving high‐efficiency spin–orbit torque (SOT) switching of monolayer vdW magnets at room temperature poses a significant challenge, particularly without an external magnetic field. Here, it is shown field‐free, deterministic, and nonvolatile SOT switching of perpendicular magnetization in the monolayer, diluted magnetic semiconductor (DMS), Fe‐doped MoS 2 (Fe:MoS 2 ) at up to 380 K with a current density of ≈7 × 10 4 A cm −2 . The in situ doping of Fe into monolayer MoS 2 via chemical vapor deposition and the geometry‐induced strain in the crystal break the rotational switching symmetry in Fe:MoS 2 , promoting field‐free SOT switching by generating out‐of‐plane spins via spin‐to‐spin conversion. An apparent anomalous Hall effect (AHE) loop shift at a zero in‐plane magnetic field verifies the existence of z spins in Fe:MoS 2 , inducing an antidamping‐like torque that facilitates field‐free SOT switching. This field‐free SOT application using a 2D ferromagnetic monolayer provides a new pathway for developing highly power‐efficient spintronic memory devices.

Chen, Siwei [Department of Mechanical Engineering ↗

Interaction between Convection and Heat Transfer in Crystal Growth

Crystals are integral components in some of our most sophisticated and rapidly developing industries. Single crystals are solids with the most uniform structures that can be obtained on an atomic scale. Because of their structural uniformity, crystals can transmit acoustic and electromagnetic waves and charged particles with essentially no scattering or interferences. This transparency, which can be selectively modified by controlled additions of impurities known as dopants, is the foundation of modern electronic industry. It has brought about widespread application of crystals in transistors, lasers, microwave devices, infrared detectors, magnetic memory devices, and many other magnets and electro-optic components. The performance of a crystal depends strongly on its compositional homogeneity. For instance, in modern microcircuitry, compositional variations of a few percent (down to a submicron length scale) can seriously jeopardize predicted yields. Since crystals are grown by carefully controlled phase transformations, the compositional adjustment in the solid is often made during growth from the nutrient. Hence, a detailed understanding of mass transfer in the nutrient is essential. Moreover, since mass transfer is often the slowest process during growth, it is usually the rate limiting mechanism. Crystal growth processes are usually classified according to the nature of the parent phase. Nevertheless, whether the growth occurs by solidification from a melt (melt growth), nucleation from a solution (solution growth), condensation from a vapor (physical vapor transport) or chemical reaction of gases (chemical vapor deposition), the parent phase is a fluid. As is with most non-equilibrium processes involving fluids, liquid or vapor, fluid motion plays an important role, affecting both the concentration and temperature gradients at the soli-liquid interface.

Source record↗

Persistent Memory Object Storage and Indexing for Scientific Computing

This paper presents Mosiqs, a persistent memory object storage framework with metadata indexing and querying for scientific computing. We design Mosiqs based on the key idea that memory objects on shared PM pool can live beyond the application lifetime and can become the sharing currency for applications and scientists. Mosiqs provides an aggregate memory pool atop an array of persistent memory devices to store and access memory objects. Mosiqs uses a lightweight persistent memory key-value store to manage the metadata of memory objects such as persistent pointer mappings, which enables memory object sharing for effective scientific collaborations. Mosiqs is implemented atop PMDK. We evaluate the proposed approach on many-core server with an array of real PM devices. The preliminary evaluation confirms a 100% improvement for write and 30% in read performance against a PM-aware file system approach.

Khan, Awais↗

MOSIQS: Persistent Memory Object Storage With Metadata Indexing and Querying for Scientific Computing

Scientific applications often require high-bandwidth shared storage to perform joint simulations and collaborative data analytics. Shared memory pools provide a chance to satisfy such needs. Recently, a high-speed network such as Gen-Z utilizing persistent memory (PM) offers an opportunity to create a shared memory pool connected to compute nodes. However, there are several challenges to use scientific applications on the shared memory pool directly such as scalability, failure-atomicity, and lack of scientific metadata-based search and query. In this paper, we propose MOSIQS, a persistent memory object storage framework with metadata indexing and querying for scientific computing. We design MOSIQS based on the key idea that memory objects on PM pool can live beyond the application lifetime and can become the sharing currency for applications and scientists. MOSIQS provides an aggregate memory pool atop an array of persistent memory devices to store and access memory objects to accelerate scientific computing. MOSIQS uses a lightweight persistent memory key-value store to manage the metadata of memory objects, which enables memory object sharing. To facilitate metadata search and query over millions of memory objects resident on memory pool, we introduce Group Split and Merge (GSM), a novel persistent index data structure designed primarily for scientific datasets. GSM splits and merges dynamically to minimize the query search space and maintains low query processing time while overcoming the index storage overhead. MOSIQS is implemented on top of PMDK. We evaluate the proposed approach on many-core server with an array of real PM devices. Experimental results show that MOSIQS gains a 100% write performance improvement and executes multi-attribute queries efficiently with 2.7× less index storage overhead offering significant potential to speed up scientific computing applications.

97 MATHEMATICS AND COMPUTING↗

Asymmetric Electrode Work Function Customization via Top Electrode Replacement in Ferroelectric and Field–Induced Ferroelectric Hafnium Zirconium Oxide Thin Films

Non-volatile memory device structures such as ferroelectric random-access memory and ferroelectric tunnel junctions employ switchable spontaneous polarization to hold binary states. These devices can potentially benefit from the imposition of spontaneous internal biases and their resulting effect on the polarization properties of the ferroelectric (or field-induced ferroelectric/ antiferroelectric) layer. While HfO 2 -based thin films are ideal candidates for implementation into these devices due to their scalability and silicon compatibility, the phase purity of these oxides is sensitive to the selection of electrode material, preventing incorporation of asymmetric electrode layers into such structures. Within this work, electrode replacement following post-metallization anneal processing is introduced as a route to achieve ferroelectric and field-induced ferroelectric Hf x Zr 1–x O 2 (HZO) thin films with electrode-independent phase constitutions. The effects of this process and the corresponding internal biases imposed across the HZO layers due to asymmetric work functions are investigated. It is shown that internal biases vary in magnitude in accordance with prediction based on the work functions of the replaced electrode layers and affect remanent polarization magnitudes. Accordingly, electrode replacement presents a processing route that can readily produce HZO films with spontaneous internal biases and electrode- independent phase constitutions, facilitating implementation of these ferroelectrics into the next generation device structures.

36 MATERIALS SCIENCE↗

A 128K-bit CCD buffer memory system

A prototype system was implemented to demonstrate that CCD's can be applied advantageously to the problem of low power digital storage and particularly to the problem of interfacing widely varying data rates. 8K-bit CCD shift register memories were used to construct a feasibility model 128K-bit buffer memory system. Peak power dissipation during a data transfer is less than 7 W., while idle power is approximately 5.4 W. The system features automatic data input synchronization with the recirculating CCD memory block start address. Descriptions are provided of both the buffer memory system and a custom tester that was used to exercise the memory. The testing procedures and testing results are discussed. Suggestions are provided for further development with regards to the utilization of advanced versions of CCD memory devices to both simplified and expanded memory system applications.

Siemens, K. H.↗

Non-Volatile, Low Power, and High Density SiC Memory For Future Venus Missions

Long lived memory would transform Venus landers & missions. Venus durable memory demonstrated in earlier HOTTech with impractically high power and low bit capacity. This project seeks to develop and demonstrate the world’s first Venus-durable low power memory device (Non-Volatile Random Access Memory (NVRAM) to enhance extended Venus surface missions.

silicon carbide↗

IRIS: A Performance-Portable Framework for Cross-Platform Heterogeneous Computing

From edge to exascale, computer architectures are becoming more heterogeneous and complex. The systems typically have fat nodes, with multicore CPUs and multiple hardware accelerators such as GPUs, FPGAs, and DSPs. This complexity is causing a crisis in programming systems and performance portability. Several programming systems are working to address these challenges, but the increasing architectural diversity is forcing software stacks and applications to be specialized for each architecture. As we show, all of these approaches critically depend on their software framework for discovery, execution, scheduling, and data orchestration. To address this challenge, we believe that a more agile and proactive software framework is essential to increase performance portability and improve user productivity. To this end, we have designed and implemented IRIS: a performance-portable framework for cross-platform heterogeneous computing. IRIS can discover available resources, manage multiple diverse programming platforms (e.g., CUDA, Hexagon, HIP, Level Zero, OpenCL, OpenMP) simultaneously in the same execution, respect data dependencies, orchestrate data movement proactively, and provide for user-configurable scheduling. To simplify data movement, IRIS introduces a shared virtual device memory with relaxed consistency among different heterogeneous devices. IRIS also adds an automatic kernel workload partitioning technique using the polyhedral model so that it can resize kernels for a wide range of devices. Our evaluation on three architectures, ranging from Qualcomm Snapdragon to a Summit supercomputer node, shows that IRIS improves portability across a wide range of diverse heterogeneous architectures with negligible overhead.

97 MATHEMATICS AND COMPUTING↗