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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 91 records · Page 5

Structural Evolution of Molybdenum Disulfide Prepared by Atomic Layer Deposition for Realization of Large Scale Films in Microelectronic Applications

Molybdenum disulfide (MoS 2 ) films are attractive materials for electronic and optoelectronic devices, but the temperatures used in the chemical vapor deposition (CVD) of these materials are too high for device integration. Recently, a low-temperature atomic layer deposition (ALD) process was demonstrated for growth of MoS 2 films at 200 °C using MoF 6 and H 2 S. However, the as-deposited films were amorphous and required annealing to obtain the desired layered structure. The MoS 2 films were sulfur-deficient; however, after annealing the crystallinity improved. To study the structure of these films and the process by which they crystallize, we performed in this work X-ray absorption spectroscopy and high-energy X-ray scattering experiments on both as-deposited and annealed MoS 2 films. Analysis indicated that molybdenum atoms in the as-deposited films were well coordinated with sulfur but not well coordinated with other molybdenum atoms when compared to a crystalline reference. Further analysis revealed clusters of the sulfur-rich phase [Mo 3 S(S 6 ) 2 ] 2– , which decomposed after annealing in H 2 and H 2 S at 400 and 600 °C. When compared to the sulfur-deficient films reported previously for this ALD process, the sulfur-rich phase found here indicates that nucleation on the substrate plays an important role in the resulting film stoichiometry, which could be tuned to produce higher quality films for microelectronic applications.

36 MATERIALS SCIENCE↗

New Roadmap for Microelectronics: Charting the Semiconductor Industry's Path Over the Next 5, 10, and 20 Years

In the past, the role of strategic planning for semiconductor industry was met by the International Technology Roadmap for Semiconductors (ITRS), serving as a guiding light that provided manufacturers, designers, equipment suppliers, and researchers with direction years in advance. By providing a common framework for coordination across semiconductor industry stakeholders, technology development efforts were efficient and aligned. However, the dissolution of the ITRS in 2015 left a void, leading to years of disjointed efforts. Recognizing the need for unified guidance, the industry rallied for the creation of a new strategic plan, the Microelectronics and Advanced Packaging Technologies (MAPT) Roadmap (2023) was developed, through the efforts of hundreds of industry, academic and government experts, to provide detailed strategies for achieving these goals. This comprehensive plan outlines ambitious goals for the industry's future.

HPC, Roadmap, AI, Liquid Cooling, Power, Silicon, ↗

Exascale-Enabled Models and Algorithms for Microelectronics Applications (MicroEleX) v1

The MicroEleX code package contains a variety of models and algorithms for physical modeling of microelectronic circuitry, including electrostatics, electrodynamics, superconducting physics, micromagnetics, multi-ferroic systems, and quantum transport. MicroEleX leverages the AMReX software framework to provide scalability on GPU-based supercomputing architectures. The code is open source and designed to be algorithmically flexible so developers can incorporate enhanced or customized physics.

Nonaka, Andy↗

Federated Learning and Differential Privacy: What might AI-Enhanced co-design of microelectronics learn?

Data is a valuable commodity, and it is often dispersed over multiple entities. Sharing data or models created from the data is not simple due to concerns regarding security, privacy, ownership, and model inversion. This limitation in sharing can hinder model training and development. Federated learning can enable data or model sharing across multiple entities that control local data without having to share or exchange the data themselves. Differential privacy is a conceptual framework that brings strong mathematical guarantee for privacy protection and helps provide a quantifiable privacy guarantee to any data or models shared. The concepts of federated learning and differential privacy are introduced along with possible connections. Lastly, some open discussion topics on how federated learning and differential privacy can tied to AI-Enhanced co-design of microelectronics are highlighted.

29 ENERGY PLANNING, POLICY, AND ECONOMY↗

A rapid, pulsed laser testing approach for single event latch-up screening in microelectronics

A pulsed laser testing system for rapid screening of single-event latch-up (SEL) in microelectronics with real-time visualization of sensitive nodes via photo-emission is presented. We provide a detailed overview of the system, followed by SEL threshold measurements in an analog-to-digital converter (AD9240). We find that SEL thresholds are comparable to measurements taken with a low-repetition rate, fixed beam system, and demonstrate full-die scanning speeds can be an order of magnitude faster

Andrus, Liam Padraic↗

Reparable, high-density microelectronic module provides effective heat sink

Reparable modular system is used for packaging microelectronic flat packs and miniature discrete components. This three-dimensional compartmented structure incorporates etched phosphor bronze sheets and frames with etched wire conductors. It provides an effective heat sink for electric power dissipation in the absence of convective cooling means.

Carlson, K. J.↗