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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 91 records · Page 5
All sourcesNASA NTRSDOE OSTI
DOE OSTI2021

Simulations of Quantum Circuits with Approximate Noise using qsim and Cirq

We introduce multinode quantum trajectory simulations with qsim, an open source high performance simulator of quantum circuits. qsim can be used as a backend of Cirq, a Python software library for writing quantum circuits. We present a novel delayed inner product algorithm for quantum trajectories which can result in an order of magnitude speedup for low noise simulation. We also provide tools to use this framework in Google Cloud Platform, with high performance virtual machines in a single mode or multinode setting. Multinode configurations are well suited to simulate noisy quantum circuits with quantum trajectories. Finally, we introduce an approximate noise model for Google's experimental quantum computing platform and compare the results of noisy simulations with experiments for several quantum algorithms on Google's Quantum Computing Service.

Isakov, Sergei V.↗
DOE OSTI2021

Probabilistic simulation of quantum circuits using a deep-learning architecture

The fundamental question of how to best simulate quantum systems using conventional computational resources lies at the forefront of condensed matter and quantum computation. It impacts both our understanding of quantum materials and our ability to emulate quantum circuits. Here we present an exact formulation of quantum dynamics via factorized generalized measurements which maps quantum states to probability distributions with the advantage that local unitary dynamics and quantum channels map to local quasistochastic matrices. This representation provides a general framework for using state-of-the-art probabilistic models in machine learning for the simulation of quantum many-body dynamics. Using this framework, we have developed a practical algorithm to simulate quantum circuits using an attention network based on a powerful neural network ansatz responsible for the most recent breakthroughs in natural language processing. We demonstrate our approach by simulating circuits that build Greenberger-Horne-Zeilinger and linear graph states of up to 60 qubits, as well as a variational quantum eigensolver circuit for preparing the ground state of the transverse field Ising model on several system sizes. Our methodology constitutes a modern machine learning approach to the simulation of quantum physics with applicability both to quantum circuits as well as other quantum many-body systems.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2020

A Sensorless Coil Detection Scheme based on Dead-Time Effect in Dynamic Wireless Power Transfer Systems

The detection of electric vehicles in dynamic wireless power transfer (DWPT) systems is important to reduce the standby losses and comply with the electromagnetic-field emission guidelines recommended by the International Commission for Non-Ionizing Radiation Protection. This paper discusses a novel sensorless coil detection scheme, which exploits the phenomenon of voltage-polarity reversal/notches caused by the dead-time effect in the full-bridge inverter. The variations in the system impedance and dead-time effects are collectively exploited to detect the receiver coil in the DWPT system. The proposed coil detection scheme is accomplished at low excitation voltage, which reduces the inverter standby losses. The theoretical analysis of the notch occurrence and open-loop simulation results are presented using a DWPT model developed in the piecewise linear electrical circuit simulation software.

Kavimandan, Utkarsh↗
DOE OSTI2023

Xyce™ Parallel Electronic Simulator Users’ Guide (V.7.7)

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers.

42 ENGINEERING↗
NASA NTRS1995

Efficient finite element simulation of slot spirals, slot radomes and microwave structures

This progress report contains the following two documents: (1) 'Efficient Finite Element Simulation of Slot Antennas using Prismatic Elements' - A hybrid finite element-boundary integral (FE-BI) simulation technique is discussed to treat narrow slot antennas etched on a planar platform. Specifically, the prismatic elements are used to reduce the redundant sampling rates and ease the mesh generation process. Numerical results for an antenna slot and frequency selective surfaces are presented to demonstrate the validity and capability of the technique; and (2) 'Application and Design Guidelines of the PML Absorber for Finite Element Simulations of Microwave Packages' - The recently introduced perfectly matched layer (PML) uniaxial absorber for frequency domain finite element simulations has several advantages. In this paper we present the application of PML for microwave circuit simulations along with design guidelines to obtain a desired level of absorption. Different feeding techniques are also investigated for improved accuracy.

Gong, J.↗
NASA NTRS1988

Electronic Neural-Network Simulator

Experimental circuits faster than simulation programs run on digital computers. Serial shift register routes clock pulses C1 to neurons in sequence. Clock pulses C2 interrogate neurons. Neuron interconnection information stored in simulated synapses. Can be expanded to greater complexity.

Moopenn, Alex W.↗
NASA NTRS2001

Temperature Effects in Varactors and Multipliers

Varactor diode multipliers are a critical part of many THz measurement systems. The power and efficiencies of these devices limit the available power for THz sources. Varactor operation is determined by the physics of the varactor device and a careful doping profile design is needed to optimize the performance. Higher doped devices are limited by junction breakdown and lower doped structures are limited by current saturation. Higher doped structures typically have higher efficiencies and lower doped structures typically have higher powers at the same operating frequency and impedance level. However, the device material properties are also a function of the operating temperature. Recent experimental evidence has shown that the power output of a multiplier can be improved by cooling the device. We have used a particle Monte Carlo simulation to investigate the temperature dependent velocity vs. electric field in GaAs. This information was then included in a nonlinear device circuit simulator to predict multiplier performance for various temperatures and device designs. This paper will describe the results of this analysis of temperature dependent multiplier operation.

East, J.↗
DOE OSTI2024

Benchmarking characterization methods for noisy quantum circuits

Effective methods for characterizing the noise in quantum computing devices are essential for programming and debugging circuit performance. Existing approaches vary in the information obtained as well as the amount of quantum and classical resources required, with more information generally requiring more resources. Here we benchmark the characterization methods of gate set tomography, Pauli channel noise reconstruction, and empirical direct characterization for developing models that describe noisy quantum circuit performance on a 27-qubit superconducting transmon device. We evaluate these models by comparing the accuracy of noisy circuit simulations with the corresponding experimental observations. Here, we find that the agreement of noise model to experiment does not correlate with the information gained by characterization and that the underlying circuit strongly influences the best choice of characterization approach. Empirical direct characterization scales best of the methods we tested and produced the most accurate characterizations across our benchmarks.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
NASA NTRSDate not supplied

Efficient Implementation for Unitary Coupled Cluster State Preparation for Near-Term Quantum Computers

Unitary coupled cluster theory (UCC) is a common wave function ansatz for quantum simulation of molecular electronic structure using the variational quantum eigenvalue solver (VQE). Even for small molecules using a double-ζ basis, the number of variational parameters required to minimize the electronic energy (i.e., optimize the circuit) is large and beyond the reach of current quantum computers. For example, a circuit simulating C2 using the UCCSD ansatz and the cc-pVDZ basis set with frozen-core will require over 10,000 variational parameters and a Hilbert space of over 10^8 determinants. To make progress on simulating such molecular systems on near-term quantum computers, we explore how much of the optimization can be approximately prepared with classical simulation while reducing the number of optimization steps performed on a quantum device. Recently, Chen, Cheng, and Freericks [J. Chem. Theory Comput. 2021, 17, 841-847] presented an algorithm for the factorized form of the UCC ansatz that allows for efficient UCC optimizations on classical hardware. We flip the algorithm around and use it to prepare approximate quantum circuits for systems that require a large number of qubits to represent. We will present results from our implementation and discuss strategies for incorporating this implementation for algorithms involving near-term quantum computers.

J Wayne Mullinax↗
NASA NTRSDate not supplied

Efficient Implementation for Unitary Coupled Cluster State Preparation for Near-Term Quantum Computers

Unitary coupled cluster theory (UCC) is a common wave function ansatz for quantum simulation of molecular electronic structure using the variational quantum eigenvalue solver (VQE). Even for small molecules using a double-ζ basis, the number of variational parameters required to minimize the electronic energy (i.e., optimize the circuit) is large and beyond the reach of current quantum computers. For example, a circuit simulating C2 using the UCCSD ansatz and the cc-pVDZ basis set with frozen-core will require over 10,000 variational parameters and a Hilbert space of over 10^(8) determinants. To make progress on simulating such molecular systems on near-term quantum computers, we explore how much of the optimization can be approximately prepared with classical simulation while reducing the number of optimization steps performed on a quantum device. Recently, Chen, Cheng, and Freericks [J. Chem. Theory Comput. 2021, 17, 841-847] presented an algorithm for the factorized form of the UCC ansatz that allows for efficient UCC optimizations on classical hardware. We flip the algorithm around and use it to prepare approximate quantum circuits for systems that require a large number of qubits to represent. We will present results from our implementation and discuss strategies for incorporating this implementation for algorithms involving near-term quantum computers.

Quantum Computing↗
NASA NTRSDate not supplied

Efficient Implementation for Unitary Coupled Cluster State Preparation for Near-Term Quantum Computers

Unitary coupled cluster theory (UCC) is a common wave function ansatz for quantum simulation of molecular electronic structure using the variational quantum eigenvalue solver (VQE). Even for small molecules using a double-ζ basis, the number of variational parameters required to minimize the electronic energy (i.e., optimize the circuit) is large and beyond the reach of current quantum computers. For example, a circuit simulating C2 using the UCCSD ansatz and the cc-pVDZ basis set with frozen-core will require over 10,000 variational parameters and a Hilbert space of over 10^(8) determinants. To make progress on simulating such molecular systems on near-term quantum computers, we explore how much of the optimization can be approximately prepared with classical simulation while reducing the number of optimization steps performed on a quantum device. Recently, Chen, Cheng, and Freericks [J. Chem. Theory Comput. 2021, 17, 841-847] presented an algorithm for the factorized form of the UCC ansatz that allows for efficient UCC optimizations on classical hardware. We flip the algorithm around and use it to prepare approximate quantum circuits for systems that require a large number of qubits to represent. We will present results from our implementation and discuss strategies for incorporating this implementation for algorithms involving near-term quantum computers.

Quantum Computing↗
DOE OSTI2020

Classical Optimizers for Noisy Intermediate-Scale Quantum Devices

We present a collection of optimizers tuned for usage on Noisy Inter-mediate-Scale Quantum (NISQ) devices. Optimizers have a range of applications in quantum computing, including the Variational Quantum Eigensolver (VQE) and Quantum Approximate Optimization (QAOA) algorithms. They have further uses in calibration, hyperparameter tuning, machine learning, etc. We employ the VQE algorithm as a case study. VQE is a hybrid algorithm, with a classical minimizer step driving the next evaluation on the quantum processor. While most results to date concentrated on tuning the quantum VQE circuit, our study indicates that in the presence of quantum noise the classical minimizer step is a weak link and a careful choice combined with tuning is required for correct results. We explore state-of-the-art gradient-free optimizers capable of handling noisy, black-box, cost functions and stress-test them using a quantum circuit simulation environment with noise injection capabilities on individual gates. Our results indicate that specifically tuned optimizers are crucial to obtaining valid science results on NISQ hardware, as well as projecting forward on fault tolerant circuits.

Lavrijsen, Wim↗
NASA NTRS1992

A sweep algorithm for massively parallel simulation of circuit-switched networks

A new massively parallel algorithm is presented for simulating large asymmetric circuit-switched networks, controlled by a randomized-routing policy that includes trunk-reservation. A single instruction multiple data (SIMD) implementation is described, and corresponding experiments on a 16384 processor MasPar parallel computer are reported. A multiple instruction multiple data (MIMD) implementation is also described, and corresponding experiments on an Intel IPSC/860 parallel computer, using 16 processors, are reported. By exploiting parallelism, our algorithm increases the possible execution rate of such complex simulations by as much as an order of magnitude.

Gaujal, Bruno↗
NASA NTRS2000

A Parallel Genetic Algorithm for Automated Electronic Circuit Design

Parallelized versions of genetic algorithms (GAs) are popular primarily for three reasons: the GA is an inherently parallel algorithm, typical GA applications are very compute intensive, and powerful computing platforms, especially Beowulf-style computing clusters, are becoming more affordable and easier to implement. In addition, the low communication bandwidth required allows the use of inexpensive networking hardware such as standard office ethernet. In this paper we describe a parallel GA and its use in automated high-level circuit design. Genetic algorithms are a type of trial-and-error search technique that are guided by principles of Darwinian evolution. Just as the genetic material of two living organisms can intermix to produce offspring that are better adapted to their environment, GAs expose genetic material, frequently strings of 1s and Os, to the forces of artificial evolution: selection, mutation, recombination, etc. GAs start with a pool of randomly-generated candidate solutions which are then tested and scored with respect to their utility. Solutions are then bred by probabilistically selecting high quality parents and recombining their genetic representations to produce offspring solutions. Offspring are typically subjected to a small amount of random mutation. After a pool of offspring is produced, this process iterates until a satisfactory solution is found or an iteration limit is reached. Genetic algorithms have been applied to a wide variety of problems in many fields, including chemistry, biology, and many engineering disciplines. There are many styles of parallelism used in implementing parallel GAs. One such method is called the master-slave or processor farm approach. In this technique, slave nodes are used solely to compute fitness evaluations (the most time consuming part). The master processor collects fitness scores from the nodes and performs the genetic operators (selection, reproduction, variation, etc.). Because of dependency issues in the GA, it is possible to have idle processors. However, as long as the load at each processing node is similar, the processors are kept busy nearly all of the time. In applying GAs to circuit design, a suitable genetic representation 'is that of a circuit-construction program. We discuss one such circuit-construction programming language and show how evolution can generate useful analog circuit designs. This language has the desirable property that virtually all sets of combinations of primitives result in valid circuit graphs. Our system allows circuit size (number of devices), circuit topology, and device values to be evolved. Using a parallel genetic algorithm and circuit simulation software, we present experimental results as applied to three analog filter and two amplifier design tasks. For example, a figure shows an 85 dB amplifier design evolved by our system, and another figure shows the performance of that circuit (gain and frequency response). In all tasks, our system is able to generate circuits that achieve the target specifications.

Long, Jason D.↗
NASA NTRS1990

Statistical circuit design for yield improvement in CMOS circuits

This paper addresses the statistical design of CMOS integrated circuits for improved parametric yield. The work uses the Monte Carlo technique of circuit simulation to obtain an unbiased estimation of the yield. A simple graphical analysis tool, the yield factor histogram, is presented. The yield factor histograms are generated by a new computer program called SPICENTER. Using the yield factor histograms, the most sensitive circuit parameters are noted, and their nominal values are changed to improve the yield. Two basic CMOS example circuits, one analog and one digital, are chosen and their designs are 'centered' to illustrate the use of the yield factor histograms for statistical circuit design.

Kamath, H. J.↗
DOE OSTI2025

Adaptive variational quantum dynamics simulations with compressed circuits and fewer measurements

The adaptive variational quantum dynamics simulation (AVQDS) method performs real-time evolution of quantum states using automatically generated parametrized quantum circuits that often contain substantially fewer gates than Trotter circuits. Here we report an improved version of the method, which we call AVQDS(T), by porting the tiling efficient trial circuits with rotations implemented simultaneously technique. The algorithm adaptively adds layers of disjoint unitary gates to the ansatz circuit so as to keep the McLachlan distance, a measure of the accuracy of the variational dynamics, below a fixed threshold. Here we perform benchmark noiseless AVQDS(T) simulations of quench dynamics in local spin models and compare with an alternative adaptive variational approach on quantum resource requirement. Quantum dynamical simulations implementing realistic noise channels are also reported. Finally, we propose a way to substantially alleviate the measurement overhead of AVQDS(T) while maintaining high accuracy by synergistically integrating quantum circuit calculations on quantum processing units with classical calculations using, e.g., tensor networks to evaluate the quantum geometric tensor. We showcase that this approach enables AVQDS(T) to deliver more accurate results than simulations using a fixed ansatz of comparable final depth for a significant time duration with fewer quantum resources.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
NASA NTRS1992

Theoretical and experimental investigation of a rectenna element for microwave power transmission

A microstrip measurement system has been designed to analyze packaged GaAs Schottky barrier diodes under small and large signal conditions. The nonlinear equivalent circuit parameters of the diode are determined using a small signal test method that analyzes the diode's scattering parameters at various bias levels. The experimental results of a 2.45 GHz diode are verified using a nonlinear circuit simulation program based on a multireflection algorithm. A 35 GHz rectenna has been built using a microstrip patch antenna and Ka-band mixer diode. The measured efficiency was 29 percent at 120 mW input power. A frequency selective surface is designed using an equivalent circuit model to reduce the second harmonic radiations for a 2.45 GHz rectenna. Theoretical results are found to be in fairly good agreement with experiments.

Mcspadden, James O.↗