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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 91 records · Page 5
All sourcesNASA NTRSDOE OSTI
NASA NTRS1985

A proposed technique for the Venus balloon telemetry and Doppler frequency recovery

A technique is proposed to accurately estimate the Doppler frequency and demodulate the digitally encoded telemetry signal that contains the measurements from balloon instruments. Since the data are prerecorded, one can take advantage of noncausal estimators that are both simpler and more computationally efficient than the usual closed-loop or real-time estimators for signal detection and carrier tracking. Algorithms for carrier frequency estimation subcarrier demodulation, bit and frame synchronization are described. A Viterbi decoder algorithm using a branch indexing technique has been devised to decode constraint length 6, rate 1/2 convolutional code that is being used by the balloon transmitter. These algorithms are memory efficient and can be implemented on microcomputer systems.

Jurgens, R. F.↗
NASA NTRS1980

Microprocessor-controlled data synchronizer

Versatile receiver processes data at variety of rates and code formats. Functions performed are: bit detection, NRZ-L conversion, frame synchronization (with programmable word length), bit-sync acquisition and tracking, error-curve normalization, lock detection, half-bit-ambiguity resolution, and data-rate tracking.

Houston, S. W.↗
NASA NTRS1990

A bit serial sequential circuit

Normally a sequential circuit with n state variables consists of n unique hardware realizations, one for each state variable. All variables are processed in parallel. This paper introduces a new sequential circuit architecture that allows the state variables to be realized in a serial manner using only one next state logic circuit. The action of processing the state variables in a serial manner has never been addressed before. This paper presents a general design procedure for circuit construction and initialization. Utilizing pass transistors to form the combinational next state forming logic in synchronous sequential machines, a bit serial state machine can be realized with a single NMOS pass transistor network connected to shift registers. The bit serial state machine occupies less area than other realizations which perform parallel operations. Moreover, the logical circuit of the bit serial state machine can be modified by simply changing the circuit input matrix to develop an adaptive state machine.

Hu, S.↗
NASA NTRS1992

Control Circuit For Reed-Solomon Encoder

Control circuit designed for use with commercially available AHA4610 Reed-Solomon encoder. Needed to select depth of interleaving and to synchronize input and output blocks of data and parity bits with suitable clock signals. Circuit provides synchronizing and control signals for Reed-Solomon encoder. Encoder can operate with asynchronous input and output data streams at rates up to 80 Mb/s. Interleaving depth selectable, and accommodation to input data rate automatic.

Ross, Douglas↗
NASA NTRS1979

Digital correlator with fewer IC's

Digital correlator requires only few integrated circuits to determine synchronization of two 24-bit digital words. Circuit is easily reduced or expanded to accommodate shorter or longer words and can be utilized in industrial and commercial data processing and telecommunications.

Apple, G. G.↗
NASA NTRS1990

Synchronization Technique For Reception Of Coded Data

Shortest sequence of bits likely to be filled with error bursts examined. Algorithm improves synchronization of frames of noisy binary-coded data signals after Viterbi decoding (recovery from "inner" convolutional code used in transmission channel) and before Reed-Solomon or other decoding (recovery from "outer" error-correcting block code). Based on comparisons of sequences of correct and erroneous Viterbi-decoded received bits with known marker sequence denoting beginning of frame of data. Does not require count of number of bits in received sequence disagreeing with corresponding bits in marker sequence.

Shahshahani, Mehrdad M.↗
NASA NTRS1982

The effects of Viterbi decoder node synchronization losses on the telemetry receiving system

The Viterbi decoders currently used by the Deep space Network (DSN) use an algorithm for maintaining node synchronization that breaks down at bit signal-to-noise ratios (SNRs) of about 2.0 dB. It is shown that this can become an important consideration when the effects of noisy carrier referencing are combined with the lower SNRs that are expected at Voyager 2 Uranus and Neptune encounters. Depending on the available carrier power, node synchronization losses of between 0.85 and 1.25 dB can be expected in addition to the radio loss.

Deutsch, L. J.↗
NASA NTRS1974

Method and apparatus for decoding compatible convolutional codes

This invention relates to learning decoders for decoding compatible convolutional codes. The decoder decodes signals which have been encoded by a convolutional coder and allows performance near the theoretical limit of performance for coded data systems. The decoder includes a sub-bit shift register wherein the received sub-bits are entered after regeneration and shifted in synchronization with a clock signal recovered from the received sub-bit stream. The received sub-bits are processed by a sub-bit decision circuit, entered into a sub-bit shift register, decoded by a decision circuit, entered into a data shift register, and updated to reduce data errors. The bit decision circuit utilizes stored sub-bits and stored data bits to determine subsequent data-bits. Data errors are reduced by using at least one up-date circuit.

Doland, G. D.↗
NASA NTRS1985

Phase locked loop synchronization for direct detection optical PPM communication systems

Receiver timing synchronization of an optical pulse position modulation (PPM) communication system can be achieved using a phase locked loop (PLL) if the photodetector output is properly processed. The synchronization performance is shown to improve with increasing signal power and decreasing loop bandwidth. Bit error rate (BER) of the PLL synchronized PPM system is analyzed and compared to that for the perfectly synchronized system. It is shown that the increase in signal power needed to compensate for the imperfect synchronization is small (less than 0.1 dB) for loop bandwidths less than 0.1% of the slot frequency.

Chen, C. C.↗
NASA NTRS1982

Viterbi decoder node synchronization losses in the Reed-Solomon/Veterbi concatenated channel

The Viterbi decoders currently used by the Deep Space Network (DSN) employ an algorithm for maintaining node synchronization that significantly degrades at bit signal-to-noise ratios (SNRs) of below 2.0 dB. In a recent report by the authors, it was shown that the telemetry receiving system, which uses a convolutionally encoded downlink, will suffer losses of 0.85 dB and 1.25 dB respectively at Voyager 2 Uranus and Neptune encounters. This report extends the results of that study to a concatenated (255,223) Reed-Solomon/(7, 1/2) convolutionally coded channel, by developing a new radio loss model for the concatenated channel. It is shown here that losses due to improper node synchronization of 0.57 dB at Uranus and 1.0 dB at Neptune can be expected if concatenated coding is used along with an array of one 64-meter and three 34-meter antennas.

Deutsch, L. J.↗
NASA NTRS1986

Performance of PLL synchronized optical PPM communication systems

Receiver timing synchronization of an optical PPM communication system can be achieved using a phase-locked loop (PLL) if the photodetector output is properly processed. The synchronization performance is shown to improve with increasing signal power and decreasing loop bandwidth. The bit error rate performance of the PLL synchronized PPM system is analyzed and compared to that of the perfectly synchronized system. It is shown that the increase in signal power needed to compensate for the imperfect sychronization is small (less than 0.1 dB) for loop bandwidths less than 0.1 percent of the slot frequency.

Chen, C.-C.↗
NASA NTRS1990

50 Mbps free space direct detection laser diode optical communication system with Q = 4 PPM signaling

A 50 Mbps direct detection optical communication system for use in an intersatellite link was constructed with an AlGaAs laser diode transmitter and a silicon avalanche photodiode photodetector. The system used a Q = 4 PPM format. The receiver consisted of a maximum likelihood PPM detector and a timing recovery subsystem. The PPM slot clock was recovered at the receiver by using a transition detector followed by a PLL. The PPM word clock was recovered by using a second PLL whose input was derived from the presence of back-to-back PPM pulses contained in the received random PPM pulse sequences. The system achieved a bit error rate of 0.000001 at less than 50 detected signal photons/information bit. The receiver was capable of acquiring and maintaining slot and word synchronization for received signal levels greater than 20 photons/information bit, at which the receiver bit error rate was about 0.01.

Sun, Xiaoli↗
NASA NTRS1989

Frame synchronization methods based on channel symbol measurements

The current DSN frame synchronization procedure is based on monitoring the decoded bit stream for the appearance of a sync marker sequence that is transmitted once every data frame. The possibility of obtaining frame synchronization by processing the raw received channel symbols rather than the decoded bits is explored. Performance results are derived for three channel symbol sync methods, and these are compared with results for decoded bit sync methods reported elsewhere. It is shown that each class of methods has advantages or disadvantages under different assumptions on the frame length, the global acquisition strategy, and the desired measure of acquisition timeliness. It is shown that the sync statistics based on decoded bits are superior to the statistics based on channel symbols, if the desired operating region utilizes a probability of miss many orders of magnitude higher than the probability of false alarm. This operating point is applicable for very large frame lengths and minimal frame-to-frame verification strategy. On the other hand, the statistics based on channel symbols are superior if the desired operating point has a miss probability only a few orders of magnitude greater than the false alarm probability. This happens for small frames or when frame-to-frame verifications are required.

Dolinar, S.↗
NASA NTRS1991

System Decommutes And Displays Telemetry Data

TDPlus computer program software system for decommutation of pulse-code-modulation (PCM) telemetry signals. Provides synchronization, conversion into engineering units, and display of serial bit streams. Transforms IBM PC-compatible computer into PCM-telemetry-decommutation system. Synchronizes telemetric signals data and enables conversion back into such meaningful forms as voltage, current, pressure, and the like. Also controls operation of digital-to-analog converters to ship data to paper strip charts or to parallel digital ports for offloading to other computers. Software used to process actual data only when telemetry-data-processing computer modified in accordance with specifications contained in "TDPlus TM Data Processor" (GSC-13291). Written in Turbo C and 8088 Assembly language.

Massey, D. E.↗
NASA NTRS1988

Node synchronization of viterbi decoders using state metrics

The concept of node synchronization using state metrics is investigated. The branch metrics are integrated over a fixed time interval and the results are compared to the detection threshold. If the threshold is exceeded, the out-of-sync hypothesis is accepted; otherwise, the in-sync hypothesis is accepted. It is shown that the detection threshold can be chosen independent of any particular convolutional code with fixed code rate and constant length if the code has reasonably good bit error rate performance. Three node synchronization schemes are compared: (1) a scheme using the syndrome; (2) a scheme using the frame-sync patterns; and (3) a scheme using the state metrics. At very low signal to noise ratios (SNR), scheme 2 can be faster than scheme 1. For Voyager's rate 1/2 and constraint length 7 convolutional code, this happens for SNRs of less than 0.7 dB. This result is obtained by assuming that the code frame-sync pattern has good aperiodic autocorrelation properties. For a fixed false alarm probability, the sequential detection scheme based on the syndrome is faster than scheme 3 with fixed integration time. A sequential detection technique is needed to improve the speed of scheme 3.

Cheng, U.↗
NASA NTRS1998

The Tera Multithreaded Architecture and Unstructured Meshes

The Tera Multithreaded Architecture (MTA) is a new parallel supercomputer currently being installed at San Diego Supercomputing Center (SDSC). This machine has an architecture quite different from contemporary parallel machines. The computational processor is a custom design and the machine uses hardware to support very fine grained multithreading. The main memory is shared, hardware randomized and flat. These features make the machine highly suited to the execution of unstructured mesh problems, which are difficult to parallelize on other architectures. We report the results of a study carried out during July-August 1998 to evaluate the execution of EUL3D, a code that solves the Euler equations on an unstructured mesh, on the 2 processor Tera MTA at SDSC. Our investigation shows that parallelization of an unstructured code is extremely easy on the Tera. We were able to get an existing parallel code (designed for a shared memory machine), running on the Tera by changing only the compiler directives. Furthermore, a serial version of this code was compiled to run in parallel on the Tera by judicious use of directives to invoke the "full/empty" tag bits of the machine to obtain synchronization. This version achieves 212 and 406 Mflop/s on one and two processors respectively, and requires no attention to partitioning or placement of data issues that would be of paramount importance in other parallel architectures.

Bokhari, Shahid H.↗
NASA NTRS2018

Randomizer for High Data Rates

NASA as well as a number of other space agencies now recognize that the current recommended CCSDS randomizer used for telemetry (TM) is too short. When multiple applications of the PN8 Maximal Length Sequence (MLS) are required in order to fully cover a channel access data unit (CADU), spectral problems in the form of elevated spurious discretes (spurs) appear. Originally the randomizer was called a bit transition generator (BTG) precisely because it was thought that its primary value was to insure sufficient bit transitions to allow the bit/symbol synchronizer to lock and remain locked. We, NASA, have shown that the old BTG concept is a limited view of the real value of the randomizer sequence and that the randomizer also aids in signal acquisition as well as minimizing the potential for false decoder lock. Under the guidelines we considered here there are multiple maximal length sequences under GF(2) which appear attractive in this application. Although there may be mitigating reasons why another MLS sequence could be selected, one sequence in particular possesses a combination of desired properties which offsets it from the others.

randomizer↗