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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 865 records · Page 48

CMOS circuit-fabrication handbook

Report describes complementary metal-oxide-semiconductor (CMOS) process used to fabricate integrated circuits at Marshall Space Flight Center. It also presents general discussions of circuit design, mask making packaging, and testing.

Bouldin, D. L.↗

Minimizing spikes in switching-regulator circuits

Circuit, employing tapped inductor to back-bias rectifying diodes and extra diode to cummutate current, minimizes current spikes that cause premature transistor failure in switching-regulator circuits.

Mclyman, W. T.↗

Detector verifier for circuit analyzers

Economical tool checks operation of automatic circuit analyzer. Each loop is addressed directly from analyzer console by switching internal analyzer bridge to resistance equal that of connecting cable plus specified limiting test value. Procedure verifies whether detected faults in circuit under test are actually due to analyzer malfunction. Standard-length universal test cables make it possible to shift detector tool from cable to cable without resistance compensation.

Pope, D. L.↗

Apparatus including a plurality of spaced transformers for locating short circuits in cables

A cable fault locator is described for sensing faults such as short circuits in power cables. The apparatus includes a plurality of current transformers strategically located along a cable. Trigger circuits are connected to each of the current transformers for placing a resistor in series with a resistive element responsive to an abnormally high current flowing through that portion of the cable. By measuring the voltage drop across the resistive element, the location of the fault can be determined.

Cason, R. L.↗

Multichannel coincidence circuit

Digital circuit detects coincident pulses in two or more channels, and records time between primary pulses that are coincident with secondary pulses. Circuit has three major blocks: interval time subcircuit, measurement control subcircuit, and time sequence generator. Timer can be used in laser velocimeter or other instruments receiving data at irregular rates from two or more sources.

Clemmons, J. I., Jr.↗

Detecting short circuits during assembly

Detector circuit identifies shorts between bus bars of electronic equipment being wired. Detector sounds alarm and indicates which planes are shorted. Power and ground bus bars are scanned continuously until short circuit occurs.

Deboo, G. J.↗

Optimizing costs of VLSI circuits

Report analyzes costs of developing and producing low-production-volume, customized VLSI (very large-scale, integrated) circuits. Relationship is developed between IC cost and electronic system cost using IC cost models based on design/fabrication approach. Emphasis is on development of understanding between cost and volume for custom circuits to be used by NASA. Reliability is major cost component in models. Report is divided into five sections and includes four appendices with useful reference literature.

Cook, K. B., Jr.↗

Cooling/grounding mount for hybrid circuits

Extremely short input and output connections, adequate grounding, and efficient heat removal for hybrid integrated circuits are possible with mounting. Rectangular clamp holds hybrid on printed-circuit board, in contact with heat-conductive ground plate. Clamp is attached to ground plane by bolts.

Bagstad, B.↗

Pulse-shaping circuit for laser excitation

Narrower, impedence-matched pulses initiate stabler electric discharges for gas lasers. Discharges are more efficient, more compact, capable of high repetition rate, and less expensive than conventional electron-beam apparatus, but gas tends to break down and form localized arcs. Pulse-shaping circuit compresses width of high-voltage pulses from relatively-slow rise-time voltage generator and gradually grades circuit impedance from inherent high impedance of generator to low impedence of gas.

Laudenslager, J. B.↗

Synthesis of a control model for a liquid nitrogen cooled, closed circuit, cryogenic nitrogen wind tunnel and its validation

The details of the efforts to synthesize a control-compatible multivariable model of a liquid nitrogen cooled, gaseous nitrogen operated, closed circuit, cryogenic pressure tunnel are presented. The synthesized model was transformed into a real-time cryogenic tunnel simulator, and this model is validated by comparing the model responses to the actual tunnel responses of the 0.3 m transonic cryogenic tunnel, using the quasi-steady-state and the transient responses of the model and the tunnel. The global nature of the simple, explicit, lumped multivariable model of a closed circuit cryogenic tunnel is demonstrated.

Balakrishna, S.↗

Cell short circuit, preshort signature

Short-circuit events observed in ground test simulations of DSCS-3 battery in-orbit operations are analyzed. Voltage signatures appearing in the data preceding the short-circuit event are evaluated. The ground test simulation is briefly described along with performance during reconditioning discharges. Results suggest that a characteristic signature develops prior to a shorting event.

Lurie, C.↗

Conductive surge testing of circuits and systems

Techniques are given for conductive surge testing of powered electronic equipment. The correct definitions of common and normal mode are presented. Testing requires not only spike-surge generators with a suitable range of open-circuit voltage and short-circuit current waveshapes, but also appropriate means, termed couplers, for connecting test surges to the equipment under test. Key among coupler design considerations is minimization of fail positives resulting from reduction in delivered surge energy due to the coupler. Back-filters and the lines on which they are necessary, are considered as well as ground-fault and ground potential rise. A method for monitoring delivered and resulting surge waves is mentioned.

Richman, P.↗

Study program to improve the open-circuit voltage of low resistivity single crystal silicon solar cells

The results of a 14 month program to improve the open circuit voltage of low resistivity silicon solar cells are described. The approach was based on ion implantation in 0.1- to 10.0-ohm-cm float-zone silicon. As a result of the contract effort, open circuit voltages as high as 645 mV (AMO 25 C) were attained by high dose phosphorus implantation followed by furnace annealing and simultaneous SiO2 growth. One key element was to investigate the effects of bandgap narrowing caused by high doping concentrations in the junction layer. Considerable effort was applied to optimization of implant parameters, selection of furnace annealing techniques, and utilization of pulsed electron beam annealing to minimize thermal process-induced defects in the completed solar cells.

Minnucci, J. A.↗

Two-Stage Linearization Circuit

High accuracy is obtained by combining analog and digital corrections. Proximity-sensor linearization circuit has two stages. First-stage linearization is accurate to about 3 percent; accuracy of final output is better than 0.5 percent. By modifying contents of the Programable Read-Only Memory (PROM), circuit can also be used to derive a nonlinear output.

Waldeck, G. C.↗

User's manual for large-scale integrated circuit layout check program

A computer program is described that checks for the correctness of chip design layout generated by the Banning Placement Routing Folding program (PRF) by verifying agreement between a specified circuit design and a corresponding computer generated circuit layout as stored on the Artwork (PRF output) tape. An example computer run is included.

Source record↗

Frequency translating phase conjugation circuit for active retrodirective antenna array

An active retrodirective antenna array which has central phasing from a reference antenna element through a "tree" structured network of transmission lines utilizes a number of phase conjugate circuits (PCCs) at each node and a phase reference regeneration circuit (PRR) at each node except the initial node. Each node virtually coincides with an element of the array. A PCC generates the exact conjugate phase of an incident signal using a phase locked loop which combines the phases in an up converter, divides the sum by 2 and mixes the result with the phase in a down converter for phase detection. The PRR extracts the phase from the conjugate phase. Both the PCC and the PRR are not only exact but also free from mixer degeneracy.

Chernoff, R.↗

Life test of a nickel cadmium battery with a protection/reconditioning circuit

Results are discussed for a Ni-Cd battery test over a period of 8 years, 2 months and 44,213 simulated low Earth orbits. The battery cells were protected against overdischarge and reversal at discharge rates up to 25 amperes (1.25C) by a battery protection and reconditioning circuit. The circuit performed flawlessly during the test, and proved its value, both as a battery reconditioner and a cell protection device. Battery cell failures are also discussed. The test demonstrated the viability of using Ni-Cd batteries at depth-of-discharge up to 25 percent for over 5 years in a low Earth orbit.

Lanier, J. R., Jr.↗

An evaluation of the Intel 2920 digital signal processing integrated circuit

The circuit consists of a digital to analog converter, accumulator, read write memory and UV erasable read only memory. The circuit can convert an analog signal to a digital representation, perform mathematical operations on the digital signal and subsequently convert the digital signal to an analog output. Development software tailored for programming the 2920 is presented.

Heller, J.↗